mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-29 08:00:26 +09:00
arm: Remove mx53smd board
This board has not been converted to CONFIG_DM_MMC by the deadline. Remove it. Cc: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
This commit is contained in:
parent
1c4bd238b5
commit
53ad2db946
@ -68,10 +68,6 @@ config TARGET_MX53PPD
|
|||||||
help
|
help
|
||||||
Enable support for the GE Healthcare PPD.
|
Enable support for the GE Healthcare PPD.
|
||||||
|
|
||||||
config TARGET_MX53SMD
|
|
||||||
bool "Support mx53smd"
|
|
||||||
select MX53
|
|
||||||
|
|
||||||
config TARGET_TS4800
|
config TARGET_TS4800
|
||||||
bool "Support TS4800"
|
bool "Support TS4800"
|
||||||
select MX51
|
select MX51
|
||||||
@ -89,7 +85,6 @@ source "board/beckhoff/mx53cx9020/Kconfig"
|
|||||||
source "board/freescale/mx51evk/Kconfig"
|
source "board/freescale/mx51evk/Kconfig"
|
||||||
source "board/freescale/mx53evk/Kconfig"
|
source "board/freescale/mx53evk/Kconfig"
|
||||||
source "board/freescale/mx53loco/Kconfig"
|
source "board/freescale/mx53loco/Kconfig"
|
||||||
source "board/freescale/mx53smd/Kconfig"
|
|
||||||
source "board/ge/mx53ppd/Kconfig"
|
source "board/ge/mx53ppd/Kconfig"
|
||||||
source "board/inversepath/usbarmory/Kconfig"
|
source "board/inversepath/usbarmory/Kconfig"
|
||||||
source "board/k+p/kp_imx53/Kconfig"
|
source "board/k+p/kp_imx53/Kconfig"
|
||||||
|
@ -1,15 +0,0 @@
|
|||||||
if TARGET_MX53SMD
|
|
||||||
|
|
||||||
config SYS_BOARD
|
|
||||||
default "mx53smd"
|
|
||||||
|
|
||||||
config SYS_VENDOR
|
|
||||||
default "freescale"
|
|
||||||
|
|
||||||
config SYS_SOC
|
|
||||||
default "mx5"
|
|
||||||
|
|
||||||
config SYS_CONFIG_NAME
|
|
||||||
default "mx53smd"
|
|
||||||
|
|
||||||
endif
|
|
@ -1,6 +0,0 @@
|
|||||||
MX53SMD BOARD
|
|
||||||
M: Fabio Estevam <fabio.estevam@nxp.com>
|
|
||||||
S: Maintained
|
|
||||||
F: board/freescale/mx53smd/
|
|
||||||
F: include/configs/mx53smd.h
|
|
||||||
F: configs/mx53smd_defconfig
|
|
@ -1,7 +0,0 @@
|
|||||||
# SPDX-License-Identifier: GPL-2.0+
|
|
||||||
#
|
|
||||||
# Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
|
|
||||||
#
|
|
||||||
# (C) Copyright 2011 Freescale Semiconductor, Inc.
|
|
||||||
|
|
||||||
obj-y := mx53smd.o
|
|
@ -1,82 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
||||||
/*
|
|
||||||
* (C) Copyright 2009
|
|
||||||
* Stefano Babic DENX Software Engineering sbabic@denx.de.
|
|
||||||
*
|
|
||||||
* Refer doc/imx/mkimage/imximage.txt for more details about how-to configure
|
|
||||||
* and create imximage boot image
|
|
||||||
*
|
|
||||||
* The syntax is taken as close as possible with the kwbimage
|
|
||||||
*/
|
|
||||||
|
|
||||||
/* image version */
|
|
||||||
IMAGE_VERSION 2
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Boot Device : one of
|
|
||||||
* spi, sd (the board has no nand neither onenand)
|
|
||||||
*/
|
|
||||||
BOOT_FROM sd
|
|
||||||
|
|
||||||
/*
|
|
||||||
* Device Configuration Data (DCD)
|
|
||||||
*
|
|
||||||
* Each entry must have the format:
|
|
||||||
* Addr-type Address Value
|
|
||||||
*
|
|
||||||
* where:
|
|
||||||
* Addr-type register length (1,2 or 4 bytes)
|
|
||||||
* Address absolute address of the register
|
|
||||||
* value value to be stored in the register
|
|
||||||
*/
|
|
||||||
DATA 4 0x53fa8554 0x00300000
|
|
||||||
DATA 4 0x53fa8558 0x00300040
|
|
||||||
DATA 4 0x53fa8560 0x00300000
|
|
||||||
DATA 4 0x53fa8564 0x00300040
|
|
||||||
DATA 4 0x53fa8568 0x00300040
|
|
||||||
DATA 4 0x53fa8570 0x00300000
|
|
||||||
DATA 4 0x53fa8574 0x00300000
|
|
||||||
DATA 4 0x53fa8578 0x00300000
|
|
||||||
DATA 4 0x53fa857c 0x00300040
|
|
||||||
DATA 4 0x53fa8580 0x00300040
|
|
||||||
DATA 4 0x53fa8584 0x00300000
|
|
||||||
DATA 4 0x53fa8588 0x00300000
|
|
||||||
DATA 4 0x53fa8590 0x00300040
|
|
||||||
DATA 4 0x53fa8594 0x00300000
|
|
||||||
DATA 4 0x53fa86f0 0x00300000
|
|
||||||
DATA 4 0x53fa86f4 0x00000000
|
|
||||||
DATA 4 0x53fa86fc 0x00000000
|
|
||||||
DATA 4 0x53fa8714 0x00000000
|
|
||||||
DATA 4 0x53fa8718 0x00300000
|
|
||||||
DATA 4 0x53fa871c 0x00300000
|
|
||||||
DATA 4 0x53fa8720 0x00300000
|
|
||||||
DATA 4 0x53fa8724 0x04000000
|
|
||||||
DATA 4 0x53fa8728 0x00300000
|
|
||||||
DATA 4 0x53fa872c 0x00300000
|
|
||||||
DATA 4 0x63fd9088 0x35343535
|
|
||||||
DATA 4 0x63fd9090 0x4d444c44
|
|
||||||
DATA 4 0x63fd907c 0x01370138
|
|
||||||
DATA 4 0x63fd9080 0x013b013c
|
|
||||||
DATA 4 0x63fd9018 0x00011740
|
|
||||||
DATA 4 0x63fd9000 0xc3190000
|
|
||||||
DATA 4 0x63fd900c 0x9f5152e3
|
|
||||||
DATA 4 0x63fd9010 0xb68e8a63
|
|
||||||
DATA 4 0x63fd9014 0x01ff00db
|
|
||||||
DATA 4 0x63fd902c 0x000026d2
|
|
||||||
DATA 4 0x63fd9030 0x009f0e21
|
|
||||||
DATA 4 0x63fd9008 0x12273030
|
|
||||||
DATA 4 0x63fd9004 0x0002002d
|
|
||||||
DATA 4 0x63fd901c 0x00008032
|
|
||||||
DATA 4 0x63fd901c 0x00008033
|
|
||||||
DATA 4 0x63fd901c 0x00028031
|
|
||||||
DATA 4 0x63fd901c 0x052080b0
|
|
||||||
DATA 4 0x63fd901c 0x04008040
|
|
||||||
DATA 4 0x63fd901c 0x0000803a
|
|
||||||
DATA 4 0x63fd901c 0x0000803b
|
|
||||||
DATA 4 0x63fd901c 0x00028039
|
|
||||||
DATA 4 0x63fd901c 0x05208138
|
|
||||||
DATA 4 0x63fd901c 0x04008048
|
|
||||||
DATA 4 0x63fd9020 0x00005800
|
|
||||||
DATA 4 0x63fd9040 0x05380003
|
|
||||||
DATA 4 0x63fd9058 0x00022227
|
|
||||||
DATA 4 0x63fd901C 0x00000000
|
|
@ -1,159 +0,0 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0+
|
|
||||||
/*
|
|
||||||
* (C) Copyright 2011 Freescale Semiconductor, Inc.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#include <common.h>
|
|
||||||
#include <init.h>
|
|
||||||
#include <asm/global_data.h>
|
|
||||||
#include <asm/io.h>
|
|
||||||
#include <asm/arch/imx-regs.h>
|
|
||||||
#include <asm/arch/sys_proto.h>
|
|
||||||
#include <asm/arch/crm_regs.h>
|
|
||||||
#include <asm/arch/clock.h>
|
|
||||||
#include <asm/arch/iomux-mx53.h>
|
|
||||||
#include <linux/errno.h>
|
|
||||||
#include <netdev.h>
|
|
||||||
#include <mmc.h>
|
|
||||||
#include <fsl_esdhc_imx.h>
|
|
||||||
#include <asm/gpio.h>
|
|
||||||
|
|
||||||
DECLARE_GLOBAL_DATA_PTR;
|
|
||||||
|
|
||||||
int dram_init(void)
|
|
||||||
{
|
|
||||||
u32 size1, size2;
|
|
||||||
|
|
||||||
size1 = get_ram_size((void *)PHYS_SDRAM_1, PHYS_SDRAM_1_SIZE);
|
|
||||||
size2 = get_ram_size((void *)PHYS_SDRAM_2, PHYS_SDRAM_2_SIZE);
|
|
||||||
|
|
||||||
gd->ram_size = size1 + size2;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
int dram_init_banksize(void)
|
|
||||||
{
|
|
||||||
gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
|
|
||||||
gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
|
|
||||||
|
|
||||||
gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
|
|
||||||
gd->bd->bi_dram[1].size = PHYS_SDRAM_2_SIZE;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define UART_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
|
|
||||||
PAD_CTL_PUS_100K_UP | PAD_CTL_ODE)
|
|
||||||
|
|
||||||
static void setup_iomux_uart(void)
|
|
||||||
{
|
|
||||||
static const iomux_v3_cfg_t uart_pads[] = {
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_CSI0_DAT11__UART1_RXD_MUX, UART_PAD_CTRL),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_CSI0_DAT10__UART1_TXD_MUX, UART_PAD_CTRL),
|
|
||||||
};
|
|
||||||
|
|
||||||
imx_iomux_v3_setup_multiple_pads(uart_pads, ARRAY_SIZE(uart_pads));
|
|
||||||
}
|
|
||||||
|
|
||||||
static void setup_iomux_fec(void)
|
|
||||||
{
|
|
||||||
static const iomux_v3_cfg_t fec_pads[] = {
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_MDIO__FEC_MDIO, PAD_CTL_HYS |
|
|
||||||
PAD_CTL_DSE_HIGH | PAD_CTL_PUS_22K_UP | PAD_CTL_ODE),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_MDC__FEC_MDC, PAD_CTL_DSE_HIGH),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_RXD1__FEC_RDATA_1,
|
|
||||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_RXD0__FEC_RDATA_0,
|
|
||||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_TXD1__FEC_TDATA_1, PAD_CTL_DSE_HIGH),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_TXD0__FEC_TDATA_0, PAD_CTL_DSE_HIGH),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_TX_EN__FEC_TX_EN, PAD_CTL_DSE_HIGH),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
|
|
||||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_RX_ER__FEC_RX_ER,
|
|
||||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
|
|
||||||
PAD_CTL_HYS | PAD_CTL_PKE),
|
|
||||||
};
|
|
||||||
|
|
||||||
imx_iomux_v3_setup_multiple_pads(fec_pads, ARRAY_SIZE(fec_pads));
|
|
||||||
}
|
|
||||||
|
|
||||||
#ifdef CONFIG_FSL_ESDHC_IMX
|
|
||||||
struct fsl_esdhc_cfg esdhc_cfg[1] = {
|
|
||||||
{MMC_SDHC1_BASE_ADDR},
|
|
||||||
};
|
|
||||||
|
|
||||||
int board_mmc_getcd(struct mmc *mmc)
|
|
||||||
{
|
|
||||||
imx_iomux_v3_setup_pad(MX53_PAD_EIM_DA13__GPIO3_13);
|
|
||||||
gpio_direction_input(IMX_GPIO_NR(3, 13));
|
|
||||||
return !gpio_get_value(IMX_GPIO_NR(3, 13));
|
|
||||||
}
|
|
||||||
|
|
||||||
#define SD_CMD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_DSE_HIGH | \
|
|
||||||
PAD_CTL_PUS_100K_UP)
|
|
||||||
#define SD_PAD_CTRL (PAD_CTL_HYS | PAD_CTL_PUS_47K_UP | \
|
|
||||||
PAD_CTL_DSE_HIGH)
|
|
||||||
|
|
||||||
int board_mmc_init(struct bd_info *bis)
|
|
||||||
{
|
|
||||||
static const iomux_v3_cfg_t sd1_pads[] = {
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_SD1_CMD__ESDHC1_CMD, SD_CMD_PAD_CTRL),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_SD1_CLK__ESDHC1_CLK, SD_PAD_CTRL),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA0__ESDHC1_DAT0, SD_PAD_CTRL),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA1__ESDHC1_DAT1, SD_PAD_CTRL),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA2__ESDHC1_DAT2, SD_PAD_CTRL),
|
|
||||||
NEW_PAD_CTRL(MX53_PAD_SD1_DATA3__ESDHC1_DAT3, SD_PAD_CTRL),
|
|
||||||
MX53_PAD_EIM_DA13__GPIO3_13,
|
|
||||||
};
|
|
||||||
|
|
||||||
u32 index;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
esdhc_cfg[0].sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK);
|
|
||||||
|
|
||||||
for (index = 0; index < CONFIG_SYS_FSL_ESDHC_NUM; index++) {
|
|
||||||
switch (index) {
|
|
||||||
case 0:
|
|
||||||
imx_iomux_v3_setup_multiple_pads(sd1_pads,
|
|
||||||
ARRAY_SIZE(sd1_pads));
|
|
||||||
break;
|
|
||||||
|
|
||||||
default:
|
|
||||||
printf("Warning: you configured more ESDHC controller"
|
|
||||||
"(%d) as supported by the board(1)\n",
|
|
||||||
CONFIG_SYS_FSL_ESDHC_NUM);
|
|
||||||
return -EINVAL;
|
|
||||||
}
|
|
||||||
ret = fsl_esdhc_initialize(bis, &esdhc_cfg[index]);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
#endif
|
|
||||||
|
|
||||||
int board_early_init_f(void)
|
|
||||||
{
|
|
||||||
setup_iomux_uart();
|
|
||||||
setup_iomux_fec();
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int board_init(void)
|
|
||||||
{
|
|
||||||
/* address of boot parameters */
|
|
||||||
gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x100;
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
int checkboard(void)
|
|
||||||
{
|
|
||||||
puts("Board: MX53SMD\n");
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
@ -1,25 +0,0 @@
|
|||||||
CONFIG_ARM=y
|
|
||||||
CONFIG_ARCH_MX5=y
|
|
||||||
CONFIG_SYS_TEXT_BASE=0x77800000
|
|
||||||
CONFIG_NR_DRAM_BANKS=2
|
|
||||||
CONFIG_ENV_SIZE=0x2000
|
|
||||||
CONFIG_ENV_OFFSET=0x60000
|
|
||||||
CONFIG_TARGET_MX53SMD=y
|
|
||||||
# CONFIG_CMD_BMODE is not set
|
|
||||||
CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=board/freescale/mx53smd/imximage.cfg"
|
|
||||||
CONFIG_HUSH_PARSER=y
|
|
||||||
CONFIG_CMD_I2C=y
|
|
||||||
CONFIG_CMD_MMC=y
|
|
||||||
# CONFIG_CMD_SETEXPR is not set
|
|
||||||
CONFIG_CMD_DHCP=y
|
|
||||||
CONFIG_CMD_MII=y
|
|
||||||
CONFIG_CMD_PING=y
|
|
||||||
CONFIG_CMD_FAT=y
|
|
||||||
CONFIG_ENV_OVERWRITE=y
|
|
||||||
CONFIG_ENV_IS_IN_MMC=y
|
|
||||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
|
||||||
CONFIG_FSL_ESDHC_IMX=y
|
|
||||||
CONFIG_MTD=y
|
|
||||||
CONFIG_MII=y
|
|
||||||
CONFIG_MXC_UART=y
|
|
||||||
CONFIG_OF_LIBFDT=y
|
|
@ -1,111 +0,0 @@
|
|||||||
/* SPDX-License-Identifier: GPL-2.0+ */
|
|
||||||
/*
|
|
||||||
* Copyright (C) 2011 Freescale Semiconductor, Inc.
|
|
||||||
*
|
|
||||||
* Configuration settings for the MX53SMD Freescale board.
|
|
||||||
*/
|
|
||||||
|
|
||||||
#ifndef __CONFIG_H
|
|
||||||
#define __CONFIG_H
|
|
||||||
|
|
||||||
#define CONFIG_MACH_TYPE MACH_TYPE_MX53_SMD
|
|
||||||
|
|
||||||
#include <asm/arch/imx-regs.h>
|
|
||||||
|
|
||||||
#define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
|
|
||||||
#define CONFIG_SETUP_MEMORY_TAGS
|
|
||||||
#define CONFIG_INITRD_TAG
|
|
||||||
#define CONFIG_REVISION_TAG
|
|
||||||
|
|
||||||
#define CONFIG_SYS_FSL_CLK
|
|
||||||
|
|
||||||
/* Size of malloc() pool */
|
|
||||||
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
|
|
||||||
|
|
||||||
#define CONFIG_MXC_UART_BASE UART1_BASE
|
|
||||||
|
|
||||||
/* I2C Configs */
|
|
||||||
#define CONFIG_SYS_I2C
|
|
||||||
#define CONFIG_SYS_I2C_MXC
|
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
|
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
|
|
||||||
#define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */
|
|
||||||
|
|
||||||
/* MMC Configs */
|
|
||||||
#define CONFIG_SYS_FSL_ESDHC_ADDR 0
|
|
||||||
#define CONFIG_SYS_FSL_ESDHC_NUM 1
|
|
||||||
|
|
||||||
/* Eth Configs */
|
|
||||||
#define CONFIG_HAS_ETH1
|
|
||||||
|
|
||||||
#define CONFIG_FEC_MXC
|
|
||||||
#define IMX_FEC_BASE FEC_BASE_ADDR
|
|
||||||
#define CONFIG_FEC_MXC_PHYADDR 0x1F
|
|
||||||
|
|
||||||
/* Command definition */
|
|
||||||
|
|
||||||
#define CONFIG_ETHPRIME "FEC0"
|
|
||||||
|
|
||||||
#define CONFIG_LOADADDR 0x70800000 /* loadaddr env var */
|
|
||||||
|
|
||||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
|
||||||
"script=boot.scr\0" \
|
|
||||||
"uimage=uImage\0" \
|
|
||||||
"mmcdev=0\0" \
|
|
||||||
"mmcpart=2\0" \
|
|
||||||
"mmcroot=/dev/mmcblk0p3 rw\0" \
|
|
||||||
"mmcrootfstype=ext3 rootwait\0" \
|
|
||||||
"mmcargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
|
||||||
"root=${mmcroot} " \
|
|
||||||
"rootfstype=${mmcrootfstype}\0" \
|
|
||||||
"loadbootscript=" \
|
|
||||||
"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
|
|
||||||
"bootscript=echo Running bootscript from mmc ...; " \
|
|
||||||
"source\0" \
|
|
||||||
"loaduimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${uimage}\0" \
|
|
||||||
"mmcboot=echo Booting from mmc ...; " \
|
|
||||||
"run mmcargs; " \
|
|
||||||
"bootm\0" \
|
|
||||||
"netargs=setenv bootargs console=ttymxc0,${baudrate} " \
|
|
||||||
"root=/dev/nfs " \
|
|
||||||
"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
|
|
||||||
"netboot=echo Booting from net ...; " \
|
|
||||||
"run netargs; " \
|
|
||||||
"dhcp ${uimage}; bootm\0" \
|
|
||||||
|
|
||||||
#define CONFIG_BOOTCOMMAND \
|
|
||||||
"mmc dev ${mmcdev}; if mmc rescan; then " \
|
|
||||||
"if run loadbootscript; then " \
|
|
||||||
"run bootscript; " \
|
|
||||||
"else " \
|
|
||||||
"if run loaduimage; then " \
|
|
||||||
"run mmcboot; " \
|
|
||||||
"else run netboot; " \
|
|
||||||
"fi; " \
|
|
||||||
"fi; " \
|
|
||||||
"else run netboot; fi"
|
|
||||||
#define CONFIG_ARP_TIMEOUT 200UL
|
|
||||||
|
|
||||||
/* Miscellaneous configurable options */
|
|
||||||
|
|
||||||
#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
|
|
||||||
|
|
||||||
/* Physical Memory Map */
|
|
||||||
#define PHYS_SDRAM_1 CSD0_BASE_ADDR
|
|
||||||
#define PHYS_SDRAM_1_SIZE (512 * 1024 * 1024)
|
|
||||||
#define PHYS_SDRAM_2 CSD1_BASE_ADDR
|
|
||||||
#define PHYS_SDRAM_2_SIZE (512 * 1024 * 1024)
|
|
||||||
#define PHYS_SDRAM_SIZE (PHYS_SDRAM_1_SIZE + PHYS_SDRAM_2_SIZE)
|
|
||||||
|
|
||||||
#define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
|
|
||||||
#define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR)
|
|
||||||
#define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE)
|
|
||||||
|
|
||||||
#define CONFIG_SYS_INIT_SP_OFFSET \
|
|
||||||
(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
|
|
||||||
#define CONFIG_SYS_INIT_SP_ADDR \
|
|
||||||
(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
|
|
||||||
|
|
||||||
/* environment organization */
|
|
||||||
|
|
||||||
#endif /* __CONFIG_H */
|
|
Loading…
Reference in New Issue
Block a user