mmc: mtk-sd: increase the minimum bus frequency
With a 48MHz input clock, the lowest bus frequency can be as low as 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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@ -232,6 +232,8 @@
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#define SCLK_CYCLES_SHIFT 20
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#define MIN_BUS_CLK 200000
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#define CMD_INTS_MASK \
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(MSDC_INT_CMDRDY | MSDC_INT_RSPCRCERR | MSDC_INT_CMDTMO)
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@ -1639,6 +1641,9 @@ static int msdc_drv_probe(struct udevice *dev)
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else
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cfg->f_min = host->src_clk_freq / (4 * 4095);
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if (cfg->f_min < MIN_BUS_CLK)
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cfg->f_min = MIN_BUS_CLK;
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if (cfg->f_max < cfg->f_min || cfg->f_max > host->src_clk_freq)
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cfg->f_max = host->src_clk_freq;
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