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powerpc: P1013: Drop configuration for P1013 

P1013 is a single-core version of P1022. There is no P1022 target
configured. Drop related macros. P1022 SoC is still supported.

Signed-off-by: York Sun <york.sun@nxp.com>
This commit is contained in:
York Sun 2016-11-16 16:00:08 -08:00
parent 83b9bea116
commit 2f8b81268a
4 changed files with 3 additions and 21 deletions
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1
arch/powerpc/cpu/mpc85xx/Makefile
View File

@ -74,7 +74,6 @@ obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o
obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o
obj-$(CONFIG_P1013) += p1022_serdes.o
obj-$(CONFIG_P1014) += p1010_serdes.o
obj-$(CONFIG_P1017) += p1023_serdes.o
obj-$(CONFIG_P1020) += p1021_serdes.o

15
arch/powerpc/include/asm/config_mpc85xx.h
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@ -183,21 +183,6 @@
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A005125
/* P1013 is single core version of P1022 */
#elif defined(CONFIG_P1013)
#define CONFIG_MAX_CPUS 1
#define CONFIG_SYS_FSL_NUM_LAWS 12
#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
#define CONFIG_TSECV2
#define CONFIG_SYS_FSL_SEC_COMPAT 2
#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
#define CONFIG_FSL_SATA_ERRATUM_A001
#define CONFIG_SYS_FSL_ERRATUM_A004508
#define CONFIG_SYS_FSL_ERRATUM_A005125
#elif defined(CONFIG_P1014)
#define CONFIG_MAX_CPUS 1
#define CONFIG_FSL_SDHC_V2_3

6
arch/powerpc/include/asm/immap_85xx.h
View File

@ -2162,7 +2162,7 @@ typedef struct ccsr_gur {
#define MPC85xx_PORDEVSR_SGMII4_DIS 0x04000000
#define MPC85xx_PORDEVSR_SRDS2_IO_SEL 0x38000000
#define MPC85xx_PORDEVSR_PCI1 0x00800000
#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022)
#if defined(CONFIG_ARCH_P1022)
#define MPC85xx_PORDEVSR_IO_SEL 0x007c0000
#define MPC85xx_PORDEVSR_IO_SEL_SHIFT 18
#elif defined(CONFIG_P1017) || defined(CONFIG_ARCH_P1023)
@ -2290,7 +2290,7 @@ typedef struct ccsr_gur {
#define MPC85xx_PMUXCR_QE11 0x00000010
#define MPC85xx_PMUXCR_QE12 0x00000008
#endif
#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022)
#if defined(CONFIG_ARCH_P1022)
#define MPC85xx_PMUXCR_TDM_MASK 0x0001cc00
#define MPC85xx_PMUXCR_TDM 0x00014800
#define MPC85xx_PMUXCR_SPI_MASK 0x00600000
@ -2375,7 +2375,7 @@ typedef struct ccsr_gur {
#define MPC85xx_PMUXCR2_DEBUG_MUX_SEL_USBPHY 0x00002000
#define MPC85xx_PMUXCR2_PLL_LKDT_EXPOSE 0x00001000
#endif
#if defined(CONFIG_P1013) || defined(CONFIG_ARCH_P1022)
#if defined(CONFIG_ARCH_P1022)
#define MPC85xx_PMUXCR2_ETSECUSB_MASK 0x001f8000
#define MPC85xx_PMUXCR2_USB 0x00150000
#endif

2
doc/README.mpc85xx-sd-spi-boot
View File

@ -70,9 +70,7 @@ P1010RDB config_ddr3_1gb_p1010rdb_800M.dat
P1014RDB config_ddr3_1gb_p1014rdb_800M.dat
P1021RDB config_ddr3_1gb_p1_p2_rdb_pc_800M.dat
P1022DS config_ddr3_2gb_p1022ds.dat
P1013DS config_ddr3_2gb_p1022ds.dat
P1024RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1013RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1025RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1016RDB config_ddr3_1gb_p1_p2_rdb_pc_667M.dat
P1020UTM config_ddr3_1gb_p1_p2_rdb_pc_800M.dat