ARM: dts: k3-j721e: Add OSPI DT nodes
Add OSPI DT nodes to enable OSPI at U-Boot prompt and also to support OSPI boot. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
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9e9dfc1fc4
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224d7fe263
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@ -349,3 +349,19 @@
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&exp2 {
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u-boot,dm-spl;
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};
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&mcu_fss0_ospi0_pins_default {
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u-boot,dm-spl;
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};
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&fss {
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u-boot,dm-spl;
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};
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&ospi0 {
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u-boot,dm-spl;
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flash@0 {
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u-boot,dm-spl;
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};
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};
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@ -123,6 +123,19 @@
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J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
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>;
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};
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mcu_fss0_ospi1_pins_default: mcu-fss0-ospi1-pins-default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x34, PIN_OUTPUT, 0) /* (F22) MCU_OSPI1_CLK */
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J721E_WKUP_IOPAD(0x50, PIN_OUTPUT, 0) /* (C22) MCU_OSPI1_CSn0 */
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J721E_WKUP_IOPAD(0x40, PIN_INPUT, 0) /* (D22) MCU_OSPI1_D0 */
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J721E_WKUP_IOPAD(0x44, PIN_INPUT, 0) /* (G22) MCU_OSPI1_D1 */
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J721E_WKUP_IOPAD(0x48, PIN_INPUT, 0) /* (D23) MCU_OSPI1_D2 */
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J721E_WKUP_IOPAD(0x4c, PIN_INPUT, 0) /* (C23) MCU_OSPI1_D3 */
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J721E_WKUP_IOPAD(0x3c, PIN_INPUT, 0) /* (B23) MCU_OSPI1_DQS */
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J721E_WKUP_IOPAD(0x38, PIN_INPUT, 0) /* (A23) MCU_OSPI1_LBCLKO */
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>;
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};
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};
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&usbss0 {
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@ -172,3 +185,23 @@
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#gpio-cells = <2>;
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};
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};
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&ospi1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_fss0_ospi1_pins_default>;
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flash@0{
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <4>;
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spi-max-frequency = <40000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <2>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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@ -143,6 +143,37 @@
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assigned-clocks = <&k3_clks 102 0>;
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assigned-clock-rates = <250000000>;
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};
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ospi0: spi@47040000 {
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compatible = "ti,am654-ospi";
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reg = <0x0 0x47040000 0x0 0x100>,
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<0x5 0x00000000 0x1 0x0000000>;
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interrupts = <GIC_SPI 840 IRQ_TYPE_LEVEL_HIGH>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x0>;
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clocks = <&k3_clks 103 0>;
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assigned-clocks = <&k3_clks 103 0>;
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assigned-clock-parents = <&k3_clks 103 2>;
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assigned-clock-rates = <166666666>;
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power-domains = <&k3_pds 103 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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ospi1: spi@47050000 {
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compatible = "ti,am654-ospi";
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reg = <0x0 0x47050000 0x0 0x100>,
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<0x7 0x00000000 0x1 0x00000000>;
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interrupts = <GIC_SPI 841 IRQ_TYPE_LEVEL_HIGH>;
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cdns,fifo-depth = <256>;
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cdns,fifo-width = <4>;
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cdns,trigger-address = <0x0>;
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clocks = <&k3_clks 104 0>;
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power-domains = <&k3_pds 104 TI_SCI_PD_EXCLUSIVE>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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};
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mcu_i2c0: i2c@40b00000 {
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@ -107,6 +107,22 @@
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J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
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>;
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};
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mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
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J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
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J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
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J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
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J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
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J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
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J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
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J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
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J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
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J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
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J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
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>;
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};
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};
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&main_pmx0 {
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@ -256,4 +272,27 @@
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};
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};
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
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reg = <0x0 0x47040000 0x0 0x100>,
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<0x0 0x50000000 0x0 0x8000000>;
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flash@0{
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <40000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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#include "k3-j721e-common-proc-board-u-boot.dtsi"
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@ -47,6 +47,22 @@
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J721E_WKUP_IOPAD(0x28, PIN_INPUT, 1) /* (G21) MCU_OSPI0_D7.MCU_HYPERBUS0_DQ7 */
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>;
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};
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mcu_fss0_ospi0_pins_default: mcu-fss0-ospi0-pins-default {
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pinctrl-single,pins = <
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J721E_WKUP_IOPAD(0x0000, PIN_OUTPUT, 0) /* MCU_OSPI0_CLK */
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J721E_WKUP_IOPAD(0x0008, PIN_INPUT, 0) /* MCU_OSPI0_DQS */
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J721E_WKUP_IOPAD(0x000c, PIN_INPUT, 0) /* MCU_OSPI0_D0 */
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J721E_WKUP_IOPAD(0x0010, PIN_INPUT, 0) /* MCU_OSPI0_D1 */
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J721E_WKUP_IOPAD(0x0014, PIN_INPUT, 0) /* MCU_OSPI0_D2 */
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J721E_WKUP_IOPAD(0x0018, PIN_INPUT, 0) /* MCU_OSPI0_D3 */
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J721E_WKUP_IOPAD(0x001c, PIN_INPUT, 0) /* MCU_OSPI0_D4 */
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J721E_WKUP_IOPAD(0x0020, PIN_INPUT, 0) /* MCU_OSPI0_D5 */
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J721E_WKUP_IOPAD(0x0024, PIN_INPUT, 0) /* MCU_OSPI0_D6 */
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J721E_WKUP_IOPAD(0x0028, PIN_INPUT, 0) /* MCU_OSPI0_D7 */
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J721E_WKUP_IOPAD(0x002c, PIN_OUTPUT, 0) /* MCU_OSPI0_CSn0 */
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>;
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};
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};
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&hbmc {
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@ -61,3 +77,23 @@
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reg = <0x0 0x0 0x4000000>;
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};
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};
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&ospi0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcu_fss0_ospi0_pins_default>;
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flash@0{
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compatible = "jedec,spi-nor";
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reg = <0x0>;
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spi-tx-bus-width = <1>;
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spi-rx-bus-width = <8>;
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spi-max-frequency = <40000000>;
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cdns,tshsl-ns = <60>;
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cdns,tsd2d-ns = <60>;
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cdns,tchsh-ns = <60>;
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cdns,tslch-ns = <60>;
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cdns,read-delay = <0>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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@ -40,6 +40,8 @@
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i2c7 = &main_i2c4;
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i2c8 = &main_i2c5;
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i2c9 = &main_i2c6;
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spi0 = &ospi0;
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spi1 = &ospi1;
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};
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chosen { };
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