Merge tag '2020-01-20-ti-2020.04' of https://gitlab.denx.de/u-boot/custodians/u-boot-ti
K3 J721E: * DMA support. * MMC and ADMA support. * EEPROM support. * J721e High Security EVM support. * USB DT nodes K3 AM654: * Fixed boot due to pmic probe error. * USB support and DT nodes. * ADMA support DRA7xx/AM57xx: * BBAI board support * Clean up of net platform code under board/ti AM33/AM43/Davinci: * Reduce SPL size for omap3 boards. * SPL DT support for da850-lcdk * PLL divider fix for AM335x
This commit is contained in:
Tom Rini
commit
07add22cab
|
|
@ -394,7 +394,7 @@ F: arch/arm/mach-tegra/
|
|||
F: arch/arm/include/asm/arch-tegra*/
|
||||
|
||||
ARM TI
|
||||
M: Tom Rini <trini@konsulko.com>
|
||||
M: Lokesh Vutla <lokeshvutla@ti.com>
|
||||
S: Maintained
|
||||
T: git https://gitlab.denx.de/u-boot/custodians/u-boot-ti.git
|
||||
F: arch/arm/mach-davinci/
|
||||
|
|
@ -848,6 +848,8 @@ F: configs/k2g_hs_evm_defconfig
|
|||
F: configs/k2l_hs_evm_defconfig
|
||||
F: configs/am65x_hs_evm_r5_defconfig
|
||||
F: configs/am65x_hs_evm_a53_defconfig
|
||||
F: configs/j721e_hs_evm_r5_defconfig
|
||||
F: configs/j721e_hs_evm_a72_defconfig
|
||||
|
||||
TQ GROUP
|
||||
#M: Martin Krause <martin.krause@tq-systems.de>
|
||||
|
|
|
|||
|
|
@ -353,6 +353,7 @@ dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
|
|||
dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
|
||||
am57xx-beagle-x15-revb1.dtb \
|
||||
am57xx-beagle-x15-revc.dtb \
|
||||
am5729-beagleboneai.dtb \
|
||||
am574x-idk.dtb \
|
||||
am572x-idk.dtb \
|
||||
am571x-idk.dtb
|
||||
|
|
|
|||
|
|
@ -0,0 +1,576 @@
|
|||
// SPDX-License-Identifier: GPL-2.0
|
||||
/*
|
||||
* Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
#include "dra74x.dtsi"
|
||||
#include "dra74x-mmc-iodelay.dtsi"
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
#include <dt-bindings/interrupt-controller/irq.h>
|
||||
#include <dt-bindings/pinctrl/dra.h>
|
||||
|
||||
/ {
|
||||
model = "BeagleBoard.org BeagleBone AI";
|
||||
compatible = "beagle,am5729-beagleboneai", "ti,am5728",
|
||||
"ti,dra742", "ti,dra74", "ti,dra7";
|
||||
|
||||
aliases {
|
||||
rtc0 = &tps659038_rtc;
|
||||
rtc1 = &rtc;
|
||||
display0 = &hdmi_conn;
|
||||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = &uart1;
|
||||
};
|
||||
|
||||
memory@0 {
|
||||
device_type = "memory";
|
||||
reg = <0x0 0x80000000 0x0 0x40000000>;
|
||||
};
|
||||
|
||||
vdd_adc: gpioregulator-vdd_adc {
|
||||
compatible = "regulator-gpio";
|
||||
regulator-name = "vdd_adc";
|
||||
vin-supply = <&vdd_5v>;
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
|
||||
states = <1800000 0
|
||||
3300000 1>;
|
||||
};
|
||||
|
||||
vdd_5v: fixedregulator-vdd_5v {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vdd_5v";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vtt_fixed: fixedregulator-vtt {
|
||||
/* TPS51200 */
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vtt_fixed";
|
||||
vin-supply = <&vdd_ddr>;
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
label = "beaglebone:green:usr0";
|
||||
gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "heartbeat";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "beaglebone:green:usr1";
|
||||
gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc0";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "beaglebone:green:usr2";
|
||||
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "cpu";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led3 {
|
||||
label = "beaglebone:green:usr3";
|
||||
gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "mmc1";
|
||||
default-state = "off";
|
||||
};
|
||||
|
||||
led4 {
|
||||
label = "beaglebone:green:usr4";
|
||||
gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "netdev";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_conn: connector@0 {
|
||||
compatible = "hdmi-connector";
|
||||
label = "hdmi";
|
||||
type = "a";
|
||||
|
||||
port {
|
||||
hdmi_connector_in: endpoint {
|
||||
remote-endpoint = <&hdmi_encoder_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
hdmi_enc: encoder@0 {
|
||||
/* "ti,tpd12s016" software compatible with "ti,tpd12s015"
|
||||
* no need for individual driver
|
||||
*/
|
||||
compatible = "ti,tpd12s015";
|
||||
gpios = <0>,
|
||||
<0>,
|
||||
<&gpio7 12 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
ports {
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0x0>;
|
||||
|
||||
hdmi_encoder_in: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_out>;
|
||||
};
|
||||
};
|
||||
|
||||
port@1 {
|
||||
reg = <0x1>;
|
||||
|
||||
hdmi_encoder_out: endpoint@0 {
|
||||
remote-endpoint = <&hdmi_connector_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
emmc_pwrseq: emmc_pwrseq {
|
||||
compatible = "mmc-pwrseq-emmc";
|
||||
reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
|
||||
};
|
||||
|
||||
brcmf_pwrseq: brcmf_pwrseq {
|
||||
compatible = "mmc-pwrseq-simple";
|
||||
reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>, /* BT-REG-ON */
|
||||
<&gpio3 18 GPIO_ACTIVE_LOW>; /* WL-REG-ON */
|
||||
};
|
||||
|
||||
extcon_usb1: extcon_usb1 {
|
||||
compatible = "linux,extcon-usb-gpio";
|
||||
ti,enable-id-detection;
|
||||
id-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
status = "okay";
|
||||
clock-frequency = <400000>;
|
||||
|
||||
tps659038: tps659038@58 {
|
||||
compatible = "ti,tps659038";
|
||||
reg = <0x58>;
|
||||
interrupt-parent = <&gpio6>;
|
||||
interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
|
||||
|
||||
#interrupt-cells = <2>;
|
||||
interrupt-controller;
|
||||
|
||||
ti,system-power-controller;
|
||||
ti,palmas-override-powerhold;
|
||||
|
||||
tps659038_pmic {
|
||||
compatible = "ti,tps659038-pmic";
|
||||
|
||||
smps12-in-supply = <&vdd_5v>;
|
||||
smps3-in-supply = <&vdd_5v>;
|
||||
smps45-in-supply = <&vdd_5v>;
|
||||
smps6-in-supply = <&vdd_5v>;
|
||||
smps7-in-supply = <&vdd_5v>;
|
||||
mps3-in-supply = <&vdd_5v>;
|
||||
smps8-in-supply = <&vdd_5v>;
|
||||
smps9-in-supply = <&vdd_5v>;
|
||||
ldo1-in-supply = <&vdd_5v>;
|
||||
ldo2-in-supply = <&vdd_5v>;
|
||||
ldo3-in-supply = <&vdd_5v>;
|
||||
ldo4-in-supply = <&vdd_5v>;
|
||||
ldo9-in-supply = <&vdd_5v>;
|
||||
ldoln-in-supply = <&vdd_5v>;
|
||||
ldousb-in-supply = <&vdd_5v>;
|
||||
ldortc-in-supply = <&vdd_5v>;
|
||||
|
||||
regulators {
|
||||
vdd_mpu: smps12 {
|
||||
/* VDD_MPU */
|
||||
regulator-name = "smps12";
|
||||
regulator-min-microvolt = <850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_ddr: smps3 {
|
||||
/* VDD_DDR EMIF1 EMIF2 */
|
||||
regulator-name = "smps3";
|
||||
regulator-min-microvolt = <1350000>;
|
||||
regulator-max-microvolt = <1350000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_dspeve: smps45 {
|
||||
/* VDD_DSPEVE on AM572 */
|
||||
regulator-name = "smps45";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_gpu: smps6 {
|
||||
/* VDD_GPU */
|
||||
regulator-name = "smps6";
|
||||
regulator-min-microvolt = < 850000>;
|
||||
regulator-max-microvolt = <1250000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_core: smps7 {
|
||||
/* VDD_CORE */
|
||||
regulator-name = "smps7";
|
||||
regulator-min-microvolt = < 850000>; /*** 1.15V */
|
||||
regulator-max-microvolt = <1150000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_iva: smps8 {
|
||||
/* VDD_IVAHD */ /*** 1.06V */
|
||||
regulator-name = "smps8";
|
||||
};
|
||||
|
||||
vdd_3v3: smps9 {
|
||||
/* VDD_3V3 */
|
||||
regulator-name = "smps9";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_sd: ldo1 {
|
||||
/* VDDSHV8 - VSDMMC */
|
||||
regulator-name = "ldo1";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
vdd_1v8: ldo2 {
|
||||
/* VDDSH18V */
|
||||
regulator-name = "ldo2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_1v8_phy_ldo3: ldo3 {
|
||||
/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
|
||||
regulator-name = "ldo3";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_1v8_phy_ldo4: ldo4 {
|
||||
/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
|
||||
regulator-name = "ldo4";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
/* LDO5-8 unused */
|
||||
|
||||
vdd_rtc: ldo9 {
|
||||
/* VDD_RTC */
|
||||
regulator-name = "ldo9";
|
||||
regulator-min-microvolt = < 840000>;
|
||||
regulator-max-microvolt = <1160000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
vdd_1v8_pll: ldoln {
|
||||
/* VDDA_1V8_PLL */
|
||||
regulator-name = "ldoln";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldousb_reg: ldousb {
|
||||
/* VDDA_3V_USB: VDDA_USBHS33 */
|
||||
regulator-name = "ldousb";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldortc_reg: ldortc {
|
||||
/* VDDA_RTC */
|
||||
regulator-name = "ldortc";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
regen1: regen1 {
|
||||
/* VDD_3V3_ON */
|
||||
regulator-name = "regen1";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
regen2: regen2 {
|
||||
/* Needed for PMIC internal resource */
|
||||
regulator-name = "regen2";
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
tps659038_rtc: tps659038_rtc {
|
||||
compatible = "ti,palmas-rtc";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
};
|
||||
|
||||
tps659038_pwr_button: tps659038_pwr_button {
|
||||
compatible = "ti,palmas-pwrbutton";
|
||||
interrupt-parent = <&tps659038>;
|
||||
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
|
||||
wakeup-source;
|
||||
ti,palmas-long-press-seconds = <12>;
|
||||
};
|
||||
|
||||
tps659038_gpio: tps659038_gpio {
|
||||
compatible = "ti,palmas-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi3 {
|
||||
status = "okay";
|
||||
ti,pindir-d0-out-d1-in;
|
||||
|
||||
sn65hvs882: sn65hvs882@0 {
|
||||
compatible = "pisosr-gpio";
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
|
||||
reg = <0>;
|
||||
spi-max-frequency = <1000000>;
|
||||
spi-cpol;
|
||||
};
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
vdd-supply = <&vdd_mpu>;
|
||||
voltage-tolerance = <1>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
|
||||
reset-delay-us = <2>;
|
||||
|
||||
phy0: ethernet-phy@1 {
|
||||
reg = <4>;
|
||||
eee-broken-100tx;
|
||||
eee-broken-1000t;
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
slaves = <1>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy-handle = <&phy0>;
|
||||
phy-mode = "rgmii";
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
vqmmc-supply = <&vdd_sd>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins_default>;
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vdd_1v8>;
|
||||
vqmmc-supply = <&vdd_1v8>;
|
||||
bus-width = <8>;
|
||||
ti,non-removable;
|
||||
non-removable;
|
||||
mmc-pwrseq = <&emmc_pwrseq>;
|
||||
|
||||
ti,needs-special-reset;
|
||||
dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
|
||||
dma-names = "tx", "rx";
|
||||
|
||||
pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
|
||||
pinctrl-0 = <&mmc2_pins_default>;
|
||||
pinctrl-1 = <&mmc2_pins_hs>;
|
||||
pinctrl-2 = <&mmc2_pins_ddr_rev20>;
|
||||
pinctrl-3 = <&mmc2_pins_hs200>;
|
||||
|
||||
};
|
||||
|
||||
&mmc4 {
|
||||
/* DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3 V signaling). */
|
||||
/* HS: High speed up to 50 MHz (3.3 V signaling). */
|
||||
/* SDR12: SDR up to 25 MHz (1.8 V signaling). */
|
||||
/* SDR25: SDR up to 50 MHz (1.8 V signaling). */
|
||||
/* SDR50: SDR up to 100 MHz (1.8 V signaling). */
|
||||
/* SDR104: SDR up to 208 MHz (1.8 V signaling) */
|
||||
/* DDR50: DDR up to 50 MHz (1.8 V signaling). */
|
||||
status = "okay";
|
||||
|
||||
ti,needs-special-reset;
|
||||
vmmc-supply = <&vdd_3v3>;
|
||||
cap-power-off-card;
|
||||
keep-power-in-suspend;
|
||||
bus-width = <4>;
|
||||
ti,non-removable;
|
||||
non-removable;
|
||||
no-1-8-v;
|
||||
max-frequency = <24000000>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
mmc-pwrseq = <&brcmf_pwrseq>;
|
||||
|
||||
brcmf: wifi@1 {
|
||||
status = "okay";
|
||||
reg = <1>;
|
||||
compatible = "brcm,bcm4329-fmac";
|
||||
|
||||
brcm,sd-head-align = <4>;
|
||||
brcm,sd_head_align = <4>;
|
||||
brcm,sd_sgentry_align = <512>;
|
||||
|
||||
interrupt-parent = <&gpio3>;
|
||||
interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
|
||||
interrupt-names = "host-wake";
|
||||
};
|
||||
};
|
||||
|
||||
&usb2_phy1 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb2_phy2 {
|
||||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
status = "okay";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
&omap_dwc3_1 {
|
||||
extcon = <&extcon_usb1>;
|
||||
};
|
||||
|
||||
&usb2 {
|
||||
status = "okay";
|
||||
dr_mode = "host";
|
||||
};
|
||||
|
||||
&dss {
|
||||
status = "okay";
|
||||
vdda_video-supply = <&vdd_1v8_pll>;
|
||||
};
|
||||
|
||||
&hdmi {
|
||||
status = "okay";
|
||||
vdda-supply = <&vdd_1v8_phy_ldo4>;
|
||||
|
||||
port {
|
||||
hdmi_out: endpoint {
|
||||
remote-endpoint = <&hdmi_encoder_in>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&bandgap {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpu_alert0 {
|
||||
temperature = <55000>; /* milliCelsius */
|
||||
};
|
||||
|
||||
&cpu_crit {
|
||||
temperature = <85000>; /* milliCelsius */
|
||||
};
|
||||
|
||||
&gpu_crit {
|
||||
temperature = <85000>; /* milliCelsius */
|
||||
};
|
||||
|
||||
&core_crit {
|
||||
temperature = <85000>; /* milliCelsius */
|
||||
};
|
||||
|
||||
&dspeve_crit {
|
||||
temperature = <85000>; /* milliCelsius */
|
||||
};
|
||||
|
||||
&iva_crit {
|
||||
temperature = <85000>; /* milliCelsius */
|
||||
};
|
||||
|
||||
&sata {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&sata_phy {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
/* bluetooth */
|
||||
&uart6 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
/* cape header stuff */
|
||||
&i2c4 {
|
||||
status = "okay";
|
||||
clock-frequency = <100000>;
|
||||
};
|
||||
|
||||
#include "omap5-u-boot.dtsi"
|
||||
|
|
@ -8,9 +8,23 @@
|
|||
/ {
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
mmc0 = &mmc0;
|
||||
serial2 = &serial2;
|
||||
};
|
||||
|
||||
soc@1c00000 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
nand {
|
||||
compatible = "ti,davinci-nand";
|
||||
};
|
||||
};
|
||||
|
||||
&mmc0 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&serial2 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@
|
|||
};
|
||||
|
||||
chosen {
|
||||
stdout-path = "serial2:115200n8";
|
||||
stdout-path = &serial2;
|
||||
};
|
||||
|
||||
memory@c0000000 {
|
||||
|
|
|
|||
|
|
@ -251,4 +251,82 @@
|
|||
interrupts = <GIC_SPI 328 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
};
|
||||
|
||||
dwc3_0: dwc3@4000000 {
|
||||
compatible = "ti,am654-dwc3";
|
||||
reg = <0x0 0x4000000 0x0 0x4000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x4000000 0x20000>;
|
||||
interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
power-domains = <&k3_pds 151 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 151 2>, <&k3_clks 151 7>;
|
||||
assigned-clock-parents = <&k3_clks 151 4>, /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
|
||||
<&k3_clks 151 9>; /* set PIPE3_TXB_CLK to CLK_12M_RC/256 (for HS only) */
|
||||
|
||||
usb0: usb@10000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x10000 0x10000>;
|
||||
interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "peripheral",
|
||||
"host",
|
||||
"otg";
|
||||
maximum-speed = "high-speed";
|
||||
dr_mode = "otg";
|
||||
phys = <&usb0_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
snps,dis_u3_susphy_quirk;
|
||||
};
|
||||
};
|
||||
|
||||
usb0_phy: phy@4100000 {
|
||||
compatible = "ti,am654-usb2", "ti,omap-usb2";
|
||||
reg = <0x0 0x4100000 0x0 0x54>;
|
||||
syscon-phy-power = <&scm_conf 0x4000>;
|
||||
clocks = <&k3_clks 151 0>, <&k3_clks 151 1>;
|
||||
clock-names = "wkupclk", "refclk";
|
||||
#phy-cells = <0>;
|
||||
ti,dis-chg-det-quirk;
|
||||
};
|
||||
|
||||
dwc3_1: dwc3@4020000 {
|
||||
compatible = "ti,am654-dwc3";
|
||||
reg = <0x0 0x4020000 0x0 0x4000>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0x0 0x0 0x4020000 0x20000>;
|
||||
interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dma-coherent;
|
||||
power-domains = <&k3_pds 152 TI_SCI_PD_EXCLUSIVE>;
|
||||
assigned-clocks = <&k3_clks 152 2>;
|
||||
assigned-clock-parents = <&k3_clks 152 4>; /* set REF_CLK to 20MHz i.e. PER0_PLL/48 */
|
||||
|
||||
usb1: usb@10000 {
|
||||
compatible = "snps,dwc3";
|
||||
reg = <0x10000 0x10000>;
|
||||
interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-names = "peripheral",
|
||||
"host",
|
||||
"otg";
|
||||
maximum-speed = "high-speed";
|
||||
dr_mode = "otg";
|
||||
phys = <&usb1_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
};
|
||||
};
|
||||
|
||||
usb1_phy: phy@4110000 {
|
||||
compatible = "ti,am654-usb2", "ti,omap-usb2";
|
||||
reg = <0x0 0x4110000 0x0 0x54>;
|
||||
syscon-phy-power = <&scm_conf 0x4020>;
|
||||
clocks = <&k3_clks 152 0>, <&k3_clks 152 1>;
|
||||
clock-names = "wkupclk", "refclk";
|
||||
#phy-cells = <0>;
|
||||
ti,dis-chg-det-quirk;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -25,7 +25,8 @@
|
|||
compatible = "ti,am654-sdhci-5.1";
|
||||
reg = <0x0 0x4FA0000 0x0 0x1000>,
|
||||
<0x0 0x4FB0000 0x0 0x400>;
|
||||
clocks = <&k3_clks 48 1>;
|
||||
clocks =<&k3_clks 48 0>, <&k3_clks 48 1>;
|
||||
clock-names = "clk_ahb", "clk_xin";
|
||||
power-domains = <&k3_pds 48 TI_SCI_PD_EXCLUSIVE>;
|
||||
max-frequency = <25000000>;
|
||||
ti,otap-del-sel = <0x2>;
|
||||
|
|
@ -360,3 +361,7 @@
|
|||
&wkup_i2c0 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "peripheral";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -58,6 +58,12 @@
|
|||
AM65X_IOPAD(0x01b0, PIN_INPUT, 0) /* (C25) MMC0_DS */
|
||||
>;
|
||||
};
|
||||
|
||||
usb1_pins_default: usb1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
AM65X_IOPAD(0x02c0, PIN_OUTPUT, 0) /* (AC8) USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
|
|
@ -89,3 +95,25 @@
|
|||
#gpio-cells = <2>;
|
||||
};
|
||||
};
|
||||
|
||||
&dwc3_1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1_phy {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&usb1_pins_default>;
|
||||
dr_mode = "otg";
|
||||
};
|
||||
|
||||
&dwc3_0 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&usb0_phy {
|
||||
status = "disabled";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -100,7 +100,7 @@
|
|||
wkup_vtm0: wkup_vtm@42050000 {
|
||||
compatible = "ti,am654-vtm", "ti,am654-avs";
|
||||
reg = <0x42050000 0x25c>;
|
||||
power-domains = <&k3_pds 80>;
|
||||
power-domains = <&k3_pds 80 TI_SCI_PD_EXCLUSIVE>;
|
||||
#thermal-sensor-cells = <1>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -282,6 +282,20 @@
|
|||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&main_usbss0_pins_default {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
u-boot,dm-spl;
|
||||
ti,usb2-only;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "peripheral";
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&mcu_cpsw {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mcu_cpsw_pins_default &mcu_mdio_pins_default>;
|
||||
|
|
@ -311,3 +325,15 @@
|
|||
reg-names = "gmii-sel";
|
||||
};
|
||||
};
|
||||
|
||||
&main_mmc1_pins_default {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&wkup_i2c0_pins_default {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
u-boot,dm-spl;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -65,15 +65,83 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_mmc1_pins_default: main_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
|
||||
J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
|
||||
J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
|
||||
J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
|
||||
J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
|
||||
J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
|
||||
J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
|
||||
J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
|
||||
J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&main_sdhci0 {
|
||||
/* eMMC */
|
||||
voltage-ranges = <1800 1800>;
|
||||
non-removable;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
};
|
||||
|
||||
&main_sdhci1 {
|
||||
/* SD/MMC */
|
||||
voltage-ranges = <1800 1800 3300 3300>;
|
||||
/* SD card */
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
};
|
||||
|
||||
&main_pmx0 {
|
||||
main_usbss0_pins_default: main_usbss0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
|
||||
J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usbss1_pins_default: main_usbss1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x214, PIN_OUTPUT, 4) /* (V4) MCAN1_TX.USB1_DRVVBUS */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_pmx0 {
|
||||
wkup_i2c0_pins_default: wkup-i2c0-pins-default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_WKUP_IOPAD(0xf8, PIN_INPUT_PULLUP, 0) /* (J25) WKUP_I2C0_SCL */
|
||||
J721E_WKUP_IOPAD(0xfc, PIN_INPUT_PULLUP, 0) /* (H24) WKUP_I2C0_SDA */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&usbss0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_usbss0_pins_default>;
|
||||
ti,vbus-divider;
|
||||
};
|
||||
|
||||
&usb0 {
|
||||
dr_mode = "otg";
|
||||
maximum-speed = "super-speed";
|
||||
};
|
||||
|
||||
&usbss1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_usbss1_pins_default>;
|
||||
ti,usb2-only;
|
||||
};
|
||||
|
||||
&usb1 {
|
||||
dr_mode = "host";
|
||||
maximum-speed = "high-speed";
|
||||
};
|
||||
|
||||
&wkup_i2c0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&wkup_i2c0_pins_default>;
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -340,6 +340,76 @@
|
|||
resets = <&k3_reset 15 1>;
|
||||
};
|
||||
|
||||
usbss0: cdns_usb@4104000 {
|
||||
compatible = "ti,j721e-usb";
|
||||
reg = <0x00 0x4104000 0x00 0x100>;
|
||||
dma-coherent;
|
||||
power-domains = <&k3_pds 288 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 288 15>, <&k3_clks 288 3>;
|
||||
clock-names = "usb2_refclk", "lpm_clk";
|
||||
assigned-clocks = <&k3_clks 288 15>; /* USB2_REFCLK */
|
||||
assigned-clock-parents = <&k3_clks 288 16>; /* HFOSC0 */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
phy@4108000 {
|
||||
compatible = "ti,j721e-usb2-phy";
|
||||
reg = <0x00 0x4108000 0x00 0x400>;
|
||||
};
|
||||
|
||||
usb0: usb@6000000 {
|
||||
compatible = "cdns,usb3";
|
||||
reg = <0x00 0x6000000 0x00 0x10000>,
|
||||
<0x00 0x6010000 0x00 0x10000>,
|
||||
<0x00 0x6020000 0x00 0x10000>;
|
||||
reg-names = "otg", "xhci", "dev";
|
||||
interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
|
||||
<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
|
||||
<GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
|
||||
interrupt-names = "host",
|
||||
"peripheral",
|
||||
"otg";
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
|
||||
usbss1: cdns_usb@4114000 {
|
||||
compatible = "ti,j721e-usb";
|
||||
reg = <0x00 0x4114000 0x00 0x100>;
|
||||
dma-coherent;
|
||||
power-domains = <&k3_pds 289 TI_SCI_PD_EXCLUSIVE>;
|
||||
clocks = <&k3_clks 289 15>, <&k3_clks 289 3>;
|
||||
clock-names = "usb2_refclk", "lpm_clk";
|
||||
assigned-clocks = <&k3_clks 289 15>; /* USB2_REFCLK */
|
||||
assigned-clock-parents = <&k3_clks 289 16>; /* HFOSC0 */
|
||||
#address-cells = <2>;
|
||||
#size-cells = <2>;
|
||||
ranges;
|
||||
|
||||
phy@4118000 {
|
||||
compatible = "ti,j721e-usb2-phy";
|
||||
reg = <0x00 0x4118000 0x00 0x400>;
|
||||
};
|
||||
|
||||
usb1: usb@6400000 {
|
||||
compatible = "cdns,usb3";
|
||||
reg = <0x00 0x6400000 0x00 0x10000>,
|
||||
<0x00 0x6410000 0x00 0x10000>,
|
||||
<0x00 0x6420000 0x00 0x10000>;
|
||||
reg-names = "otg", "xhci", "dev";
|
||||
interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
|
||||
<GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, /* irq.6 */
|
||||
<GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; /* otgirq.0 */
|
||||
interrupt-names = "host",
|
||||
"peripheral",
|
||||
"otg";
|
||||
maximum-speed = "super-speed";
|
||||
dr_mode = "otg";
|
||||
};
|
||||
};
|
||||
|
||||
ufs_wrapper: ufs-wrapper@4e80000 {
|
||||
compatible = "ti,j721e-ufs";
|
||||
reg = <0x0 0x4e80000 0x0 0x100>;
|
||||
|
|
|
|||
|
|
@ -112,6 +112,27 @@
|
|||
J721E_IOPAD(0x1ec, PIN_OUTPUT, 0) /* (AB3) UART0_TXD */
|
||||
>;
|
||||
};
|
||||
|
||||
main_usbss0_pins_default: main_usbss0_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x290, PIN_OUTPUT, 0) /* (U6) USB0_DRVVBUS */
|
||||
J721E_IOPAD(0x210, PIN_INPUT, 7) /* (W3) MCAN1_RX.GPIO1_3 */
|
||||
>;
|
||||
};
|
||||
|
||||
main_mmc1_pins_default: main_mmc1_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
J721E_IOPAD(0x254, PIN_INPUT, 0) /* (R29) MMC1_CMD */
|
||||
J721E_IOPAD(0x250, PIN_INPUT, 0) /* (P25) MMC1_CLK */
|
||||
J721E_IOPAD(0x2ac, PIN_INPUT, 0) /* (P25) MMC1_CLKLB */
|
||||
J721E_IOPAD(0x24c, PIN_INPUT, 0) /* (R24) MMC1_DAT0 */
|
||||
J721E_IOPAD(0x248, PIN_INPUT, 0) /* (P24) MMC1_DAT1 */
|
||||
J721E_IOPAD(0x244, PIN_INPUT, 0) /* (R25) MMC1_DAT2 */
|
||||
J721E_IOPAD(0x240, PIN_INPUT, 0) /* (R26) MMC1_DAT3 */
|
||||
J721E_IOPAD(0x258, PIN_INPUT, 0) /* (P23) MMC1_SDCD */
|
||||
J721E_IOPAD(0x25c, PIN_INPUT, 0) /* (R28) MMC1_SDWP */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&wkup_uart0 {
|
||||
|
|
@ -149,6 +170,8 @@
|
|||
/delete-property/ power-domains;
|
||||
/delete-property/ assigned-clocks;
|
||||
/delete-property/ assigned-clock-parents;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&main_mmc1_pins_default>;
|
||||
clock-names = "clk_xin";
|
||||
clocks = <&clk_200mhz>;
|
||||
ti,driver-strength-ohm = <50>;
|
||||
|
|
|
|||
|
|
@ -17,16 +17,44 @@
|
|||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio6 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
/delete-node/ &bandgap;
|
||||
/delete-node/ &uart2;
|
||||
/delete-node/ &uart3;
|
||||
/delete-node/ &mmc2;
|
||||
/delete-node/ &mmc3;
|
||||
/delete-node/ &thermal_zones;
|
||||
|
||||
|
|
|
|||
|
|
@ -29,6 +29,10 @@
|
|||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
|
@ -39,14 +43,18 @@
|
|||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
/delete-node/ &bandgap;
|
||||
/delete-node/ &uart2;
|
||||
/delete-node/ &uart3;
|
||||
/delete-node/ &mmc2;
|
||||
/delete-node/ &mmc3;
|
||||
/delete-node/ &thermal_zones;
|
||||
|
||||
|
|
|
|||
|
|
@ -7,21 +7,53 @@
|
|||
#include "omap3-u-boot.dtsi"
|
||||
|
||||
/ {
|
||||
chosen {
|
||||
stdout-path = &uart1;
|
||||
};
|
||||
|
||||
aliases {
|
||||
/delete-property/ serial1;
|
||||
/delete-property/ serial2;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio6 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
/delete-node/ &bandgap;
|
||||
/delete-node/ &uart2;
|
||||
/delete-node/ &uart3;
|
||||
/delete-node/ &mmc2;
|
||||
/delete-node/ &mmc3;
|
||||
/delete-node/ &thermal_zones;
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
|
||||
&i2c1 {
|
||||
clock-frequency = <400000>;
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&i2c2 {
|
||||
|
|
@ -33,6 +34,10 @@
|
|||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio4 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
&gpio5 {
|
||||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
|
@ -41,8 +46,9 @@
|
|||
/delete-property/ u-boot,dm-spl;
|
||||
};
|
||||
|
||||
/delete-node/ &bandgap;
|
||||
/delete-node/ &uart2;
|
||||
/delete-node/ &uart3;
|
||||
/delete-node/ &mmc2;
|
||||
/delete-node/ &mmc3;
|
||||
|
||||
/delete-node/ &thermal_zones;
|
||||
|
|
|
|||
|
|
@ -119,7 +119,7 @@ config K3_SYSFW_IMAGE_MMCSD_RAW_MODE_PART
|
|||
config K3_SYSFW_IMAGE_SIZE_MAX
|
||||
int "Amount of memory dynamically allocated for loading SYSFW blob"
|
||||
depends on K3_LOAD_SYSFW
|
||||
default 276000
|
||||
default 277000
|
||||
help
|
||||
Amount of memory (in bytes) reserved through dynamic allocation at
|
||||
runtime for loading the combined System Firmware and configuration image
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
// SPDX-License-Identifier: GPL-2.0+
|
||||
/*
|
||||
* K3: Architecture initialization
|
||||
* AM6: SoC specific initialization
|
||||
*
|
||||
* Copyright (C) 2017-2018 Texas Instruments Incorporated - http://www.ti.com/
|
||||
* Lokesh Vutla <lokeshvutla@ti.com>
|
||||
|
|
@ -19,6 +19,26 @@
|
|||
#include <linux/soc/ti/ti_sci_protocol.h>
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#ifdef CONFIG_K3_LOAD_SYSFW
|
||||
#ifdef CONFIG_TI_SECURE_DEVICE
|
||||
struct fwl_data main_cbass_fwls[] = {
|
||||
{ "MMCSD1_CFG", 2057, 1 },
|
||||
{ "MMCSD0_CFG", 2058, 1 },
|
||||
{ "USB3SS0_SLV0", 2176, 2 },
|
||||
{ "PCIE0_SLV", 2336, 8 },
|
||||
{ "PCIE1_SLV", 2337, 8 },
|
||||
{ "PCIE0_CFG", 2688, 1 },
|
||||
{ "PCIE1_CFG", 2689, 1 },
|
||||
}, mcu_cbass_fwls[] = {
|
||||
{ "MCU_ARMSS0_CORE0_SLV", 1024, 1 },
|
||||
{ "MCU_ARMSS0_CORE1_SLV", 1028, 1 },
|
||||
{ "MCU_FSS0_S1", 1033, 8 },
|
||||
{ "MCU_FSS0_S0", 1036, 8 },
|
||||
{ "MCU_CPSW0", 1220, 1 },
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static void mmr_unlock(u32 base, u32 partition)
|
||||
{
|
||||
/* Translate the base address */
|
||||
|
|
@ -109,6 +129,12 @@ void board_init_f(ulong dummy)
|
|||
* output.
|
||||
*/
|
||||
k3_sysfw_loader(preloader_console_init);
|
||||
|
||||
/* Disable ROM configured firewalls right after loading sysfw */
|
||||
#ifdef CONFIG_TI_SECURE_DEVICE
|
||||
remove_fwl_configs(main_cbass_fwls, ARRAY_SIZE(main_cbass_fwls));
|
||||
remove_fwl_configs(mcu_cbass_fwls, ARRAY_SIZE(mcu_cbass_fwls));
|
||||
#endif
|
||||
#else
|
||||
/* Prepare console output */
|
||||
preloader_console_init();
|
||||
|
|
|
|||
|
|
@ -175,8 +175,8 @@ int fdt_disable_node(void *blob, char *node_path)
|
|||
|
||||
offs = fdt_path_offset(blob, node_path);
|
||||
if (offs < 0) {
|
||||
debug("Node %s not found.\n", node_path);
|
||||
return 0;
|
||||
printf("Node %s not found.\n", node_path);
|
||||
return offs;
|
||||
}
|
||||
ret = fdt_setprop_string(blob, offs, "status", "disabled");
|
||||
if (ret < 0) {
|
||||
|
|
@ -270,3 +270,33 @@ void disable_linefill_optimization(void)
|
|||
asm("mcr p15, 0, %0, c1, c0, 1" : : "r" (actlr));
|
||||
}
|
||||
#endif
|
||||
|
||||
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size)
|
||||
{
|
||||
struct ti_sci_msg_fwl_region region;
|
||||
struct ti_sci_fwl_ops *fwl_ops;
|
||||
struct ti_sci_handle *ti_sci;
|
||||
size_t i, j;
|
||||
|
||||
ti_sci = get_ti_sci_handle();
|
||||
fwl_ops = &ti_sci->ops.fwl_ops;
|
||||
for (i = 0; i < fwl_data_size; i++) {
|
||||
for (j = 0; j < fwl_data[i].regions; j++) {
|
||||
region.fwl_id = fwl_data[i].fwl_id;
|
||||
region.region = j;
|
||||
region.n_permission_regs = 3;
|
||||
|
||||
fwl_ops->get_fwl_region(ti_sci, ®ion);
|
||||
|
||||
if (region.control != 0) {
|
||||
pr_debug("Attempting to disable firewall %5d (%25s)\n",
|
||||
region.fwl_id, fwl_data[i].name);
|
||||
region.control = 0;
|
||||
|
||||
if (fwl_ops->set_fwl_region(ti_sci, ®ion))
|
||||
pr_err("Could not disable firewall %5d (%25s)\n",
|
||||
region.fwl_id, fwl_data[i].name);
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -14,6 +14,13 @@
|
|||
#define REV_PG1_0 0
|
||||
#define REV_PG2_0 1
|
||||
|
||||
struct fwl_data {
|
||||
const char *name;
|
||||
u16 fwl_id;
|
||||
u16 regions;
|
||||
};
|
||||
|
||||
void setup_k3_mpu_regions(void);
|
||||
int early_console_init(void);
|
||||
void disable_linefill_optimization(void);
|
||||
void remove_fwl_configs(struct fwl_data *fwl_data, size_t fwl_data_size);
|
||||
|
|
|
|||
|
|
@ -46,4 +46,7 @@
|
|||
#define CTRLMMR_LOCK_KICK1 0x0100c
|
||||
#define CTRLMMR_LOCK_KICK1_UNLOCK_VAL 0xd172bc5a
|
||||
|
||||
/* MCU SCRATCHPAD usage */
|
||||
#define TI_SRAM_SCRATCH_BOARD_EEPROM_START CONFIG_SYS_K3_MCU_SCRATCHPAD_BASE
|
||||
|
||||
#endif /* __ASM_ARCH_J721E_HARDWARE_H */
|
||||
|
|
|
|||
|
|
@ -20,6 +20,47 @@
|
|||
#include <dm/pinctrl.h>
|
||||
|
||||
#ifdef CONFIG_SPL_BUILD
|
||||
#ifdef CONFIG_K3_LOAD_SYSFW
|
||||
#ifdef CONFIG_TI_SECURE_DEVICE
|
||||
struct fwl_data cbass_hc_cfg0_fwls[] = {
|
||||
{ "PCIE0_CFG", 2560, 8 },
|
||||
{ "PCIE1_CFG", 2561, 8 },
|
||||
{ "USB3SS0_CORE", 2568, 4 },
|
||||
{ "USB3SS1_CORE", 2570, 4 },
|
||||
{ "EMMC8SS0_CFG", 2576, 4 },
|
||||
{ "UFS_HCI0_CFG", 2580, 4 },
|
||||
{ "SERDES0", 2584, 1 },
|
||||
{ "SERDES1", 2585, 1 },
|
||||
}, cbass_hc0_fwls[] = {
|
||||
{ "PCIE0_HP", 2528, 24 },
|
||||
{ "PCIE0_LP", 2529, 24 },
|
||||
{ "PCIE1_HP", 2530, 24 },
|
||||
{ "PCIE1_LP", 2531, 24 },
|
||||
}, cbass_rc_cfg0_fwls[] = {
|
||||
{ "EMMCSD4SS0_CFG", 2380, 4 },
|
||||
}, cbass_rc0_fwls[] = {
|
||||
{ "GPMC0", 2310, 8 },
|
||||
}, infra_cbass0_fwls[] = {
|
||||
{ "PLL_MMR0", 8, 26 },
|
||||
{ "CTRL_MMR0", 9, 16 },
|
||||
}, mcu_cbass0_fwls[] = {
|
||||
{ "MCU_R5FSS0_CORE0", 1024, 4 },
|
||||
{ "MCU_R5FSS0_CORE0_CFG", 1025, 2 },
|
||||
{ "MCU_R5FSS0_CORE1", 1028, 4 },
|
||||
{ "MCU_FSS0_CFG", 1032, 12 },
|
||||
{ "MCU_FSS0_S1", 1033, 8 },
|
||||
{ "MCU_FSS0_S0", 1036, 8 },
|
||||
{ "MCU_PSROM49152X32", 1048, 1 },
|
||||
{ "MCU_MSRAM128KX64", 1050, 8 },
|
||||
{ "MCU_CTRL_MMR0", 1200, 8 },
|
||||
{ "MCU_PLL_MMR0", 1201, 3 },
|
||||
{ "MCU_CPSW0", 1220, 2 },
|
||||
}, wkup_cbass0_fwls[] = {
|
||||
{ "WKUP_CTRL_MMR0", 131, 16 },
|
||||
};
|
||||
#endif
|
||||
#endif
|
||||
|
||||
static void mmr_unlock(u32 base, u32 partition)
|
||||
{
|
||||
/* Translate the base address */
|
||||
|
|
@ -114,11 +155,25 @@ void board_init_f(ulong dummy)
|
|||
* output.
|
||||
*/
|
||||
k3_sysfw_loader(preloader_console_init);
|
||||
|
||||
/* Disable ROM configured firewalls right after loading sysfw */
|
||||
#ifdef CONFIG_TI_SECURE_DEVICE
|
||||
remove_fwl_configs(cbass_hc_cfg0_fwls, ARRAY_SIZE(cbass_hc_cfg0_fwls));
|
||||
remove_fwl_configs(cbass_hc0_fwls, ARRAY_SIZE(cbass_hc0_fwls));
|
||||
remove_fwl_configs(cbass_rc_cfg0_fwls, ARRAY_SIZE(cbass_rc_cfg0_fwls));
|
||||
remove_fwl_configs(cbass_rc0_fwls, ARRAY_SIZE(cbass_rc0_fwls));
|
||||
remove_fwl_configs(infra_cbass0_fwls, ARRAY_SIZE(infra_cbass0_fwls));
|
||||
remove_fwl_configs(mcu_cbass0_fwls, ARRAY_SIZE(mcu_cbass0_fwls));
|
||||
remove_fwl_configs(wkup_cbass0_fwls, ARRAY_SIZE(wkup_cbass0_fwls));
|
||||
#endif
|
||||
#else
|
||||
/* Prepare console output */
|
||||
preloader_console_init();
|
||||
#endif
|
||||
|
||||
/* Perform EEPROM-based board detection */
|
||||
do_board_detect();
|
||||
|
||||
#if defined(CONFIG_CPU_V7R) && defined(CONFIG_K3_AVS0)
|
||||
ret = uclass_get_device_by_driver(UCLASS_MISC, DM_GET_DRIVER(k3_avs),
|
||||
&dev);
|
||||
|
|
|
|||
|
|
@ -7,6 +7,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <cpu_func.h>
|
||||
#include <dm.h>
|
||||
#include <hang.h>
|
||||
#include <linux/soc/ti/ti_sci_protocol.h>
|
||||
|
|
@ -23,8 +24,14 @@ void board_fit_image_post_process(void **p_image, size_t *p_size)
|
|||
int ret;
|
||||
|
||||
image_addr = (uintptr_t)*p_image;
|
||||
image_size = *p_size;
|
||||
|
||||
debug("Authenticating image at address 0x%016llx\n", image_addr);
|
||||
debug("Authenticating image of size %d bytes\n", image_size);
|
||||
|
||||
flush_dcache_range((unsigned long)image_addr,
|
||||
ALIGN((unsigned long)image_addr + image_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
|
||||
/* Authenticate image */
|
||||
ret = proc_ops->proc_auth_boot_image(ti_sci, &image_addr, &image_size);
|
||||
|
|
@ -33,6 +40,11 @@ void board_fit_image_post_process(void **p_image, size_t *p_size)
|
|||
hang();
|
||||
}
|
||||
|
||||
if (image_size)
|
||||
invalidate_dcache_range((unsigned long)image_addr,
|
||||
ALIGN((unsigned long)image_addr +
|
||||
image_size, ARCH_DMA_MINALIGN));
|
||||
|
||||
/*
|
||||
* The image_size returned may be 0 when the authentication process has
|
||||
* moved the image. When this happens no further processing on the
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ const struct dpll_params dpll_mpu_opp[NUM_CRYSTAL_FREQ][NUM_OPPS] = {
|
|||
{-1, -1, -1, -1, -1, -1, -1}, /* OPP RESERVED */
|
||||
{25, 0, 1, -1, -1, -1, -1}, /* OPP 100 */
|
||||
{30, 0, 1, -1, -1, -1, -1}, /* OPP 120 */
|
||||
{100, 3, 1, -1, -1, -1, -1}, /* OPP TB */
|
||||
{100, 2, 1, -1, -1, -1, -1}, /* OPP TB */
|
||||
{125, 2, 1, -1, -1, -1, -1} /* OPP NT */
|
||||
},
|
||||
{ /* 25 MHz */
|
||||
|
|
|
|||
|
|
@ -418,6 +418,7 @@ void enable_basic_clocks(void)
|
|||
(*prcm)->cm_l3init_hsmmc2_clkctrl,
|
||||
(*prcm)->cm_l4per_gptimer2_clkctrl,
|
||||
(*prcm)->cm_wkup_wdtimer2_clkctrl,
|
||||
(*prcm)->cm_l4per_uart1_clkctrl,
|
||||
(*prcm)->cm_l4per_uart3_clkctrl,
|
||||
(*prcm)->cm_l4per_i2c1_clkctrl,
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@
|
|||
|
||||
#include <common.h>
|
||||
#include <eeprom.h>
|
||||
#include <dm/uclass.h>
|
||||
#include <env.h>
|
||||
#include <fdt_support.h>
|
||||
#include <i2c.h>
|
||||
|
|
@ -29,8 +30,6 @@
|
|||
#include <power/pmic.h>
|
||||
#include <power/tps65218.h>
|
||||
#include <power/tps62362.h>
|
||||
#include <miiphy.h>
|
||||
#include <cpsw.h>
|
||||
#include <linux/usb/gadget.h>
|
||||
#include <dwc3-uboot.h>
|
||||
#include <dwc3-omap-uboot.h>
|
||||
|
|
@ -854,109 +853,6 @@ int board_usb_cleanup(int index, enum usb_init_type init)
|
|||
#endif /* defined(CONFIG_USB_DWC3) || defined(CONFIG_USB_XHCI_OMAP) */
|
||||
#endif /* !CONFIG_IS_ENABLED(DM_USB_GADGET) */
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
|
||||
static void cpsw_control(int enabled)
|
||||
{
|
||||
/* Additional controls can be added here */
|
||||
return;
|
||||
}
|
||||
|
||||
static struct cpsw_slave_data cpsw_slaves[] = {
|
||||
{
|
||||
.slave_reg_ofs = 0x208,
|
||||
.sliver_reg_ofs = 0xd80,
|
||||
.phy_addr = 16,
|
||||
},
|
||||
{
|
||||
.slave_reg_ofs = 0x308,
|
||||
.sliver_reg_ofs = 0xdc0,
|
||||
.phy_addr = 1,
|
||||
},
|
||||
};
|
||||
|
||||
static struct cpsw_platform_data cpsw_data = {
|
||||
.mdio_base = CPSW_MDIO_BASE,
|
||||
.cpsw_base = CPSW_BASE,
|
||||
.mdio_div = 0xff,
|
||||
.channels = 8,
|
||||
.cpdma_reg_ofs = 0x800,
|
||||
.slaves = 1,
|
||||
.slave_data = cpsw_slaves,
|
||||
.ale_reg_ofs = 0xd00,
|
||||
.ale_entries = 1024,
|
||||
.host_port_reg_ofs = 0x108,
|
||||
.hw_stats_reg_ofs = 0x900,
|
||||
.bd_ram_ofs = 0x2000,
|
||||
.mac_control = (1 << 5),
|
||||
.control = cpsw_control,
|
||||
.host_port_num = 0,
|
||||
.version = CPSW_CTRL_VERSION_2,
|
||||
};
|
||||
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int rv;
|
||||
uint8_t mac_addr[6];
|
||||
uint32_t mac_hi, mac_lo;
|
||||
|
||||
/* try reading mac address from efuse */
|
||||
mac_lo = readl(&cdev->macid0l);
|
||||
mac_hi = readl(&cdev->macid0h);
|
||||
mac_addr[0] = mac_hi & 0xFF;
|
||||
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
||||
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
|
||||
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
|
||||
mac_addr[4] = mac_lo & 0xFF;
|
||||
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
||||
|
||||
if (!env_get("ethaddr")) {
|
||||
puts("<ethaddr> not set. Validating first E-fuse MAC\n");
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
}
|
||||
|
||||
mac_lo = readl(&cdev->macid1l);
|
||||
mac_hi = readl(&cdev->macid1h);
|
||||
mac_addr[0] = mac_hi & 0xFF;
|
||||
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
||||
mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
|
||||
mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
|
||||
mac_addr[4] = mac_lo & 0xFF;
|
||||
mac_addr[5] = (mac_lo & 0xFF00) >> 8;
|
||||
|
||||
if (!env_get("eth1addr")) {
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("eth1addr", mac_addr);
|
||||
}
|
||||
|
||||
if (board_is_eposevm()) {
|
||||
writel(RMII_MODE_ENABLE | RMII_CHIPCKL_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RMII;
|
||||
cpsw_slaves[0].phy_addr = 16;
|
||||
} else if (board_is_sk()) {
|
||||
writel(RGMII_MODE_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
|
||||
cpsw_slaves[0].phy_addr = 4;
|
||||
cpsw_slaves[1].phy_addr = 5;
|
||||
} else if (board_is_idk()) {
|
||||
writel(RGMII_MODE_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
|
||||
cpsw_slaves[0].phy_addr = 0;
|
||||
} else {
|
||||
writel(RGMII_MODE_ENABLE, &cdev->miisel);
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII;
|
||||
cpsw_slaves[0].phy_addr = 0;
|
||||
}
|
||||
|
||||
rv = cpsw_register(&cpsw_data);
|
||||
if (rv < 0)
|
||||
printf("Error %d registering CPSW switch\n", rv);
|
||||
|
||||
return rv;
|
||||
}
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_OF_LIBFDT) && defined(CONFIG_OF_BOARD_SETUP)
|
||||
int ft_board_setup(void *blob, bd_t *bd)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -15,6 +15,7 @@
|
|||
#include <sata.h>
|
||||
#include <serial.h>
|
||||
#include <usb.h>
|
||||
#include <errno.h>
|
||||
#include <asm/omap_common.h>
|
||||
#include <asm/omap_sec_common.h>
|
||||
#include <asm/emif.h>
|
||||
|
|
@ -38,6 +39,10 @@
|
|||
#include "../common/board_detect.h"
|
||||
#include "mux_data.h"
|
||||
|
||||
#ifdef CONFIG_SUPPORT_EMMC_BOOT
|
||||
static int board_bootmode_has_emmc(void);
|
||||
#endif
|
||||
|
||||
#define board_is_x15() board_ti_is("BBRDX15_")
|
||||
#define board_is_x15_revb1() (board_ti_is("BBRDX15_") && \
|
||||
!strncmp("B.10", board_ti_get_rev(), 3))
|
||||
|
|
@ -50,6 +55,7 @@
|
|||
#define board_is_am574x_idk() board_ti_is("AM574IDK")
|
||||
#define board_is_am572x_idk() board_ti_is("AM572IDK")
|
||||
#define board_is_am571x_idk() board_ti_is("AM571IDK")
|
||||
#define board_is_bbai() board_ti_is("BBONE-AI")
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
#include <cpsw.h>
|
||||
|
|
@ -99,12 +105,19 @@ static const struct dmm_lisa_map_regs am574x_idk_lisa_regs = {
|
|||
.is_ma_present = 0x1
|
||||
};
|
||||
|
||||
static const struct dmm_lisa_map_regs bbai_lisa_regs = {
|
||||
.dmm_lisa_map_3 = 0x80640100,
|
||||
.is_ma_present = 0x1
|
||||
};
|
||||
|
||||
void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
|
||||
{
|
||||
if (board_is_am571x_idk())
|
||||
*dmm_lisa_regs = &am571x_idk_lisa_regs;
|
||||
else if (board_is_am574x_idk())
|
||||
*dmm_lisa_regs = &am574x_idk_lisa_regs;
|
||||
else if (board_is_bbai())
|
||||
*dmm_lisa_regs = &bbai_lisa_regs;
|
||||
else
|
||||
*dmm_lisa_regs = &beagle_x15_lisa_regs;
|
||||
}
|
||||
|
|
@ -508,6 +521,14 @@ void do_board_detect(void)
|
|||
CONFIG_EEPROM_CHIP_ADDRESS);
|
||||
if (rc)
|
||||
printf("ti_i2c_eeprom_init failed %d\n", rc);
|
||||
|
||||
#ifdef CONFIG_SUPPORT_EMMC_BOOT
|
||||
rc = board_bootmode_has_emmc();
|
||||
if (!rc)
|
||||
rc = ti_emmc_boardid_get();
|
||||
if (rc)
|
||||
printf("ti_emmc_boardid_get failed %d\n", rc);
|
||||
#endif
|
||||
}
|
||||
|
||||
#else /* CONFIG_SPL_BUILD */
|
||||
|
|
@ -523,6 +544,14 @@ void do_board_detect(void)
|
|||
if (rc)
|
||||
printf("ti_i2c_eeprom_init failed %d\n", rc);
|
||||
|
||||
#ifdef CONFIG_SUPPORT_EMMC_BOOT
|
||||
rc = board_bootmode_has_emmc();
|
||||
if (!rc)
|
||||
rc = ti_emmc_boardid_get();
|
||||
if (rc)
|
||||
printf("ti_emmc_boardid_get failed %d\n", rc);
|
||||
#endif
|
||||
|
||||
if (board_is_x15())
|
||||
bname = "BeagleBoard X15";
|
||||
else if (board_is_am572x_evm())
|
||||
|
|
@ -533,6 +562,8 @@ void do_board_detect(void)
|
|||
bname = "AM572x IDK";
|
||||
else if (board_is_am571x_idk())
|
||||
bname = "AM571x IDK";
|
||||
else if (board_is_bbai())
|
||||
bname = "BeagleBone AI";
|
||||
|
||||
if (bname)
|
||||
snprintf(sysinfo.board_string, SYSINFO_BOARD_NAME_MAX_LEN,
|
||||
|
|
@ -567,6 +598,8 @@ static void setup_board_eeprom_env(void)
|
|||
name = "am572x_idk";
|
||||
} else if (board_is_am571x_idk()) {
|
||||
name = "am571x_idk";
|
||||
} else if (board_is_bbai()) {
|
||||
name = "am5729_beagleboneai";
|
||||
} else {
|
||||
printf("Unidentified board claims %s in eeprom header\n",
|
||||
board_ti_get_name());
|
||||
|
|
@ -630,7 +663,7 @@ void am57x_idk_lcd_detect(void)
|
|||
struct udevice *dev;
|
||||
|
||||
/* Only valid for IDKs */
|
||||
if (board_is_x15() || board_is_am572x_evm())
|
||||
if (board_is_x15() || board_is_am572x_evm() || board_is_bbai())
|
||||
return;
|
||||
|
||||
/* Only AM571x IDK has gpio control detect.. so check that */
|
||||
|
|
@ -728,6 +761,9 @@ int board_late_init(void)
|
|||
/* Just probe the potentially supported cdce913 device */
|
||||
uclass_get_device(UCLASS_CLK, 0, &dev);
|
||||
|
||||
if (board_is_bbai())
|
||||
env_set("console", "ttyS0,115200n8");
|
||||
|
||||
#if !defined(CONFIG_SPL_BUILD)
|
||||
board_ti_set_ethaddr(2);
|
||||
#endif
|
||||
|
|
@ -745,6 +781,11 @@ void set_muxconf_regs(void)
|
|||
{
|
||||
do_set_mux32((*ctrl)->control_padconf_core_base,
|
||||
early_padconf, ARRAY_SIZE(early_padconf));
|
||||
|
||||
#ifdef CONFIG_SUPPORT_EMMC_BOOT
|
||||
do_set_mux32((*ctrl)->control_padconf_core_base,
|
||||
emmc_padconf, ARRAY_SIZE(emmc_padconf));
|
||||
#endif
|
||||
}
|
||||
|
||||
#ifdef CONFIG_IODELAY_RECALIBRATION
|
||||
|
|
@ -770,6 +811,11 @@ void recalibrate_iodelay(void)
|
|||
pconf_sz = ARRAY_SIZE(core_padconf_array_essential_am571x_idk);
|
||||
iod = iodelay_cfg_array_am571x_idk;
|
||||
iod_sz = ARRAY_SIZE(iodelay_cfg_array_am571x_idk);
|
||||
} else if (board_is_bbai()) {
|
||||
pconf = core_padconf_array_essential_bbai;
|
||||
pconf_sz = ARRAY_SIZE(core_padconf_array_essential_bbai);
|
||||
iod = iodelay_cfg_array_bbai;
|
||||
iod_sz = ARRAY_SIZE(iodelay_cfg_array_bbai);
|
||||
} else {
|
||||
/* Common for X15/GPEVM */
|
||||
pconf = core_padconf_array_essential_x15;
|
||||
|
|
@ -1098,6 +1144,8 @@ int board_fit_config_name_match(const char *name)
|
|||
return 0;
|
||||
} else if (board_is_am571x_idk() && !strcmp(name, "am571x-idk")) {
|
||||
return 0;
|
||||
} else if (board_is_bbai() && !strcmp(name, "am5729-beagleboneai")) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
return -1;
|
||||
|
|
@ -1114,6 +1162,17 @@ int fastboot_set_reboot_flag(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SUPPORT_EMMC_BOOT
|
||||
static int board_bootmode_has_emmc(void)
|
||||
{
|
||||
/* Check that boot mode is same as BBAI */
|
||||
if (gd->arch.omap_boot_mode != 2)
|
||||
return -EIO;
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_TI_SECURE_DEVICE
|
||||
void board_fit_image_post_process(void **p_image, size_t *p_size)
|
||||
{
|
||||
|
|
|
|||
|
|
@ -233,6 +233,203 @@ const struct pad_conf_entry core_padconf_array_essential_x15[] = {
|
|||
{RSTOUTN, (M0 | PIN_OUTPUT)}, /* rstoutn.rstoutn */
|
||||
};
|
||||
|
||||
const struct pad_conf_entry core_padconf_array_essential_bbai[] = {
|
||||
/* Cape Bus i2c */
|
||||
/* NOTE: For the i2cj_scl and i2ci_scl signals to work properly, the INPUTENABLE bit of the
|
||||
* appropriate CTRL_CORE_PAD_x registers should be set to 0x1 because of retiming
|
||||
* purposes.
|
||||
*/
|
||||
{GPMC_A0, (M7 | PIN_INPUT_PULLUP)}, /* P9_19A: R6_GPIO7_3: gpmc_a0.i2c4_scl (Shared with F4_UART10_RTSN) */
|
||||
{GPMC_A1, (M7 | PIN_INPUT_PULLUP)}, /* P9_20A: T9_GPIO7_4: gpmc_a1.i2c4_sda (Shared with D2_UART10_CTSN) */
|
||||
|
||||
/* Bluetooth UART */
|
||||
{GPMC_A4, (M8 | PIN_INPUT)}, /* P6 UART6_RXD: gpmc_a4.uart6_rxd */
|
||||
{GPMC_A5, (M8 | PIN_OUTPUT)}, /* R9 UART6_TXD: gpmc_a5.uart6_txd */
|
||||
{GPMC_A6, (M8 | PIN_INPUT)}, /* R5 UART6_CTSN: gpmc_a6.uart6_ctsn */
|
||||
{GPMC_A7, (M8 | PIN_OUTPUT)}, /* P5 UART6_RTSN: gpmc_a7.uart6_rtsn */
|
||||
|
||||
/* eMMC */
|
||||
{GPMC_A19, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* K7: gpmc_a19.mmc2_dat4 */
|
||||
{GPMC_A20, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* M7: gpmc_a20.mmc2_dat5 */
|
||||
{GPMC_A21, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* J5: gpmc_a21.mmc2_dat6 */
|
||||
{GPMC_A22, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* K6: gpmc_a22.mmc2_dat7 */
|
||||
{GPMC_A23, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* J7: gpmc_a23.mmc2_clk */
|
||||
{GPMC_A24, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* J4: gpmc_a24.mmc2_dat0 */
|
||||
{GPMC_A25, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* J6: gpmc_a25.mmc2_dat1 */
|
||||
{GPMC_A26, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* H4: gpmc_a26.mmc2_dat2 */
|
||||
{GPMC_A27, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* H5: gpmc_a27.mmc2_dat3 */
|
||||
{GPMC_CS1, (M1 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* H6: gpmc_cs1.mmc2_cmd */
|
||||
|
||||
{GPMC_ADVN_ALE, (M14 | PIN_INPUT_PULLUP)}, /* N1 RGMII_RST: gpmc_advn_ale.gpio2_23 */
|
||||
|
||||
{VIN1A_CLK0, (M14 | PIN_INPUT_PULLUP)}, /* AG8 INT_ADC: vin1a_clk0.gpio2_30 */
|
||||
{VIN1A_DE0, (M10 | PIN_INPUT_PULLDOWN)}, /* P8_35B: AD9_EQEP1A_IN: vin1a_de0.eQEP1A_in */
|
||||
{VIN1A_FLD0, (M10 | PIN_INPUT_PULLDOWN)}, /* P8_33B: AF9_EQEP1B_IN: vin1a_fld0.eQEP1B_in */
|
||||
{VIN1A_VSYNC0, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_21A: AF8_TIMER13: vin1a_vsync0.gpio3_3 */
|
||||
|
||||
{VIN1A_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* AH6 USR4: vin1a_d3.gpio3_7 */
|
||||
|
||||
{VIN1A_D6, (M10 | PIN_INPUT_PULLDOWN)}, /* P8_12: AG6: vin1a_d6.eQEP2A_in */
|
||||
{VIN1A_D7, (M10 | PIN_INPUT_PULLDOWN)}, /* P8_11: AH4: vin1a_d7.eQEP2B_in */
|
||||
{VIN1A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_15: AG4: vin1a_d8.gpio3_12 */
|
||||
{VIN1A_D9, (M14 | PIN_INPUT)}, /* AG2 USB ID: vin1a_d9.gpio3_13 */
|
||||
{VIN1A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* AG3 USR3: vin1a_d10.gpio3_14 */
|
||||
{VIN1A_D11, (M14 | PIN_INPUT_PULLDOWN)}, /* AG5 USR2: vin1a_d11.gpio3_15 */
|
||||
{VIN1A_D13, (M14 | PIN_OUTPUT_PULLDOWN)}, /* AF6 USR0: vin1a_d13.gpio3_17 */
|
||||
{VIN1A_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* AF3 WL_REG_ON: vin1a_d14.gpio3_18 */
|
||||
{VIN1A_D16, (M14 | PIN_INPUT_PULLDOWN)}, /* AF1 BT_HOST_WAKE: vin1a_d16.gpio3_20 */
|
||||
{VIN1A_D17, (M14 | PIN_OUTPUT_PULLDOWN)}, /* AE3 BT_WAKE: vin1a_d17.gpio3_21 */
|
||||
{VIN1A_D18, (M14 | PIN_OUTPUT_PULLUP)}, /* AE5 BT_REG_ON: vin1a_d18.gpio3_22 */
|
||||
{VIN1A_D19, (M14 | PIN_INPUT_PULLDOWN)}, /* AE1 WL_HOST_WAKE: vin1a_d19.gpio3_23 */
|
||||
{VIN1A_D20, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_26B: AE2: vin1a_d20.gpio3_24 */
|
||||
{VIN1A_D23, (M14 | PIN_OUTPUT_PULLDOWN)}, /* AD3 VDD_ADC_SEL: vin1a_d23.gpio3_27 */
|
||||
|
||||
{VIN2A_D2, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_15A: D1: vin2a_d2.gpio4_3 */
|
||||
|
||||
/* Cape Bus i2c (gpio shared) */
|
||||
{VIN2A_D4, (M14 | PIN_INPUT)}, /* P9_20B: D2_UART10_CTSN: vin2a_d4. (Shared with T9_GPIO7_4) */
|
||||
{VIN2A_D5, (M14 | PIN_INPUT)}, /* P9_19B: F4_UART10_RTSN: vin2a_d5. (Shared with R6_GPIO7_3) */
|
||||
|
||||
{VIN2A_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_18: F5_GPIO4_9: vin2a_d8.gpio4_9 */
|
||||
{VIN2A_D9, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_19: E6_EHRPWM2A: vin2a_d9.gpio4_10 */
|
||||
{VIN2A_D10, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_13: D3_EHRPWM2B: vin2a_d10.gpio4_11 */
|
||||
{VIN2A_D12, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_14: D5_GPIO4_13: vin2a_d12.gpio4_13 */
|
||||
{VIN2A_D13, (M10 | PIN_INPUT_PULLDOWN)}, /* P9_42B: C2_GPIO4_14: vin2a_d13.eQEP3A_in */
|
||||
{VIN2A_D14, (M10 | PIN_INPUT_PULLDOWN)}, /* P9_27A: C3_GPIO4_15: vin2a_d14.eQEP3B_in */
|
||||
{VIN2A_D17, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_14: D6_EHRPWM3A: vin2a_d17.gpio4_25 */
|
||||
{VIN2A_D18, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_16: C5_EHRPWM3B: vin2a_d18.gpio4_26 */
|
||||
{VIN2A_D19, (M12 | PIN_INPUT | MANUAL_MODE)}, /* P8_15B: A3_GPIO4_27: vin2a_d19.pr1_pru1_gpi16 */
|
||||
{VIN2A_D20, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_26: B3_GPIO4_28: vin2a_d20.gpio4_28 */
|
||||
{VIN2A_D21, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* P8_16: B4_GPIO4_29: vin2a_d21.pr1_pru1_gpi18 */
|
||||
{VOUT1_CLK, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_28A: D11_VOUT1_CLK: vout1_clk.gpio4_19 */
|
||||
{VOUT1_DE, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_30A: B10_VOUT1_DE: vout1_de.gpio4_20 */
|
||||
{VOUT1_HSYNC, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_29A: C11_VOUT1_HSYNC: vout1_hsync.gpio4_22 */
|
||||
{VOUT1_VSYNC, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_27A: E11_VOUT1_VSYNC: vout1_vsync.gpio4_23 */
|
||||
{VOUT1_D0, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_45A: F11_VOUT1_D0: vout1_d0.gpio8_0 */
|
||||
{VOUT1_D1, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_46A: G10_VOUT1_D1: vout1_d1.gpio8_1 */
|
||||
{VOUT1_D2, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_43: F10_LCD_DATA2: vout1_d2.gpio8_2 */
|
||||
{VOUT1_D3, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_44: G11_LCD_DATA3: vout1_d3.gpio8_3 */
|
||||
{VOUT1_D4, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* P8_41: E9_LCD_DATA4: vout1_d4.pr2_pru0_gpi1 */
|
||||
{VOUT1_D5, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* P8_42: F9_LCD_DATA5: vout1_d5.pr2_pru0_gpi2 */
|
||||
{VOUT1_D6, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* P8_39: F8_LCD_DATA6: vout1_d6.pr2_pru0_gpi3 */
|
||||
{VOUT1_D7, (M12 | PIN_INPUT_PULLDOWN | MANUAL_MODE)}, /* P8_40: E7_LCD_DATA7: vout1_d7.pr2_pru0_gpi4 */
|
||||
{VOUT1_D8, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_37A: E8_VOUT1_D8: vout1_d8.gpio8_8 */
|
||||
{VOUT1_D9, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_38A: D9_VOUT1_D9: vout1_d9.gpio8_9 */
|
||||
{VOUT1_D10, (M14 | PIN_INPUT)}, /* P8_36A: D7_VOUT1_D10: vout1_d10.gpio8_10 */
|
||||
{VOUT1_D11, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_34A: D8_VOUT1_D11: vout1_d11.gpio8_11 */
|
||||
{VOUT1_D14, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_31A: C8_VOUT1_D14: vout1_d14.gpio8_14 */
|
||||
{VOUT1_D15, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_32A: C7_VOUT1_D15: vout1_d15.gpio8_15 */
|
||||
{VOUT1_D17, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_11B: B8_GPIO8_17: vout1_d17.gpio8_17 */
|
||||
{VOUT1_D18, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_17: A7_GPIO8_18: vout1_d18.gpio8_18 */
|
||||
{VOUT1_D19, (M12 | PIN_INPUT | MANUAL_MODE)}, /* P8_27B: A8_GPIO8_19: vout1_d19.pr2_pru0_gpi16 */
|
||||
{VOUT1_D20, (M12 | PIN_INPUT | MANUAL_MODE)}, /* P8_28B: C9_GPIO8_20: vout1_d20.pr2_pru0_gpi17 */
|
||||
{VOUT1_D21, (M12 | PIN_INPUT | MANUAL_MODE)}, /* P8_29B: A9_GPIO8_21: vout1_d21.pr2_pru0_gpi18 */
|
||||
{VOUT1_D22, (M12 | PIN_INPUT | MANUAL_MODE)}, /* P8_30B: B9_GPIO8_22: vout1_d22.pr2_pru0_gpi19 */
|
||||
|
||||
/* Ethernet (and USB A overcurrent) */
|
||||
{MDIO_MCLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* V1 MDIO_CLK: mdio_mclk.mdio_mclk */
|
||||
{MDIO_D, (M0 | PIN_INPUT | SLEWCONTROL)}, /* U4 MDIO_D: mdio_d.mdio_d */
|
||||
{UART3_RXD, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* V2 GPIO5_18 (USB A overcurrent): uart3_rxd.gpio5_18 */
|
||||
{UART3_TXD, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* Y1 MII0_INT: uart3_txd.gpio5_19 */
|
||||
{RGMII0_TXC, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* W9 RGMII0_TXC: rgmii0_txc.rgmii0_txc */
|
||||
{RGMII0_TXCTL, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* V9 RGMII0_TXCTL: rgmii0_txctl.rgmii0_txctl */
|
||||
{RGMII0_TXD3, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* V7 RGMII0_TXD3: rgmii0_txd3.rgmii0_txd3 */
|
||||
{RGMII0_TXD2, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* U7 RGMII0_TXD2: rgmii0_txd2.rgmii0_txd2 */
|
||||
{RGMII0_TXD1, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* V6 RGMII0_TXD1: rgmii0_txd1.rgmii0_txd1 */
|
||||
{RGMII0_TXD0, (M0 | PIN_OUTPUT | MANUAL_MODE)}, /* U6 RGMII0_TXD0: rgmii0_txd0.rgmii0_txd0 */
|
||||
{RGMII0_RXC, (M0 | PIN_INPUT | MANUAL_MODE)}, /* U5 RGMII0_RXC: rgmii0_rxc.rgmii0_rxc */
|
||||
{RGMII0_RXCTL, (M0 | PIN_INPUT | MANUAL_MODE)}, /* V5 RGMII0_RXCTL: rgmii0_rxctl.rgmii0_rxctl */
|
||||
{RGMII0_RXD3, (M0 | PIN_INPUT | MANUAL_MODE)}, /* V4 RGMII0_RXD3: rgmii0_rxd3.rgmii0_rxd3 */
|
||||
{RGMII0_RXD2, (M0 | PIN_INPUT | MANUAL_MODE)}, /* V3 RGMII0_RXD2: rgmii0_rxd2.rgmii0_rxd2 */
|
||||
{RGMII0_RXD1, (M0 | PIN_INPUT | MANUAL_MODE)}, /* Y2 RGMII0_RXD1: rgmii0_rxd1.rgmii0_rxd1 */
|
||||
{RGMII0_RXD0, (M0 | PIN_INPUT | MANUAL_MODE)}, /* W2 RGMII0_RXD0: rgmii0_rxd0.rgmii0_rxd0 */
|
||||
|
||||
{USB2_DRVVBUS, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* AC10 USB2_DRVVBUS: usb2_drvvbus.usb2_drvvbus */
|
||||
|
||||
{GPIO6_14, (M3 | PIN_INPUT)}, /* P9_26A: E21_UART10_RXD: gpio6_14.uart10_rxd */
|
||||
{GPIO6_15, (M0 | PIN_INPUT_PULLDOWN)}, /* P9_24: F20_UART10_TXD: gpio6_15.gpio6_15 */
|
||||
{GPIO6_16, (M0 | PIN_INPUT_PULLUP)}, /* F21 PMIC_INT: gpio6_16.gpio6_16 */
|
||||
{XREF_CLK0, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_25: D18_GPIO6_17: xref_clk0.gpio6_17 */
|
||||
{XREF_CLK1, (M14 | PIN_INPUT_PULLDOWN)}, /* P8_09: E17_TIMER14: xref_clk1.gpio6_18 */
|
||||
{XREF_CLK2, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_22A: B26_TIMER15: xref_clk2.gpio6_19 */
|
||||
{XREF_CLK3, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_41A: C23_CLKOUT3: xref_clk3.gpio6_20 */
|
||||
{MCASP1_ACLKR, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_12: B14_MCASP_ACLKR: mcasp1_aclkr.gpio5_0 */
|
||||
{MCASP1_AXR0, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* P9_18B: G12_GPIO5_2: mcasp1_axr0.i2c5_sda */
|
||||
{MCASP1_AXR1, (M10 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* P9_17B: F12_GPIO5_3: mcasp1_axr1.i2c5_scl */
|
||||
{MCASP1_AXR3, (M14 | PIN_INPUT_PULLDOWN)}, /* J11 USR1: mcasp1_axr3.gpio5_5 */
|
||||
{MCASP1_AXR5, (M14 | PIN_OUTPUT_PULLUP)}, /* F13 eMMC_RSTn (missing on schematic): mcasp1_axr5.gpio5_7 */
|
||||
{MCASP1_AXR8, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P9_31A: B12_SPI3_SCLK: mcasp1_axr8.gpio5_10 */
|
||||
{MCASP1_AXR9, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P9_29A: A11_SPI3_D1: mcasp1_axr9.gpio5_11 */
|
||||
{MCASP1_AXR10, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P9_30: B13_SPI3_D0: mcasp1_axr10.gpio5_12 */
|
||||
{MCASP1_AXR11, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P9_28: A12_SPI3_CS0: mcasp1_axr11.gpio4_17 */
|
||||
{MCASP1_AXR12, (M14 | PIN_INPUT | SLEWCONTROL)}, /* P9_42A: E14_GPIO4_18: mcasp1_axr12.gpio4_18 */
|
||||
{MCASP1_AXR13, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P8_10: A13_TIMER10: mcasp1_axr13.gpio6_4 */
|
||||
{MCASP1_AXR14, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P8_07: G14_TIMER11: mcasp1_axr14.gpio6_5 */
|
||||
{MCASP1_AXR15, (M14 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* P8_08: F14_TIMER12: mcasp1_axr15.gpio6_6 */
|
||||
{MCASP3_AXR0, (M4 | PIN_INPUT | SLEWCONTROL)}, /* P9_11A: B19_UART5_RXD: mcasp3_axr0.uart5_rxd */
|
||||
|
||||
/* microSD Socket */
|
||||
{MMC1_CLK, (M0 | PIN_INPUT_PULLUP)}, /* W6: mmc1_clk.mmc1_clk */
|
||||
{MMC1_CMD, (M0 | PIN_INPUT_PULLUP)}, /* Y6: mmc1_cmd.mmc1_cmd */
|
||||
{MMC1_DAT0, (M0 | PIN_INPUT_PULLUP)}, /* AA6: mmc1_dat0.mmc1_dat0 */
|
||||
{MMC1_DAT1, (M0 | PIN_INPUT_PULLUP)}, /* Y4: mmc1_dat1.mmc1_dat1 */
|
||||
{MMC1_DAT2, (M0 | PIN_INPUT_PULLUP)}, /* AA5: mmc1_dat2.mmc1_dat2 */
|
||||
{MMC1_DAT3, (M0 | PIN_INPUT_PULLUP)}, /* Y3: mmc1_dat3.mmc1_dat3 */
|
||||
{MMC1_SDCD, (M14 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* W7: mmc1_sdcd.gpio6_27 */
|
||||
|
||||
{MMC3_CLK, (M14 | PIN_INPUT_PULLUP)}, /* P8_21: AD4_MMC3_CLK: mmc3_clk.gpio6_29 */
|
||||
{MMC3_CMD, (M14 | PIN_INPUT_PULLUP)}, /* P8_20: AC4_MMC3_CMD: mmc3_cmd.gpio6_30 */
|
||||
{MMC3_DAT0, (M14 | PIN_INPUT_PULLUP)}, /* P8_25: AC7_MMC3_DATA0: mmc3_dat0.gpio6_31 */
|
||||
{MMC3_DAT1, (M14 | PIN_INPUT_PULLUP)}, /* P8_24: AC6_MMC3_DATA1: mmc3_dat1.gpio7_0 */
|
||||
{MMC3_DAT2, (M14 | PIN_INPUT_PULLUP)}, /* P8_05: AC9_MMC3_DATA2: mmc3_dat2.gpio7_1 */
|
||||
{MMC3_DAT3, (M14 | PIN_INPUT_PULLUP)}, /* P8_06: AC3_MMC3_DATA3: mmc3_dat3.gpio7_2 */
|
||||
{MMC3_DAT4, (M14 | PIN_INPUT_PULLUP)}, /* P8_23: AC8_MMC3_DATA4: mmc3_dat4.gpio1_22 */
|
||||
{MMC3_DAT5, (M14 | PIN_INPUT_PULLUP)}, /* P8_22: AD6_MMC3_DATA5: mmc3_dat5.gpio1_23 */
|
||||
{MMC3_DAT6, (M14 | PIN_INPUT_PULLUP)}, /* P8_03: AB8_MMC3_DATA6: mmc3_dat6.gpio1_24 */
|
||||
{MMC3_DAT7, (M14 | PIN_INPUT_PULLUP)}, /* P8_04: AB5_MMC3_DATA7: mmc3_dat7.gpio1_25 */
|
||||
{SPI1_CS1, (M14 | PIN_INPUT_PULLDOWN)}, /* P9_23: A22_SPI2_CS1: spi1_cs1.gpio7_11 */
|
||||
{SPI1_CS2, (M6 | PIN_INPUT | SLEWCONTROL)}, /* B21 HDMI_DDC_HPD: spi1_cs2.hdmi1_hpd */
|
||||
{SPI2_SCLK, (M1 | PIN_INPUT)}, /* P9_22B: A26_UART3_RXD: spi2_sclk.uart3_rxd */
|
||||
{SPI2_D0, (M14 | PIN_INPUT | SLEWCONTROL)}, /* P9_18A: G17_SPI2_D0: spi2_d0.gpio7_16 */
|
||||
{SPI2_CS0, (M14 | PIN_INPUT | SLEWCONTROL)}, /* P9_17A: B24_SPI2_CS0: spi2_cs0.gpio7_17 */
|
||||
{DCAN1_TX, (M2 | PIN_INPUT | SLEWCONTROL)}, /* G20 unused: dcan1_tx.uart8_rxd */
|
||||
{DCAN1_RX, (M6 | PIN_INPUT | SLEWCONTROL)}, /* G19 unused: dcan1_rx.hdmi1_cec */
|
||||
|
||||
/* BeagleBone AI: Debug UART */
|
||||
{UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
|
||||
{UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* uart1_txd.uart1_txd */
|
||||
|
||||
/* WiFi MMC */
|
||||
{UART1_CTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* uart1_ctsn.mmc4_clk */
|
||||
{UART1_RTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* uart1_rtsn.mmc4_cmd */
|
||||
{UART2_RXD, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* uart2_rxd.mmc4_dat0 */
|
||||
{UART2_TXD, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* uart2_txd.mmc4_dat1 */
|
||||
{UART2_CTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* uart2_ctsn.mmc4_dat2 */
|
||||
{UART2_RTSN, (M3 | PIN_INPUT_PULLUP | MANUAL_MODE)}, /* uart2_rtsn.mmc4_dat3 */
|
||||
|
||||
/* On-board I2C */
|
||||
{I2C1_SDA, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_sda.i2c1_sda */
|
||||
{I2C1_SCL, (M0 | PIN_INPUT_PULLUP)}, /* i2c1_scl.i2c1_scl */
|
||||
|
||||
/* HDMI I2C */
|
||||
{I2C2_SDA, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_sda.hdmi1_ddc_scl */
|
||||
{I2C2_SCL, (M1 | PIN_INPUT_PULLUP)}, /* i2c2_scl.hdmi1_ddc_sda */
|
||||
|
||||
{ON_OFF, (M0 | PIN_OUTPUT)}, /* Y11: on_off.on_off */
|
||||
{RTC_PORZ, (M0 | PIN_INPUT)}, /* AB17: rtc_porz.rtc_porz */
|
||||
{TMS, (M0 | PIN_INPUT_PULLUP)}, /* F18: tms.tms */
|
||||
{TDI, (M0 | PIN_INPUT_PULLUP | SLEWCONTROL)}, /* D23: tdi.tdi */
|
||||
{TDO, (M0 | PIN_OUTPUT)}, /* F19: tdo.tdo */
|
||||
{TCLK, (M0 | PIN_INPUT_PULLDOWN)}, /* E20: tclk.tclk */
|
||||
{TRSTN, (M0 | PIN_INPUT)}, /* D20: trstn.trstn */
|
||||
{RTCK, (M0 | PIN_OUTPUT)}, /* E18: rtck.rtck */
|
||||
{EMU0, (M0 | PIN_INPUT)}, /* G21: emu0.emu0 */
|
||||
{EMU1, (M0 | PIN_INPUT)}, /* D24: emu1.emu1 */
|
||||
{RESETN, (M0 | PIN_INPUT_PULLUP)}, /* E23: resetn.resetn */
|
||||
{NMIN_DSP, (M0 | PIN_INPUT)}, /* D21: nmin_dsp.nmin_dsp */
|
||||
{RSTOUTN, (M0 | PIN_OUTPUT)}, /* F23: rstoutn.rstoutn */
|
||||
};
|
||||
|
||||
const struct pad_conf_entry core_padconf_array_delta_x15_sr1_1[] = {
|
||||
{MMC1_SDWP, (M14 | PIN_INPUT | SLEWCONTROL)}, /* mmc1_sdwp.gpio6_28 */
|
||||
{VOUT1_CLK, (M0 | PIN_OUTPUT | SLEWCONTROL)}, /* vout1_clk.vout1_clk */
|
||||
|
|
@ -297,6 +494,69 @@ const struct pad_conf_entry core_padconf_array_delta_x15_sr2_0[] = {
|
|||
{VOUT1_D23, (M0 | PIN_OUTPUT | SLEWCONTROL | MANUAL_MODE)}, /* vout1_d23.vout1_d23 */
|
||||
};
|
||||
|
||||
const struct iodelay_cfg_entry iodelay_cfg_array_bbai[] = {
|
||||
{0x0190, 274, 0}, /* CFG_GPMC_A19_OEN */
|
||||
{0x0194, 162, 0}, /* CFG_GPMC_A19_OUT */
|
||||
{0x01A8, 401, 0}, /* CFG_GPMC_A20_OEN */
|
||||
{0x01AC, 73, 0}, /* CFG_GPMC_A20_OUT */
|
||||
{0x01B4, 465, 0}, /* CFG_GPMC_A21_OEN */
|
||||
{0x01B8, 115, 0}, /* CFG_GPMC_A21_OUT */
|
||||
{0x01C0, 633, 0}, /* CFG_GPMC_A22_OEN */
|
||||
{0x01C4, 47, 0}, /* CFG_GPMC_A22_OUT */
|
||||
{0x01D0, 935, 280}, /* CFG_GPMC_A23_OUT */
|
||||
{0x01D8, 621, 0}, /* CFG_GPMC_A24_OEN */
|
||||
{0x01DC, 0, 0}, /* CFG_GPMC_A24_OUT */
|
||||
{0x01E4, 183, 0}, /* CFG_GPMC_A25_OEN */
|
||||
{0x01E8, 0, 0}, /* CFG_GPMC_A25_OUT */
|
||||
{0x01F0, 467, 0}, /* CFG_GPMC_A26_OEN */
|
||||
{0x01F4, 0, 0}, /* CFG_GPMC_A26_OUT */
|
||||
{0x01FC, 262, 0}, /* CFG_GPMC_A27_OEN */
|
||||
{0x0200, 46, 0}, /* CFG_GPMC_A27_OUT */
|
||||
{0x0364, 684, 0}, /* CFG_GPMC_CS1_OEN */
|
||||
{0x0368, 76, 0}, /* CFG_GPMC_CS1_OUT */
|
||||
{0x06F0, 260, 0}, /* CFG_RGMII0_RXC_IN */
|
||||
{0x06FC, 0, 1412}, /* CFG_RGMII0_RXCTL_IN */
|
||||
{0x0708, 123, 1047}, /* CFG_RGMII0_RXD0_IN */
|
||||
{0x0714, 139, 1081}, /* CFG_RGMII0_RXD1_IN */
|
||||
{0x0720, 195, 1100}, /* CFG_RGMII0_RXD2_IN */
|
||||
{0x072C, 239, 1216}, /* CFG_RGMII0_RXD3_IN */
|
||||
{0x0740, 89, 0}, /* CFG_RGMII0_TXC_OUT */
|
||||
{0x074C, 15, 125}, /* CFG_RGMII0_TXCTL_OUT */
|
||||
{0x0758, 339, 162}, /* CFG_RGMII0_TXD0_OUT */
|
||||
{0x0764, 146, 94}, /* CFG_RGMII0_TXD1_OUT */
|
||||
{0x0770, 0, 27}, /* CFG_RGMII0_TXD2_OUT */
|
||||
{0x077C, 291, 205}, /* CFG_RGMII0_TXD3_OUT */
|
||||
{0x0840, 0, 0}, /* CFG_UART1_CTSN_IN */
|
||||
{0x0848, 0, 0}, /* CFG_UART1_CTSN_OUT */
|
||||
{0x084C, 307, 0}, /* CFG_UART1_RTSN_IN */
|
||||
{0x0850, 0, 0}, /* CFG_UART1_RTSN_OEN */
|
||||
{0x0854, 0, 0}, /* CFG_UART1_RTSN_OUT */
|
||||
{0x0870, 785, 0}, /* CFG_UART2_CTSN_IN */
|
||||
{0x0874, 0, 0}, /* CFG_UART2_CTSN_OEN */
|
||||
{0x0878, 0, 0}, /* CFG_UART2_CTSN_OUT */
|
||||
{0x087C, 613, 0}, /* CFG_UART2_RTSN_IN */
|
||||
{0x0880, 0, 0}, /* CFG_UART2_RTSN_OEN */
|
||||
{0x0884, 0, 0}, /* CFG_UART2_RTSN_OUT */
|
||||
{0x0888, 683, 0}, /* CFG_UART2_RXD_IN */
|
||||
{0x088C, 0, 0}, /* CFG_UART2_RXD_OEN */
|
||||
{0x0890, 0, 0}, /* CFG_UART2_RXD_OUT */
|
||||
{0x0894, 835, 0}, /* CFG_UART2_TXD_IN */
|
||||
{0x0898, 0, 0}, /* CFG_UART2_TXD_OEN */
|
||||
{0x089C, 0, 0}, /* CFG_UART2_TXD_OUT */
|
||||
{0x0ABC, 0, 1100}, /* CFG_VIN2A_D19_IN */
|
||||
{0x0AE0, 0, 1300}, /* CFG_VIN2A_D21_IN */
|
||||
{0x0B1C, 0, 1000}, /* CFG_VIN2A_D4_IN */
|
||||
{0x0B28, 0, 1700}, /* CFG_VIN2A_D5_IN */
|
||||
{0x0C18, 0, 500}, /* CFG_VOUT1_D19_IN */
|
||||
{0x0C30, 0, 716}, /* CFG_VOUT1_D20_IN */
|
||||
{0x0C3C, 0, 0}, /* CFG_VOUT1_D21_IN */
|
||||
{0x0C48, 0, 404}, /* CFG_VOUT1_D22_IN */
|
||||
{0x0C78, 0, 0}, /* CFG_VOUT1_D4_IN */
|
||||
{0x0C84, 0, 365}, /* CFG_VOUT1_D5_IN */
|
||||
{0x0C90, 0, 0}, /* CFG_VOUT1_D6_IN */
|
||||
{0x0C9C, 0, 218}, /* CFG_VOUT1_D7_IN */
|
||||
};
|
||||
|
||||
const struct pad_conf_entry core_padconf_array_essential_am574x_idk[] = {
|
||||
{GPMC_A0, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a0.vin4b_d0 */
|
||||
{GPMC_A1, (M6 | PIN_INPUT | MANUAL_MODE)}, /* gpmc_a1.vin4b_d1 */
|
||||
|
|
@ -998,8 +1258,28 @@ const struct pad_conf_entry early_padconf[] = {
|
|||
{UART2_RTSN, (M1 | PIN_INPUT_SLEW)}, /* uart2_rtsn.uart3_txd */
|
||||
{I2C1_SDA, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SDA */
|
||||
{I2C1_SCL, (PIN_INPUT_PULLUP | M0)}, /* I2C1_SCL */
|
||||
|
||||
/* BeagleBone AI: Debug UART */
|
||||
{UART1_RXD, (M0 | PIN_INPUT_PULLDOWN | SLEWCONTROL)}, /* uart1_rxd.uart1_rxd */
|
||||
{UART1_TXD, (M0 | PIN_OUTPUT_PULLDOWN | SLEWCONTROL)}, /* uart1_txd.uart1_txd */
|
||||
};
|
||||
|
||||
#ifdef CONFIG_SUPPORT_EMMC_BOOT
|
||||
const struct pad_conf_entry emmc_padconf[] = {
|
||||
{GPMC_A19, (M1 | PIN_INPUT_PULLUP)}, /* K7: gpmc_a19.mmc2_dat4 */
|
||||
{GPMC_A20, (M1 | PIN_INPUT_PULLUP)}, /* M7: gpmc_a20.mmc2_dat5 */
|
||||
{GPMC_A21, (M1 | PIN_INPUT_PULLUP)}, /* J5: gpmc_a21.mmc2_dat6 */
|
||||
{GPMC_A22, (M1 | PIN_INPUT_PULLUP)}, /* K6: gpmc_a22.mmc2_dat7 */
|
||||
{GPMC_A23, (M1 | PIN_INPUT_PULLUP)}, /* J7: gpmc_a23.mmc2_clk */
|
||||
{GPMC_A24, (M1 | PIN_INPUT_PULLUP)}, /* J4: gpmc_a24.mmc2_dat0 */
|
||||
{GPMC_A25, (M1 | PIN_INPUT_PULLUP)}, /* J6: gpmc_a25.mmc2_dat1 */
|
||||
{GPMC_A26, (M1 | PIN_INPUT_PULLUP)}, /* H4: gpmc_a26.mmc2_dat2 */
|
||||
{GPMC_A27, (M1 | PIN_INPUT_PULLUP)}, /* H5: gpmc_a27.mmc2_dat3 */
|
||||
{GPMC_CS1, (M1 | PIN_INPUT_PULLUP)}, /* H6: gpmc_cs1.mmc2_cmd */
|
||||
{MCASP1_AXR5, (M14 | PIN_OUTPUT_PULLUP)}, /* F13: eMMC_RSTn (missing on schematic): mcasp1_axr5.gpio5_7 */
|
||||
};
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_IODELAY_RECALIBRATION
|
||||
const struct iodelay_cfg_entry iodelay_cfg_array_x15_sr1_1[] = {
|
||||
{0x0114, 2980, 0}, /* CFG_GPMC_A0_IN */
|
||||
|
|
|
|||
|
|
@ -105,10 +105,8 @@ int ft_board_setup(void *blob, bd_t *bd)
|
|||
#if defined(CONFIG_TI_SECURE_DEVICE)
|
||||
/* Make HW RNG reserved for secure world use */
|
||||
ret = fdt_disable_node(blob, "/interconnect@100000/trng@4e10000");
|
||||
if (ret) {
|
||||
if (ret)
|
||||
printf("%s: disabling TRGN failed %d\n", __func__, ret);
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
|
|
|
|||
|
|
@ -14,6 +14,9 @@
|
|||
#include <dm/uclass.h>
|
||||
#include <env.h>
|
||||
#include <i2c.h>
|
||||
#include <mmc.h>
|
||||
#include <errno.h>
|
||||
#include <malloc.h>
|
||||
|
||||
#include "board_detect.h"
|
||||
|
||||
|
|
@ -91,7 +94,7 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
|
|||
rc = uclass_get_device_by_seq(UCLASS_I2C, bus_addr, &bus);
|
||||
if (rc)
|
||||
return rc;
|
||||
rc = i2c_get_chip(bus, dev_addr, 1, &dev);
|
||||
rc = dm_i2c_probe(bus, dev_addr, 0, &dev);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
|
|
@ -171,6 +174,79 @@ static int __maybe_unused ti_i2c_eeprom_get(int bus_addr, int dev_addr,
|
|||
return 0;
|
||||
}
|
||||
|
||||
int __maybe_unused ti_emmc_boardid_get(void)
|
||||
{
|
||||
int rc;
|
||||
struct udevice *dev;
|
||||
struct mmc *mmc;
|
||||
struct ti_common_eeprom *ep;
|
||||
struct ti_am_eeprom brdid;
|
||||
struct blk_desc *bdesc;
|
||||
uchar *buffer;
|
||||
|
||||
ep = TI_EEPROM_DATA;
|
||||
if (ep->header == TI_EEPROM_HEADER_MAGIC)
|
||||
return 0; /* EEPROM has already been read */
|
||||
|
||||
/* Initialize with a known bad marker for emmc fails.. */
|
||||
ep->header = TI_DEAD_EEPROM_MAGIC;
|
||||
ep->name[0] = 0x0;
|
||||
ep->version[0] = 0x0;
|
||||
ep->serial[0] = 0x0;
|
||||
ep->config[0] = 0x0;
|
||||
|
||||
/* uclass object initialization */
|
||||
rc = mmc_initialize(NULL);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Set device to /dev/mmcblk1 */
|
||||
rc = uclass_get_device(UCLASS_MMC, 1, &dev);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
/* Grab the mmc device */
|
||||
mmc = mmc_get_mmc_dev(dev);
|
||||
if (!mmc)
|
||||
return -ENODEV;
|
||||
|
||||
/* mmc hardware initialization routine */
|
||||
mmc_init(mmc);
|
||||
|
||||
/* Set partition to /dev/mmcblk1boot1 */
|
||||
rc = mmc_switch_part(mmc, 2);
|
||||
if (rc)
|
||||
return rc;
|
||||
|
||||
buffer = malloc(mmc->read_bl_len);
|
||||
if (!buffer)
|
||||
return -ENOMEM;
|
||||
|
||||
bdesc = mmc_get_blk_desc(mmc);
|
||||
|
||||
/* blk_dread returns the number of blocks read*/
|
||||
if (blk_dread(bdesc, 0L, 1, buffer) != 1) {
|
||||
rc = -EIO;
|
||||
goto cleanup;
|
||||
}
|
||||
|
||||
memcpy(&brdid, buffer, sizeof(brdid));
|
||||
|
||||
/* Write out the ep struct values */
|
||||
ep->header = brdid.header;
|
||||
strlcpy(ep->name, brdid.name, TI_EEPROM_HDR_NAME_LEN + 1);
|
||||
ti_eeprom_string_cleanup(ep->name);
|
||||
strlcpy(ep->version, brdid.version, TI_EEPROM_HDR_REV_LEN + 1);
|
||||
ti_eeprom_string_cleanup(ep->version);
|
||||
strlcpy(ep->serial, brdid.serial, TI_EEPROM_HDR_SERIAL_LEN + 1);
|
||||
ti_eeprom_string_cleanup(ep->serial);
|
||||
|
||||
cleanup:
|
||||
free(buffer);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
int __maybe_unused ti_i2c_eeprom_am_set(const char *name, const char *rev)
|
||||
{
|
||||
struct ti_common_eeprom *ep;
|
||||
|
|
@ -472,6 +548,15 @@ int __maybe_unused ti_i2c_eeprom_am6_get_base(int bus_addr, int dev_addr)
|
|||
return ret;
|
||||
}
|
||||
|
||||
bool __maybe_unused board_ti_k3_is(char *name_tag)
|
||||
{
|
||||
struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
|
||||
|
||||
if (ep->header == TI_DEAD_EEPROM_MAGIC)
|
||||
return false;
|
||||
return !strncmp(ep->name, name_tag, AM6_EEPROM_HDR_NAME_LEN);
|
||||
}
|
||||
|
||||
bool __maybe_unused board_ti_is(char *name_tag)
|
||||
{
|
||||
struct ti_common_eeprom *ep = TI_EEPROM_DATA;
|
||||
|
|
|
|||
|
|
@ -267,6 +267,15 @@ struct ti_am6_eeprom {
|
|||
*/
|
||||
int ti_i2c_eeprom_am_get(int bus_addr, int dev_addr);
|
||||
|
||||
/**
|
||||
* ti_emmc_boardid_get() - Fetch board ID information from eMMC
|
||||
*
|
||||
* ep in SRAM is populated by the this function that is currently
|
||||
* based on BeagleBone AI, but could be made more general across AM*
|
||||
* platforms.
|
||||
*/
|
||||
int __maybe_unused ti_emmc_boardid_get(void);
|
||||
|
||||
/**
|
||||
* ti_i2c_eeprom_dra7_get() - Consolidated eeprom data for DRA7 TI EVMs
|
||||
* @bus_addr: I2C bus address
|
||||
|
|
@ -310,6 +319,15 @@ int __maybe_unused ti_i2c_eeprom_am6_get_base(int bus_addr, int dev_addr);
|
|||
*/
|
||||
bool board_ti_is(char *name_tag);
|
||||
|
||||
/**
|
||||
* board_ti_k3_is() - Board detection logic for TI K3 EVMs
|
||||
* @name_tag: Tag used in eeprom for the board
|
||||
*
|
||||
* Return: false if board information does not match OR eeprom wasn't read.
|
||||
* true otherwise
|
||||
*/
|
||||
bool board_ti_k3_is(char *name_tag);
|
||||
|
||||
/**
|
||||
* board_ti_rev_is() - Compare board revision for TI EVMs
|
||||
* @rev_tag: Revision tag to check in eeprom
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#include <env.h>
|
||||
#include <fdt_support.h>
|
||||
#include <init.h>
|
||||
#include <spl.h>
|
||||
#include <palmas.h>
|
||||
#include <sata.h>
|
||||
#include <serial.h>
|
||||
|
|
@ -32,7 +33,6 @@
|
|||
#include <dwc3-omap-uboot.h>
|
||||
#include <i2c.h>
|
||||
#include <ti-usb-phy-uboot.h>
|
||||
#include <miiphy.h>
|
||||
|
||||
#include "mux_data.h"
|
||||
#include "../common/board_detect.h"
|
||||
|
|
@ -48,10 +48,6 @@
|
|||
#define board_ti_get_emif_size() board_ti_get_emif1_size() + \
|
||||
board_ti_get_emif2_size()
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
#include <cpsw.h>
|
||||
#endif
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
/* GPIO 7_11 */
|
||||
|
|
@ -992,106 +988,6 @@ int spl_start_uboot(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_DRIVER_TI_CPSW
|
||||
extern u32 *const omap_si_rev;
|
||||
|
||||
static void cpsw_control(int enabled)
|
||||
{
|
||||
/* VTP can be added here */
|
||||
|
||||
return;
|
||||
}
|
||||
|
||||
static struct cpsw_slave_data cpsw_slaves[] = {
|
||||
{
|
||||
.slave_reg_ofs = 0x208,
|
||||
.sliver_reg_ofs = 0xd80,
|
||||
.phy_addr = 2,
|
||||
},
|
||||
{
|
||||
.slave_reg_ofs = 0x308,
|
||||
.sliver_reg_ofs = 0xdc0,
|
||||
.phy_addr = 3,
|
||||
},
|
||||
};
|
||||
|
||||
static struct cpsw_platform_data cpsw_data = {
|
||||
.mdio_base = CPSW_MDIO_BASE,
|
||||
.cpsw_base = CPSW_BASE,
|
||||
.mdio_div = 0xff,
|
||||
.channels = 8,
|
||||
.cpdma_reg_ofs = 0x800,
|
||||
.slaves = 2,
|
||||
.slave_data = cpsw_slaves,
|
||||
.ale_reg_ofs = 0xd00,
|
||||
.ale_entries = 1024,
|
||||
.host_port_reg_ofs = 0x108,
|
||||
.hw_stats_reg_ofs = 0x900,
|
||||
.bd_ram_ofs = 0x2000,
|
||||
.mac_control = (1 << 5),
|
||||
.control = cpsw_control,
|
||||
.host_port_num = 0,
|
||||
.version = CPSW_CTRL_VERSION_2,
|
||||
};
|
||||
|
||||
int board_eth_init(bd_t *bis)
|
||||
{
|
||||
int ret;
|
||||
uint8_t mac_addr[6];
|
||||
uint32_t mac_hi, mac_lo;
|
||||
uint32_t ctrl_val;
|
||||
|
||||
/* try reading mac address from efuse */
|
||||
mac_lo = readl((*ctrl)->control_core_mac_id_0_lo);
|
||||
mac_hi = readl((*ctrl)->control_core_mac_id_0_hi);
|
||||
mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
|
||||
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
||||
mac_addr[2] = mac_hi & 0xFF;
|
||||
mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
|
||||
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
|
||||
mac_addr[5] = mac_lo & 0xFF;
|
||||
|
||||
if (!env_get("ethaddr")) {
|
||||
printf("<ethaddr> not set. Validating first E-fuse MAC\n");
|
||||
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("ethaddr", mac_addr);
|
||||
}
|
||||
|
||||
mac_lo = readl((*ctrl)->control_core_mac_id_1_lo);
|
||||
mac_hi = readl((*ctrl)->control_core_mac_id_1_hi);
|
||||
mac_addr[0] = (mac_hi & 0xFF0000) >> 16;
|
||||
mac_addr[1] = (mac_hi & 0xFF00) >> 8;
|
||||
mac_addr[2] = mac_hi & 0xFF;
|
||||
mac_addr[3] = (mac_lo & 0xFF0000) >> 16;
|
||||
mac_addr[4] = (mac_lo & 0xFF00) >> 8;
|
||||
mac_addr[5] = mac_lo & 0xFF;
|
||||
|
||||
if (!env_get("eth1addr")) {
|
||||
if (is_valid_ethaddr(mac_addr))
|
||||
eth_env_set_enetaddr("eth1addr", mac_addr);
|
||||
}
|
||||
|
||||
ctrl_val = readl((*ctrl)->control_core_control_io1) & (~0x33);
|
||||
ctrl_val |= 0x22;
|
||||
writel(ctrl_val, (*ctrl)->control_core_control_io1);
|
||||
|
||||
if (*omap_si_rev == DRA722_ES1_0)
|
||||
cpsw_data.active_slave = 1;
|
||||
|
||||
if (board_is_dra72x_revc_or_later()) {
|
||||
cpsw_slaves[0].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
|
||||
cpsw_slaves[1].phy_if = PHY_INTERFACE_MODE_RGMII_ID;
|
||||
}
|
||||
|
||||
ret = cpsw_register(&cpsw_data);
|
||||
if (ret < 0)
|
||||
printf("Error %d registering CPSW switch\n", ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_BOARD_EARLY_INIT_F
|
||||
/* VTT regulator enable */
|
||||
static inline void vtt_regulator_enable(void)
|
||||
|
|
|
|||
|
|
@ -11,6 +11,8 @@ config TARGET_J721E_A72_EVM
|
|||
bool "TI K3 based J721E EVM running on A72"
|
||||
select ARM64
|
||||
select SOC_K3_J721E
|
||||
select BOARD_LATE_INIT
|
||||
imply TI_I2C_BOARD_DETECT
|
||||
select SYS_DISABLE_DCACHE_OPS
|
||||
|
||||
config TARGET_J721E_R5_EVM
|
||||
|
|
@ -23,6 +25,7 @@ config TARGET_J721E_R5_EVM
|
|||
select SPL_RAM
|
||||
select K3_J721E_DDRSS
|
||||
imply SYS_K3_SPL_ATF
|
||||
imply TI_I2C_BOARD_DETECT
|
||||
|
||||
endchoice
|
||||
|
||||
|
|
@ -37,6 +40,8 @@ config SYS_VENDOR
|
|||
config SYS_CONFIG_NAME
|
||||
default "j721e_evm"
|
||||
|
||||
source "board/ti/common/Kconfig"
|
||||
|
||||
endif
|
||||
|
||||
if TARGET_J721E_R5_EVM
|
||||
|
|
@ -53,4 +58,6 @@ config SYS_CONFIG_NAME
|
|||
config SPL_LDSCRIPT
|
||||
default "arch/arm/mach-omap2/u-boot-spl.lds"
|
||||
|
||||
source "board/ti/common/Kconfig"
|
||||
|
||||
endif
|
||||
|
|
|
|||
|
|
@ -9,10 +9,21 @@
|
|||
|
||||
#include <common.h>
|
||||
#include <init.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
#include <asm/arch/hardware.h>
|
||||
#include <asm/gpio.h>
|
||||
#include <asm/io.h>
|
||||
#include <spl.h>
|
||||
#include <asm/arch/sys_proto.h>
|
||||
|
||||
#include "../common/board_detect.h"
|
||||
|
||||
#define board_is_j721e_som() (board_ti_k3_is("J721EX-PM1-SOM") || \
|
||||
board_ti_k3_is("J721EX-PM2-SOM"))
|
||||
|
||||
/* Max number of MAC addresses that are parsed/processed per daughter card */
|
||||
#define DAUGHTER_CARD_NO_OF_MAC_ADDR 8
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
int board_init(void)
|
||||
|
|
@ -81,3 +92,256 @@ int ft_board_setup(void *blob, bd_t *bd)
|
|||
return ret;
|
||||
}
|
||||
#endif
|
||||
|
||||
int do_board_detect(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
ret = ti_i2c_eeprom_am6_get_base(CONFIG_EEPROM_BUS_ADDRESS,
|
||||
CONFIG_EEPROM_CHIP_ADDRESS);
|
||||
if (ret)
|
||||
pr_err("Reading on-board EEPROM at 0x%02x failed %d\n",
|
||||
CONFIG_EEPROM_CHIP_ADDRESS, ret);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
int checkboard(void)
|
||||
{
|
||||
struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
|
||||
|
||||
if (do_board_detect())
|
||||
/* EEPROM not populated */
|
||||
printf("Board: %s rev %s\n", "J721EX-PM1-SOM", "E2");
|
||||
else
|
||||
printf("Board: %s rev %s\n", ep->name, ep->version);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void setup_board_eeprom_env(void)
|
||||
{
|
||||
char *name = "j721e";
|
||||
|
||||
if (do_board_detect())
|
||||
goto invalid_eeprom;
|
||||
|
||||
if (board_is_j721e_som())
|
||||
name = "j721e";
|
||||
else
|
||||
printf("Unidentified board claims %s in eeprom header\n",
|
||||
board_ti_get_name());
|
||||
|
||||
invalid_eeprom:
|
||||
set_board_info_env_am6(name);
|
||||
}
|
||||
|
||||
static void setup_serial(void)
|
||||
{
|
||||
struct ti_am6_eeprom *ep = TI_AM6_EEPROM_DATA;
|
||||
unsigned long board_serial;
|
||||
char *endp;
|
||||
char serial_string[17] = { 0 };
|
||||
|
||||
if (env_get("serial#"))
|
||||
return;
|
||||
|
||||
board_serial = simple_strtoul(ep->serial, &endp, 16);
|
||||
if (*endp != '\0') {
|
||||
pr_err("Error: Can't set serial# to %s\n", ep->serial);
|
||||
return;
|
||||
}
|
||||
|
||||
snprintf(serial_string, sizeof(serial_string), "%016lx", board_serial);
|
||||
env_set("serial#", serial_string);
|
||||
}
|
||||
|
||||
/*
|
||||
* Declaration of daughtercards to probe. Note that when adding more
|
||||
* cards they should be grouped by the 'i2c_addr' field to allow for a
|
||||
* more efficient probing process.
|
||||
*/
|
||||
static const struct {
|
||||
u8 i2c_addr; /* I2C address of card EEPROM */
|
||||
char *card_name; /* EEPROM-programmed card name */
|
||||
char *dtbo_name; /* Device tree overlay to apply */
|
||||
u8 eth_offset; /* ethXaddr MAC address index offset */
|
||||
} ext_cards[] = {
|
||||
{
|
||||
0x51,
|
||||
"J7X-BASE-CPB",
|
||||
"", /* No dtbo for this board */
|
||||
0,
|
||||
},
|
||||
{
|
||||
0x52,
|
||||
"J7X-INFOTAN-EXP",
|
||||
"", /* No dtbo for this board */
|
||||
0,
|
||||
},
|
||||
{
|
||||
0x52,
|
||||
"J7X-GESI-EXP",
|
||||
"", /* No dtbo for this board */
|
||||
5, /* Start populating from eth5addr */
|
||||
},
|
||||
{
|
||||
0x54,
|
||||
"J7X-VSC8514-ETH",
|
||||
"", /* No dtbo for this board */
|
||||
1, /* Start populating from eth1addr */
|
||||
},
|
||||
};
|
||||
|
||||
static bool daughter_card_detect_flags[ARRAY_SIZE(ext_cards)];
|
||||
|
||||
const char *board_fit_get_additionnal_images(int index, const char *type)
|
||||
{
|
||||
int i, j;
|
||||
|
||||
if (strcmp(type, FIT_FDT_PROP))
|
||||
return NULL;
|
||||
|
||||
j = 0;
|
||||
for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
|
||||
if (daughter_card_detect_flags[i]) {
|
||||
if (j == index) {
|
||||
/*
|
||||
* Return dtbo name only if populated,
|
||||
* otherwise stop parsing here.
|
||||
*/
|
||||
if (strlen(ext_cards[i].dtbo_name))
|
||||
return ext_cards[i].dtbo_name;
|
||||
else
|
||||
return NULL;
|
||||
};
|
||||
|
||||
j++;
|
||||
}
|
||||
}
|
||||
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int probe_daughtercards(void)
|
||||
{
|
||||
char mac_addr[DAUGHTER_CARD_NO_OF_MAC_ADDR][TI_EEPROM_HDR_ETH_ALEN];
|
||||
bool eeprom_read_success;
|
||||
struct ti_am6_eeprom ep;
|
||||
u8 previous_i2c_addr;
|
||||
u8 mac_addr_cnt;
|
||||
int i;
|
||||
int ret;
|
||||
|
||||
/* Mark previous I2C address variable as not populated */
|
||||
previous_i2c_addr = 0xff;
|
||||
|
||||
/* No EEPROM data was read yet */
|
||||
eeprom_read_success = false;
|
||||
|
||||
/* Iterate through list of daughtercards */
|
||||
for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
|
||||
/* Obtain card-specific I2C address */
|
||||
u8 i2c_addr = ext_cards[i].i2c_addr;
|
||||
|
||||
/* Read card EEPROM if not already read previously */
|
||||
if (i2c_addr != previous_i2c_addr) {
|
||||
/* Store I2C address so we can avoid reading twice */
|
||||
previous_i2c_addr = i2c_addr;
|
||||
|
||||
/* Get and parse the daughter card EEPROM record */
|
||||
ret = ti_i2c_eeprom_am6_get(CONFIG_EEPROM_BUS_ADDRESS,
|
||||
i2c_addr,
|
||||
&ep,
|
||||
(char **)mac_addr,
|
||||
DAUGHTER_CARD_NO_OF_MAC_ADDR,
|
||||
&mac_addr_cnt);
|
||||
if (ret) {
|
||||
debug("%s: No daughtercard EEPROM at 0x%02x found %d\n",
|
||||
__func__, i2c_addr, ret);
|
||||
eeprom_read_success = false;
|
||||
/* Skip to the next daughtercard to probe */
|
||||
continue;
|
||||
}
|
||||
|
||||
/* EEPROM read successful, okay to further process. */
|
||||
eeprom_read_success = true;
|
||||
}
|
||||
|
||||
/* Only continue processing if EEPROM data was read */
|
||||
if (!eeprom_read_success)
|
||||
continue;
|
||||
|
||||
/* Only process the parsed data if we found a match */
|
||||
if (strncmp(ep.name, ext_cards[i].card_name, sizeof(ep.name)))
|
||||
continue;
|
||||
|
||||
printf("Detected: %s rev %s\n", ep.name, ep.version);
|
||||
daughter_card_detect_flags[i] = true;
|
||||
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
int j;
|
||||
/*
|
||||
* Populate any MAC addresses from daughtercard into the U-Boot
|
||||
* environment, starting with a card-specific offset so we can
|
||||
* have multiple ext_cards contribute to the MAC pool in a well-
|
||||
* defined manner.
|
||||
*/
|
||||
for (j = 0; j < mac_addr_cnt; j++) {
|
||||
if (!is_valid_ethaddr((u8 *)mac_addr[j]))
|
||||
continue;
|
||||
|
||||
eth_env_set_enetaddr_by_index("eth",
|
||||
ext_cards[i].eth_offset + j,
|
||||
(uchar *)mac_addr[j]);
|
||||
}
|
||||
#endif
|
||||
}
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
char name_overlays[1024] = { 0 };
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ext_cards); i++) {
|
||||
if (!daughter_card_detect_flags[i])
|
||||
continue;
|
||||
|
||||
/* Skip if no overlays are to be added */
|
||||
if (!strlen(ext_cards[i].dtbo_name))
|
||||
continue;
|
||||
|
||||
/*
|
||||
* Make sure we are not running out of buffer space by checking
|
||||
* if we can fit the new overlay, a trailing space to be used
|
||||
* as a separator, plus the terminating zero.
|
||||
*/
|
||||
if (strlen(name_overlays) + strlen(ext_cards[i].dtbo_name) + 2 >
|
||||
sizeof(name_overlays))
|
||||
return -ENOMEM;
|
||||
|
||||
/* Append to our list of overlays */
|
||||
strcat(name_overlays, ext_cards[i].dtbo_name);
|
||||
strcat(name_overlays, " ");
|
||||
}
|
||||
|
||||
/* Apply device tree overlay(s) to the U-Boot environment, if any */
|
||||
if (strlen(name_overlays))
|
||||
return env_set("name_overlays", name_overlays);
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int board_late_init(void)
|
||||
{
|
||||
setup_board_eeprom_env();
|
||||
setup_serial();
|
||||
|
||||
/* Check for and probe any plugged-in daughtercards */
|
||||
probe_daughtercards();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
void spl_board_init(void)
|
||||
{
|
||||
probe_daughtercards();
|
||||
}
|
||||
|
|
|
|||
|
|
@ -31,13 +31,16 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),1
|
|||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
|
||||
CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
|
||||
CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_CLK_CDCE9XX=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_NAND=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_DM_MMC=y
|
||||
|
|
@ -49,7 +52,6 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SF_DEFAULT_SPEED=24000000
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_DRIVER_TI_CPSW=y
|
||||
CONFIG_SPI=y
|
||||
|
|
@ -59,6 +61,8 @@ CONFIG_TIMER=y
|
|||
CONFIG_OMAP_TIMER=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_SPL_DM_USB_GADGET=y
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
CONFIG_USB_MUSB_GADGET=y
|
||||
CONFIG_USB_MUSB_TI=y
|
||||
|
|
@ -66,8 +70,11 @@ CONFIG_USB_GADGET=y
|
|||
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_USB_ETHER=y
|
||||
CONFIG_WDT=y
|
||||
# CONFIG_SPL_WDT is not set
|
||||
CONFIG_DYNAMIC_CRC_TABLE=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_LZO=y
|
||||
# CONFIG_OF_LIBFDT_OVERLAY is not set
|
||||
|
|
|
|||
|
|
@ -33,13 +33,16 @@ CONFIG_MTDPARTS_DEFAULT="mtdparts=nand.0:128k(NAND.SPL),128k(NAND.SPL.backup1),1
|
|||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="am335x-evm"
|
||||
CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2"
|
||||
CONFIG_OF_LIST="am335x-evm am335x-bone am335x-boneblack am335x-evmsk am335x-bonegreen am335x-icev2 am335x-pocketbeagle"
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_BOOTCOUNT_LIMIT=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_CLK_CDCE9XX=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_NAND=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_DM_MMC=y
|
||||
|
|
@ -51,7 +54,6 @@ CONFIG_DM_SPI_FLASH=y
|
|||
CONFIG_SF_DEFAULT_SPEED=24000000
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_DRIVER_TI_CPSW=y
|
||||
CONFIG_SPI=y
|
||||
|
|
@ -61,6 +63,8 @@ CONFIG_TIMER=y
|
|||
CONFIG_OMAP_TIMER=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_SPL_DM_USB_GADGET=y
|
||||
CONFIG_USB_MUSB_HOST=y
|
||||
CONFIG_USB_MUSB_GADGET=y
|
||||
CONFIG_USB_MUSB_TI=y
|
||||
|
|
@ -68,8 +72,11 @@ CONFIG_USB_GADGET=y
|
|||
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xd022
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_USB_ETHER=y
|
||||
CONFIG_WDT=y
|
||||
# CONFIG_SPL_WDT is not set
|
||||
CONFIG_DYNAMIC_CRC_TABLE=y
|
||||
CONFIG_SPL_TINY_MEMSET=y
|
||||
CONFIG_RSA=y
|
||||
CONFIG_LZO=y
|
||||
# CONFIG_OF_LIBFDT_OVERLAY is not set
|
||||
|
|
|
|||
|
|
@ -9,6 +9,7 @@ CONFIG_AM43XX=y
|
|||
CONFIG_TI_SECURE_EMIF_REGION_START=0xbdb00000
|
||||
CONFIG_TI_SECURE_EMIF_TOTAL_REGION_SIZE=0x02000000
|
||||
CONFIG_TI_SECURE_EMIF_PROTECTED_REGION_SIZE=0x01c00000
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_ENV_SIZE=0x10000
|
||||
CONFIG_SPL=y
|
||||
CONFIG_SPL_TEXT_BASE=0x403018E0
|
||||
|
|
@ -41,10 +42,17 @@ CONFIG_OF_LIST="am437x-gp-evm am437x-sk-evm am43x-epos-evm am437x-idk-evm"
|
|||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_CLK_CDCE9XX=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_DFU_SF=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_OMAP_HS=y
|
||||
CONFIG_MTD=y
|
||||
|
|
@ -54,6 +62,9 @@ CONFIG_SPI_FLASH_MACRONIX=y
|
|||
CONFIG_PHY_GIGE=y
|
||||
CONFIG_MII=y
|
||||
CONFIG_DRIVER_TI_CPSW=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_SPL_PHY=y
|
||||
CONFIG_OMAP_USB2_PHY=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_TI_QSPI=y
|
||||
|
|
@ -61,10 +72,13 @@ CONFIG_TIMER=y
|
|||
CONFIG_OMAP_TIMER=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_SPL_DM_USB_GADGET=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_OMAP=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_DWC3_PHY_OMAP=y
|
||||
CONFIG_OMAP_USB_PHY=y
|
||||
CONFIG_USB_GADGET=y
|
||||
|
|
@ -72,3 +86,4 @@ CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
|||
CONFIG_USB_GADGET_VENDOR_NUM=0x0403
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0xbd00
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_USB_ETHER=y
|
||||
|
|
|
|||
|
|
@ -16,6 +16,7 @@ CONFIG_SPL_LOAD_FIT=y
|
|||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_USE_BOOTARGS=y
|
||||
CONFIG_BOOTARGS="androidboot.serialno=${serial#} console=ttyS2,115200 androidboot.console=ttyS2 androidboot.hardware=beagle_x15board"
|
||||
CONFIG_PREBOOT="if $board_name=am5729_beaglebonai; then setenv console ttyS0,115200; fi;"
|
||||
# CONFIG_USE_BOOTCOMMAND is not set
|
||||
CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
||||
# CONFIG_MISC_INIT_R is not set
|
||||
|
|
@ -38,7 +39,7 @@ CONFIG_CMD_BCB=y
|
|||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="am572x-idk"
|
||||
CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am572x-idk am571x-idk am574x-idk"
|
||||
CONFIG_OF_LIST="am57xx-beagle-x15 am57xx-beagle-x15-revb1 am57xx-beagle-x15-revc am5729-beagleboneai am572x-idk am571x-idk am574x-idk"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x280000
|
||||
|
|
|
|||
|
|
@ -21,6 +21,7 @@ CONFIG_DISTRO_DEFAULTS=y
|
|||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_OF_BOARD_SETUP=y
|
||||
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
|
||||
CONFIG_CONSOLE_MUX=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
|
|
@ -32,11 +33,13 @@ CONFIG_SPL_DM_RESET=y
|
|||
CONFIG_SPL_POWER_DOMAIN=y
|
||||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_PCI=y
|
||||
CONFIG_CMD_REMOTEPROC=y
|
||||
CONFIG_CMD_USB=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TIME=y
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
|
|
@ -54,9 +57,12 @@ CONFIG_DM=y
|
|||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_TI_SCI=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_DMA_CHANNELS=y
|
||||
CONFIG_TI_K3_NAVSS_UDMA=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
|
|
@ -65,10 +71,13 @@ CONFIG_DM_PCA953X=y
|
|||
CONFIG_DM_I2C=y
|
||||
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
||||
CONFIG_SYS_I2C_OMAP24XX=y
|
||||
CONFIG_DM_KEYBOARD=y
|
||||
CONFIG_DM_MAILBOX=y
|
||||
CONFIG_K3_SEC_PROXY=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_ADMA=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_PHY_TI=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
|
|
@ -81,6 +90,7 @@ CONFIG_DM_PCI=y
|
|||
CONFIG_PCI_KEYSTONE=y
|
||||
CONFIG_PHY=y
|
||||
CONFIG_AM654_PHY=y
|
||||
CONFIG_OMAP_USB2_PHY=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
|
|
@ -96,5 +106,19 @@ CONFIG_SOC_TI=y
|
|||
CONFIG_SYSRESET=y
|
||||
CONFIG_SPL_SYSRESET=y
|
||||
CONFIG_SYSRESET_TI_SCI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_XHCI_DWC3=y
|
||||
CONFIG_USB_DWC3=y
|
||||
CONFIG_USB_DWC3_GADGET=y
|
||||
CONFIG_USB_DWC3_GENERIC=y
|
||||
CONFIG_USB_KEYBOARD=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x6162
|
||||
CONFIG_USB_GADGET_DOWNLOAD=y
|
||||
CONFIG_FAT_WRITE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
|
|||
|
|
@ -74,6 +74,7 @@ CONFIG_MISC=y
|
|||
CONFIG_K3_AVS0=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
|
|
|
|||
|
|
@ -5,10 +5,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SOC_K3_J721E=y
|
||||
CONFIG_TARGET_J721E_A72_EVM=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x680000
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
|
|
@ -21,23 +22,30 @@ CONFIG_DISTRO_DEFAULTS=y
|
|||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_kern_${boot}; run get_fdt_${boot}; run get_overlay_${boot}; run run_kern"
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C_SUPPORT=y
|
||||
CONFIG_SPL_DM_MAILBOX=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_POWER_SUPPORT=y
|
||||
CONFIG_SPL_POWER_DOMAIN=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
|
||||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_REMOTEPROC=y
|
||||
CONFIG_CMD_UFS=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
|
|
@ -50,6 +58,9 @@ CONFIG_SPL_OF_CONTROL=y
|
|||
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
|
||||
CONFIG_SPL_MULTI_DTB_FIT=y
|
||||
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x700000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_DM=y
|
||||
|
|
@ -62,14 +73,27 @@ CONFIG_SPL_OF_TRANSLATE=y
|
|||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_TI_SCI=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_DFU_SF=y
|
||||
CONFIG_DMA_CHANNELS=y
|
||||
CONFIG_TI_K3_NAVSS_UDMA=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_OMAP24XX=y
|
||||
CONFIG_DM_MAILBOX=y
|
||||
CONFIG_K3_SEC_PROXY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_ADMA=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_MTD=y
|
||||
|
|
@ -93,6 +117,7 @@ CONFIG_SPL_PINCTRL=y
|
|||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_TI_SCI_POWER_DOMAIN=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_REMOTEPROC_TI_K3_DSP=y
|
||||
CONFIG_REMOTEPROC_TI_K3_R5F=y
|
||||
CONFIG_DM_RESET=y
|
||||
|
|
@ -107,7 +132,21 @@ CONFIG_CADENCE_QSPI=y
|
|||
CONFIG_SYSRESET=y
|
||||
CONFIG_SPL_SYSRESET=y
|
||||
CONFIG_SYSRESET_TI_SCI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_SPL_DM_USB_GADGET=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_CDNS3=y
|
||||
CONFIG_USB_CDNS3_GADGET=y
|
||||
CONFIG_USB_CDNS3_HOST=y
|
||||
CONFIG_SPL_USB_CDNS3_GADGET=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
|
||||
CONFIG_UFS=y
|
||||
CONFIG_CADENCE_UFS=y
|
||||
CONFIG_TI_J721E_UFS=y
|
||||
CONFIG_FAT_WRITE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
|
|||
|
|
@ -6,10 +6,11 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
|||
CONFIG_SYS_MALLOC_F_LEN=0x55000
|
||||
CONFIG_SOC_K3_J721E=y
|
||||
CONFIG_TARGET_J721E_R5_EVM=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x680000
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
|
|
@ -46,6 +47,9 @@ CONFIG_CMD_FAT=y
|
|||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x700000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_SPL_DM=y
|
||||
|
|
@ -69,6 +73,7 @@ CONFIG_FS_LOADER=y
|
|||
CONFIG_K3_AVS0=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
|
|
|
|||
|
|
@ -0,0 +1,155 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x8000
|
||||
CONFIG_SOC_K3_J721E=y
|
||||
CONFIG_TARGET_J721E_A72_EVM=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x680000
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_NR_DRAM_BANKS=2
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
# CONFIG_PSCI_RESET is not set
|
||||
CONFIG_SPL_TEXT_BASE=0x80080000
|
||||
CONFIG_DISTRO_DEFAULTS=y
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_BOOTCOMMAND="run findfdt; run envboot; run init_${boot}; run boot_rprocs; run get_fit_${boot}; run get_overlaystring; run run_fit"
|
||||
CONFIG_SPL_BOARD_INIT=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C_SUPPORT=y
|
||||
CONFIG_SPL_DM_MAILBOX=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_POWER_SUPPORT=y
|
||||
CONFIG_SPL_POWER_DOMAIN=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_CMD_DFU=y
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x280000
|
||||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
CONFIG_CMD_ASKENV=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_I2C=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_MTD=y
|
||||
CONFIG_CMD_REMOTEPROC=y
|
||||
CONFIG_CMD_UFS=y
|
||||
CONFIG_CMD_USB=y
|
||||
CONFIG_CMD_USB_MASS_STORAGE=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_EXT4_WRITE=y
|
||||
CONFIG_MTDIDS_DEFAULT="nor0=47040000.spi.0,nor0=47034000.hyperbus"
|
||||
CONFIG_MTDPARTS_DEFAULT="mtdparts=47034000.hyperbus:512k(hbmc.tiboot3),2m(hbmc.tispl),4m(hbmc.u-boot),256k(hbmc.env),1m(hbmc.sysfw),-@8m(hbmc.rootfs)"
|
||||
# CONFIG_ISO_PARTITION is not set
|
||||
# CONFIG_SPL_EFI_PARTITION is not set
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-common-proc-board"
|
||||
CONFIG_SPL_MULTI_DTB_FIT=y
|
||||
CONFIG_SPL_MULTI_DTB_FIT_NO_COMPRESSION=y
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x700000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_NET_RANDOM_ETHADDR=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SYSCON=y
|
||||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_TI_SCI=y
|
||||
CONFIG_DFU_MMC=y
|
||||
CONFIG_DFU_RAM=y
|
||||
CONFIG_DFU_SF=y
|
||||
CONFIG_DMA_CHANNELS=y
|
||||
CONFIG_TI_K3_NAVSS_UDMA=y
|
||||
CONFIG_USB_FUNCTION_FASTBOOT=y
|
||||
CONFIG_FASTBOOT_BUF_ADDR=0x82000000
|
||||
CONFIG_FASTBOOT_BUF_SIZE=0x2F000000
|
||||
CONFIG_FASTBOOT_FLASH=y
|
||||
CONFIG_FASTBOOT_FLASH_MMC_DEV=0
|
||||
CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_SYS_I2C_OMAP24XX=y
|
||||
CONFIG_DM_MAILBOX=y
|
||||
CONFIG_K3_SEC_PROXY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_ADMA=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_MTD=y
|
||||
CONFIG_MTD_NOR_FLASH=y
|
||||
CONFIG_FLASH_CFI_DRIVER=y
|
||||
CONFIG_CFI_FLASH=y
|
||||
CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
|
||||
CONFIG_FLASH_CFI_MTD=y
|
||||
CONFIG_SYS_FLASH_CFI=y
|
||||
CONFIG_HBMC_AM654=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PHY_TI=y
|
||||
CONFIG_PHY_FIXED=y
|
||||
CONFIG_DM_ETH=y
|
||||
CONFIG_TI_AM65_CPSW_NUSS=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_SPL_PINCTRL_GENERIC is not set
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_TI_SCI_POWER_DOMAIN=y
|
||||
CONFIG_RAM=y
|
||||
CONFIG_REMOTEPROC_TI_K3_DSP=y
|
||||
CONFIG_REMOTEPROC_TI_K3_R5F=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_RESET_TI_SCI=y
|
||||
CONFIG_SCSI=y
|
||||
CONFIG_DM_SCSI=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SOC_TI=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CADENCE_QSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SPL_SYSRESET=y
|
||||
CONFIG_SYSRESET_TI_SCI=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_DM_USB=y
|
||||
CONFIG_DM_USB_GADGET=y
|
||||
CONFIG_SPL_DM_USB_GADGET=y
|
||||
CONFIG_USB_XHCI_HCD=y
|
||||
CONFIG_USB_CDNS3=y
|
||||
CONFIG_USB_CDNS3_GADGET=y
|
||||
CONFIG_USB_CDNS3_HOST=y
|
||||
CONFIG_SPL_USB_CDNS3_GADGET=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_GADGET_MANUFACTURER="Texas Instruments"
|
||||
CONFIG_USB_GADGET_VENDOR_NUM=0x0451
|
||||
CONFIG_USB_GADGET_PRODUCT_NUM=0x6163
|
||||
CONFIG_UFS=y
|
||||
CONFIG_CADENCE_UFS=y
|
||||
CONFIG_TI_J721E_UFS=y
|
||||
CONFIG_FAT_WRITE=y
|
||||
CONFIG_OF_LIBFDT_OVERLAY=y
|
||||
|
|
@ -0,0 +1,110 @@
|
|||
CONFIG_ARM=y
|
||||
CONFIG_ARCH_K3=y
|
||||
CONFIG_TI_SECURE_DEVICE=y
|
||||
CONFIG_SPL_GPIO_SUPPORT=y
|
||||
CONFIG_SPL_LIBCOMMON_SUPPORT=y
|
||||
CONFIG_SPL_LIBGENERIC_SUPPORT=y
|
||||
CONFIG_SYS_MALLOC_F_LEN=0x55000
|
||||
CONFIG_SOC_K3_J721E=y
|
||||
CONFIG_TARGET_J721E_R5_EVM=y
|
||||
CONFIG_ENV_SIZE=0x20000
|
||||
CONFIG_ENV_OFFSET=0x680000
|
||||
CONFIG_SPL_MMC_SUPPORT=y
|
||||
CONFIG_SPL_SERIAL_SUPPORT=y
|
||||
CONFIG_SPL_DRIVERS_MISC_SUPPORT=y
|
||||
CONFIG_SPL_STACK_R_ADDR=0x82000000
|
||||
CONFIG_SPL_FS_FAT=y
|
||||
CONFIG_SPL_LIBDISK_SUPPORT=y
|
||||
CONFIG_SPL_SPI_FLASH_SUPPORT=y
|
||||
CONFIG_SPL_SPI_SUPPORT=y
|
||||
CONFIG_SPL_TEXT_BASE=0x41c00000
|
||||
# CONFIG_SYS_MALLOC_CLEAR_ON_INIT is not set
|
||||
CONFIG_SPL_LOAD_FIT=y
|
||||
CONFIG_SPL_FIT_IMAGE_POST_PROCESS=y
|
||||
CONFIG_USE_BOOTCOMMAND=y
|
||||
# CONFIG_DISPLAY_CPUINFO is not set
|
||||
CONFIG_SPL_STACK_R=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
CONFIG_SPL_EARLY_BSS=y
|
||||
CONFIG_SPL_ENV_SUPPORT=y
|
||||
CONFIG_SPL_I2C_SUPPORT=y
|
||||
CONFIG_SPL_DM_MAILBOX=y
|
||||
CONFIG_SPL_DM_RESET=y
|
||||
CONFIG_SPL_POWER_SUPPORT=y
|
||||
CONFIG_SPL_POWER_DOMAIN=y
|
||||
CONFIG_SPL_RAM_SUPPORT=y
|
||||
CONFIG_SPL_RAM_DEVICE=y
|
||||
CONFIG_SPL_REMOTEPROC=y
|
||||
CONFIG_SPL_SPI_LOAD=y
|
||||
CONFIG_SYS_SPI_U_BOOT_OFFS=0x80000
|
||||
CONFIG_SPL_YMODEM_SUPPORT=y
|
||||
CONFIG_HUSH_PARSER=y
|
||||
# CONFIG_CMD_FLASH is not set
|
||||
CONFIG_CMD_GPT=y
|
||||
CONFIG_CMD_MMC=y
|
||||
CONFIG_CMD_REMOTEPROC=y
|
||||
# CONFIG_CMD_SETEXPR is not set
|
||||
CONFIG_CMD_TIME=y
|
||||
CONFIG_CMD_FAT=y
|
||||
CONFIG_OF_CONTROL=y
|
||||
CONFIG_SPL_OF_CONTROL=y
|
||||
CONFIG_DEFAULT_DEVICE_TREE="k3-j721e-r5-common-proc-board"
|
||||
CONFIG_ENV_IS_IN_MMC=y
|
||||
CONFIG_SYS_REDUNDAND_ENVIRONMENT=y
|
||||
CONFIG_ENV_OFFSET_REDUND=0x700000
|
||||
CONFIG_SYS_RELOC_GD_ENV_ADDR=y
|
||||
CONFIG_DM=y
|
||||
CONFIG_SPL_DM=y
|
||||
CONFIG_SPL_DM_SEQ_ALIAS=y
|
||||
CONFIG_REGMAP=y
|
||||
CONFIG_SPL_REGMAP=y
|
||||
CONFIG_SPL_OF_TRANSLATE=y
|
||||
CONFIG_CLK=y
|
||||
CONFIG_SPL_CLK=y
|
||||
CONFIG_CLK_TI_SCI=y
|
||||
CONFIG_TI_SCI_PROTOCOL=y
|
||||
CONFIG_DM_GPIO=y
|
||||
CONFIG_DA8XX_GPIO=y
|
||||
CONFIG_DM_I2C=y
|
||||
CONFIG_I2C_SET_DEFAULT_BUS_NUM=y
|
||||
CONFIG_SYS_I2C_OMAP24XX=y
|
||||
CONFIG_DM_MAILBOX=y
|
||||
CONFIG_K3_SEC_PROXY=y
|
||||
CONFIG_MISC=y
|
||||
CONFIG_FS_LOADER=y
|
||||
CONFIG_K3_AVS0=y
|
||||
CONFIG_DM_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_SPL_MMC_SDHCI_ADMA=y
|
||||
CONFIG_MMC_SDHCI_AM654=y
|
||||
CONFIG_MTD=y
|
||||
CONFIG_DM_SPI_FLASH=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_PINCTRL=y
|
||||
# CONFIG_PINCTRL_GENERIC is not set
|
||||
CONFIG_SPL_PINCTRL=y
|
||||
# CONFIG_SPL_PINCTRL_GENERIC is not set
|
||||
CONFIG_PINCTRL_SINGLE=y
|
||||
CONFIG_POWER_DOMAIN=y
|
||||
CONFIG_TI_SCI_POWER_DOMAIN=y
|
||||
CONFIG_DM_PMIC=y
|
||||
CONFIG_PMIC_TPS65941=y
|
||||
CONFIG_DM_REGULATOR=y
|
||||
CONFIG_SPL_DM_REGULATOR=y
|
||||
CONFIG_DM_REGULATOR_TPS65941=y
|
||||
CONFIG_K3_SYSTEM_CONTROLLER=y
|
||||
CONFIG_REMOTEPROC_TI_K3_ARM64=y
|
||||
CONFIG_DM_RESET=y
|
||||
CONFIG_RESET_TI_SCI=y
|
||||
CONFIG_DM_SERIAL=y
|
||||
CONFIG_SPI=y
|
||||
CONFIG_DM_SPI=y
|
||||
CONFIG_CADENCE_QSPI=y
|
||||
CONFIG_SYSRESET=y
|
||||
CONFIG_SPL_SYSRESET=y
|
||||
CONFIG_SYSRESET_TI_SCI=y
|
||||
CONFIG_TIMER=y
|
||||
CONFIG_SPL_TIMER=y
|
||||
CONFIG_OMAP_TIMER=y
|
||||
CONFIG_FS_EXT4=y
|
||||
CONFIG_FS_FAT_MAX_CLUSTSIZE=16384
|
||||
|
|
@ -21,7 +21,9 @@ CONFIG_DEFAULT_FDT_FILE="logicpd-torpedo-35xx-devkit.dtb"
|
|||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
|
||||
# CONFIG_SPL_FS_EXT4 is not set
|
||||
# CONFIG_SPL_I2C_SUPPORT is not set
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_OS_BOOT=y
|
||||
CONFIG_SYS_PROMPT="OMAP Logic # "
|
||||
|
|
|
|||
|
|
@ -20,7 +20,9 @@ CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-35xx-devkit.dtb"
|
|||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
|
||||
# CONFIG_SPL_FS_EXT4 is not set
|
||||
# CONFIG_SPL_I2C_SUPPORT is not set
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_OS_BOOT=y
|
||||
# CONFIG_SPL_POWER_SUPPORT is not set
|
||||
|
|
|
|||
|
|
@ -20,7 +20,9 @@ CONFIG_SYS_CONSOLE_INFO_QUIET=y
|
|||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
|
||||
# CONFIG_SPL_FS_EXT4 is not set
|
||||
# CONFIG_SPL_I2C_SUPPORT is not set
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_OS_BOOT=y
|
||||
CONFIG_SYS_PROMPT="OMAP Logic # "
|
||||
|
|
|
|||
|
|
@ -21,7 +21,9 @@ CONFIG_DEFAULT_FDT_FILE="logicpd-som-lv-37xx-devkit.dtb"
|
|||
CONFIG_VERSION_VARIABLE=y
|
||||
CONFIG_SPL_SYS_MALLOC_SIMPLE=y
|
||||
CONFIG_SPL_SEPARATE_BSS=y
|
||||
# CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR is not set
|
||||
# CONFIG_SPL_FS_EXT4 is not set
|
||||
# CONFIG_SPL_I2C_SUPPORT is not set
|
||||
CONFIG_SPL_MTD_SUPPORT=y
|
||||
CONFIG_SPL_OS_BOOT=y
|
||||
# CONFIG_SPL_POWER_SUPPORT is not set
|
||||
|
|
|
|||
|
|
@ -28,6 +28,7 @@ alias jagan Jagan Teki <jagan@amarulasolutions.com>
|
|||
alias jhersh Joe Hershberger <joe.hershberger@ni.com>
|
||||
alias kevery Kever Yang <kever.yang@rock-chips.com>
|
||||
alias leyfoon Ley Foon Tan <ley.foon.tan@intel.com>
|
||||
alias lokeshvutla Lokesh Vutla <lokeshvutla@ti.com>
|
||||
alias lukma Lukasz Majewski <lukma@denx.de>
|
||||
alias macpaul Macpaul Lin <macpaul@andestech.com>
|
||||
alias marex Marek Vasut <marex@denx.de>
|
||||
|
|
@ -70,7 +71,7 @@ alias socfpga uboot, marex, dinh, simongoldschmidt, leyfoon
|
|||
alias sunxi uboot, jagan, maxime
|
||||
alias tegra uboot, sjg, Tom Warren <twarren@nvidia.com>, Stephen Warren <swarren@nvidia.com>
|
||||
alias tegra2 tegra
|
||||
alias ti uboot, trini
|
||||
alias ti uboot, lokeshvutla
|
||||
alias uniphier uboot, masahiro
|
||||
alias zynq uboot, monstr
|
||||
alias rockchip uboot, sjg, kevery, ptomsich
|
||||
|
|
|
|||
|
|
@ -106,8 +106,7 @@ static ulong ti_sci_clk_set_rate(struct clk *clk, ulong rate)
|
|||
k3_avs_notify_freq(clk->id, clk->data, rate);
|
||||
#endif
|
||||
|
||||
/* Ask for exact frequency by using same value for min/target/max */
|
||||
ret = cops->set_freq(sci, clk->id, clk->data, rate, rate, rate);
|
||||
ret = cops->set_freq(sci, clk->id, clk->data, 0, rate, ULONG_MAX);
|
||||
if (ret)
|
||||
dev_err(clk->dev, "%s: set_freq failed (%d)\n", __func__, ret);
|
||||
|
||||
|
|
|
|||
|
|
@ -12,12 +12,14 @@
|
|||
#include <malloc.h>
|
||||
#include <asm/dma-mapping.h>
|
||||
#include <dm.h>
|
||||
#include <dm/device.h>
|
||||
#include <dm/read.h>
|
||||
#include <dm/of_access.h>
|
||||
#include <dma.h>
|
||||
#include <dma-uclass.h>
|
||||
#include <linux/delay.h>
|
||||
#include <dt-bindings/dma/k3-udma.h>
|
||||
#include <linux/bitmap.h>
|
||||
#include <linux/soc/ti/k3-navss-ringacc.h>
|
||||
#include <linux/soc/ti/cppi5.h>
|
||||
#include <linux/soc/ti/ti-udma.h>
|
||||
|
|
@ -31,6 +33,8 @@
|
|||
#define RINGACC_RING_USE_PROXY (1)
|
||||
#endif
|
||||
|
||||
#define K3_UDMA_MAX_RFLOWS 1024
|
||||
|
||||
struct udma_chan;
|
||||
|
||||
enum udma_mmr {
|
||||
|
|
@ -64,10 +68,30 @@ struct udma_rflow {
|
|||
int id;
|
||||
};
|
||||
|
||||
enum udma_rm_range {
|
||||
RM_RANGE_TCHAN = 0,
|
||||
RM_RANGE_RCHAN,
|
||||
RM_RANGE_RFLOW,
|
||||
RM_RANGE_LAST,
|
||||
};
|
||||
|
||||
struct udma_tisci_rm {
|
||||
const struct ti_sci_handle *tisci;
|
||||
const struct ti_sci_rm_udmap_ops *tisci_udmap_ops;
|
||||
u32 tisci_dev_id;
|
||||
|
||||
/* tisci information for PSI-L thread pairing/unpairing */
|
||||
const struct ti_sci_rm_psil_ops *tisci_psil_ops;
|
||||
u32 tisci_navss_dev_id;
|
||||
|
||||
struct ti_sci_resource *rm_ranges[RM_RANGE_LAST];
|
||||
};
|
||||
|
||||
struct udma_dev {
|
||||
struct device *dev;
|
||||
struct udevice *dev;
|
||||
void __iomem *mmrs[MMR_LAST];
|
||||
|
||||
struct udma_tisci_rm tisci_rm;
|
||||
struct k3_nav_ringacc *ringacc;
|
||||
|
||||
u32 features;
|
||||
|
|
@ -79,6 +103,7 @@ struct udma_dev {
|
|||
unsigned long *tchan_map;
|
||||
unsigned long *rchan_map;
|
||||
unsigned long *rflow_map;
|
||||
unsigned long *rflow_map_reserved;
|
||||
|
||||
struct udma_tchan *tchans;
|
||||
struct udma_rchan *rchans;
|
||||
|
|
@ -88,12 +113,6 @@ struct udma_dev {
|
|||
u32 psil_base;
|
||||
|
||||
u32 ch_count;
|
||||
const struct ti_sci_handle *tisci;
|
||||
const struct ti_sci_rm_udmap_ops *tisci_udmap_ops;
|
||||
const struct ti_sci_rm_psil_ops *tisci_psil_ops;
|
||||
u32 tisci_dev_id;
|
||||
u32 tisci_navss_dev_id;
|
||||
bool is_coherent;
|
||||
};
|
||||
|
||||
struct udma_chan {
|
||||
|
|
@ -203,19 +222,25 @@ static inline void udma_rchanrt_write(struct udma_rchan *rchan,
|
|||
static inline int udma_navss_psil_pair(struct udma_dev *ud, u32 src_thread,
|
||||
u32 dst_thread)
|
||||
{
|
||||
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
|
||||
|
||||
dst_thread |= UDMA_PSIL_DST_THREAD_ID_OFFSET;
|
||||
return ud->tisci_psil_ops->pair(ud->tisci,
|
||||
ud->tisci_navss_dev_id,
|
||||
src_thread, dst_thread);
|
||||
|
||||
return tisci_rm->tisci_psil_ops->pair(tisci_rm->tisci,
|
||||
tisci_rm->tisci_navss_dev_id,
|
||||
src_thread, dst_thread);
|
||||
}
|
||||
|
||||
static inline int udma_navss_psil_unpair(struct udma_dev *ud, u32 src_thread,
|
||||
u32 dst_thread)
|
||||
{
|
||||
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
|
||||
|
||||
dst_thread |= UDMA_PSIL_DST_THREAD_ID_OFFSET;
|
||||
return ud->tisci_psil_ops->unpair(ud->tisci,
|
||||
ud->tisci_navss_dev_id,
|
||||
src_thread, dst_thread);
|
||||
|
||||
return tisci_rm->tisci_psil_ops->unpair(tisci_rm->tisci,
|
||||
tisci_rm->tisci_navss_dev_id,
|
||||
src_thread, dst_thread);
|
||||
}
|
||||
|
||||
static inline char *udma_get_dir_text(enum dma_direction dir)
|
||||
|
|
@ -270,11 +295,6 @@ static inline bool udma_is_chan_running(struct udma_chan *uc)
|
|||
return false;
|
||||
}
|
||||
|
||||
static int udma_is_coherent(struct udma_chan *uc)
|
||||
{
|
||||
return uc->ud->is_coherent;
|
||||
}
|
||||
|
||||
static int udma_pop_from_ring(struct udma_chan *uc, dma_addr_t *addr)
|
||||
{
|
||||
struct k3_nav_ring *ring = NULL;
|
||||
|
|
@ -429,9 +449,9 @@ static int udma_start(struct udma_chan *uc)
|
|||
|
||||
pr_debug("%s(tx): RT_CTL:0x%08x PEER RT_ENABLE:0x%08x\n",
|
||||
__func__,
|
||||
udma_rchanrt_read(uc->rchan,
|
||||
udma_tchanrt_read(uc->tchan,
|
||||
UDMA_TCHAN_RT_CTL_REG),
|
||||
udma_rchanrt_read(uc->rchan,
|
||||
udma_tchanrt_read(uc->tchan,
|
||||
UDMA_TCHAN_RT_PEER_RT_EN_REG));
|
||||
break;
|
||||
case DMA_MEM_TO_MEM:
|
||||
|
|
@ -538,6 +558,28 @@ static void udma_poll_completion(struct udma_chan *uc, dma_addr_t *paddr)
|
|||
}
|
||||
}
|
||||
|
||||
static struct udma_rflow *__udma_reserve_rflow(struct udma_dev *ud, int id)
|
||||
{
|
||||
DECLARE_BITMAP(tmp, K3_UDMA_MAX_RFLOWS);
|
||||
|
||||
if (id >= 0) {
|
||||
if (test_bit(id, ud->rflow_map)) {
|
||||
dev_err(ud->dev, "rflow%d is in use\n", id);
|
||||
return ERR_PTR(-ENOENT);
|
||||
}
|
||||
} else {
|
||||
bitmap_or(tmp, ud->rflow_map, ud->rflow_map_reserved,
|
||||
ud->rflow_cnt);
|
||||
|
||||
id = find_next_zero_bit(tmp, ud->rflow_cnt, ud->rchan_cnt);
|
||||
if (id >= ud->rflow_cnt)
|
||||
return ERR_PTR(-ENOENT);
|
||||
}
|
||||
|
||||
__set_bit(id, ud->rflow_map);
|
||||
return &ud->rflows[id];
|
||||
}
|
||||
|
||||
#define UDMA_RESERVE_RESOURCE(res) \
|
||||
static struct udma_##res *__udma_reserve_##res(struct udma_dev *ud, \
|
||||
int id) \
|
||||
|
|
@ -560,7 +602,6 @@ static struct udma_##res *__udma_reserve_##res(struct udma_dev *ud, \
|
|||
|
||||
UDMA_RESERVE_RESOURCE(tchan);
|
||||
UDMA_RESERVE_RESOURCE(rchan);
|
||||
UDMA_RESERVE_RESOURCE(rflow);
|
||||
|
||||
static int udma_get_tchan(struct udma_chan *uc)
|
||||
{
|
||||
|
|
@ -740,7 +781,7 @@ static int udma_alloc_tx_resources(struct udma_chan *uc)
|
|||
memset(&ring_cfg, 0, sizeof(ring_cfg));
|
||||
ring_cfg.size = 16;
|
||||
ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8;
|
||||
ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_MESSAGE;
|
||||
ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_RING;
|
||||
|
||||
ret = k3_nav_ringacc_ring_cfg(uc->tchan->t_ring, &ring_cfg);
|
||||
ret |= k3_nav_ringacc_ring_cfg(uc->tchan->tc_ring, &ring_cfg);
|
||||
|
|
@ -817,7 +858,7 @@ static int udma_alloc_rx_resources(struct udma_chan *uc)
|
|||
memset(&ring_cfg, 0, sizeof(ring_cfg));
|
||||
ring_cfg.size = 16;
|
||||
ring_cfg.elm_size = K3_NAV_RINGACC_RING_ELSIZE_8;
|
||||
ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_MESSAGE;
|
||||
ring_cfg.mode = K3_NAV_RINGACC_RING_MODE_RING;
|
||||
|
||||
ret = k3_nav_ringacc_ring_cfg(uc->rchan->fd_ring, &ring_cfg);
|
||||
ret |= k3_nav_ringacc_ring_cfg(uc->rchan->r_ring, &ring_cfg);
|
||||
|
|
@ -846,6 +887,7 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc)
|
|||
struct udma_dev *ud = uc->ud;
|
||||
int tc_ring = k3_nav_ringacc_get_ring_id(uc->tchan->tc_ring);
|
||||
struct ti_sci_msg_rm_udmap_tx_ch_cfg req;
|
||||
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
|
||||
u32 mode;
|
||||
int ret;
|
||||
|
||||
|
|
@ -857,7 +899,7 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc)
|
|||
req.valid_params = TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID |
|
||||
TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID |
|
||||
TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID;
|
||||
req.nav_id = ud->tisci_dev_id;
|
||||
req.nav_id = tisci_rm->tisci_dev_id;
|
||||
req.index = uc->tchan->id;
|
||||
req.tx_chan_type = mode;
|
||||
if (uc->dir == DMA_MEM_TO_MEM)
|
||||
|
|
@ -868,7 +910,7 @@ static int udma_alloc_tchan_sci_req(struct udma_chan *uc)
|
|||
0) >> 2;
|
||||
req.txcq_qnum = tc_ring;
|
||||
|
||||
ret = ud->tisci_udmap_ops->tx_ch_cfg(ud->tisci, &req);
|
||||
ret = tisci_rm->tisci_udmap_ops->tx_ch_cfg(tisci_rm->tisci, &req);
|
||||
if (ret)
|
||||
dev_err(ud->dev, "tisci tx alloc failed %d\n", ret);
|
||||
|
||||
|
|
@ -883,6 +925,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
|
|||
int tc_ring = k3_nav_ringacc_get_ring_id(uc->tchan->tc_ring);
|
||||
struct ti_sci_msg_rm_udmap_rx_ch_cfg req = { 0 };
|
||||
struct ti_sci_msg_rm_udmap_flow_cfg flow_req = { 0 };
|
||||
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
|
||||
u32 mode;
|
||||
int ret;
|
||||
|
||||
|
|
@ -894,7 +937,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
|
|||
req.valid_params = TI_SCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID |
|
||||
TI_SCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID |
|
||||
TI_SCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID;
|
||||
req.nav_id = ud->tisci_dev_id;
|
||||
req.nav_id = tisci_rm->tisci_dev_id;
|
||||
req.index = uc->rchan->id;
|
||||
req.rx_chan_type = mode;
|
||||
if (uc->dir == DMA_MEM_TO_MEM) {
|
||||
|
|
@ -914,7 +957,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
|
|||
TI_SCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID;
|
||||
}
|
||||
|
||||
ret = ud->tisci_udmap_ops->rx_ch_cfg(ud->tisci, &req);
|
||||
ret = tisci_rm->tisci_udmap_ops->rx_ch_cfg(tisci_rm->tisci, &req);
|
||||
if (ret) {
|
||||
dev_err(ud->dev, "tisci rx %u cfg failed %d\n",
|
||||
uc->rchan->id, ret);
|
||||
|
|
@ -939,7 +982,7 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
|
|||
TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID |
|
||||
TI_SCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID;
|
||||
|
||||
flow_req.nav_id = ud->tisci_dev_id;
|
||||
flow_req.nav_id = tisci_rm->tisci_dev_id;
|
||||
flow_req.flow_index = uc->rflow->id;
|
||||
|
||||
if (uc->needs_epib)
|
||||
|
|
@ -965,7 +1008,8 @@ static int udma_alloc_rchan_sci_req(struct udma_chan *uc)
|
|||
flow_req.rx_fdq3_qnum = fd_ring;
|
||||
flow_req.rx_ps_location = 0;
|
||||
|
||||
ret = ud->tisci_udmap_ops->rx_flow_cfg(ud->tisci, &flow_req);
|
||||
ret = tisci_rm->tisci_udmap_ops->rx_flow_cfg(tisci_rm->tisci,
|
||||
&flow_req);
|
||||
if (ret)
|
||||
dev_err(ud->dev, "tisci rx %u flow %u cfg failed %d\n",
|
||||
uc->rchan->id, uc->rflow->id, ret);
|
||||
|
|
@ -1106,16 +1150,134 @@ static int udma_get_mmrs(struct udevice *dev)
|
|||
return 0;
|
||||
}
|
||||
|
||||
#define UDMA_MAX_CHANNELS 192
|
||||
static int udma_setup_resources(struct udma_dev *ud)
|
||||
{
|
||||
struct udevice *dev = ud->dev;
|
||||
int ch_count, i;
|
||||
u32 cap2, cap3;
|
||||
struct ti_sci_resource_desc *rm_desc;
|
||||
struct ti_sci_resource *rm_res;
|
||||
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
|
||||
static const char * const range_names[] = { "ti,sci-rm-range-tchan",
|
||||
"ti,sci-rm-range-rchan",
|
||||
"ti,sci-rm-range-rflow" };
|
||||
|
||||
cap2 = udma_read(ud->mmrs[MMR_GCFG], 0x28);
|
||||
cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c);
|
||||
|
||||
ud->rflow_cnt = cap3 & 0x3fff;
|
||||
ud->tchan_cnt = cap2 & 0x1ff;
|
||||
ud->echan_cnt = (cap2 >> 9) & 0x1ff;
|
||||
ud->rchan_cnt = (cap2 >> 18) & 0x1ff;
|
||||
ch_count = ud->tchan_cnt + ud->rchan_cnt;
|
||||
|
||||
ud->tchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->tchan_cnt),
|
||||
sizeof(unsigned long), GFP_KERNEL);
|
||||
ud->tchans = devm_kcalloc(dev, ud->tchan_cnt, sizeof(*ud->tchans),
|
||||
GFP_KERNEL);
|
||||
ud->rchan_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->rchan_cnt),
|
||||
sizeof(unsigned long), GFP_KERNEL);
|
||||
ud->rchans = devm_kcalloc(dev, ud->rchan_cnt, sizeof(*ud->rchans),
|
||||
GFP_KERNEL);
|
||||
ud->rflow_map = devm_kmalloc_array(dev, BITS_TO_LONGS(ud->rflow_cnt),
|
||||
sizeof(unsigned long), GFP_KERNEL);
|
||||
ud->rflow_map_reserved = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt),
|
||||
sizeof(unsigned long),
|
||||
GFP_KERNEL);
|
||||
ud->rflows = devm_kcalloc(dev, ud->rflow_cnt, sizeof(*ud->rflows),
|
||||
GFP_KERNEL);
|
||||
|
||||
if (!ud->tchan_map || !ud->rchan_map || !ud->rflow_map ||
|
||||
!ud->rflow_map_reserved || !ud->tchans || !ud->rchans ||
|
||||
!ud->rflows)
|
||||
return -ENOMEM;
|
||||
|
||||
/*
|
||||
* RX flows with the same Ids as RX channels are reserved to be used
|
||||
* as default flows if remote HW can't generate flow_ids. Those
|
||||
* RX flows can be requested only explicitly by id.
|
||||
*/
|
||||
bitmap_set(ud->rflow_map_reserved, 0, ud->rchan_cnt);
|
||||
|
||||
/* Get resource ranges from tisci */
|
||||
for (i = 0; i < RM_RANGE_LAST; i++)
|
||||
tisci_rm->rm_ranges[i] =
|
||||
devm_ti_sci_get_of_resource(tisci_rm->tisci, dev,
|
||||
tisci_rm->tisci_dev_id,
|
||||
(char *)range_names[i]);
|
||||
|
||||
/* tchan ranges */
|
||||
rm_res = tisci_rm->rm_ranges[RM_RANGE_TCHAN];
|
||||
if (IS_ERR(rm_res)) {
|
||||
bitmap_zero(ud->tchan_map, ud->tchan_cnt);
|
||||
} else {
|
||||
bitmap_fill(ud->tchan_map, ud->tchan_cnt);
|
||||
for (i = 0; i < rm_res->sets; i++) {
|
||||
rm_desc = &rm_res->desc[i];
|
||||
bitmap_clear(ud->tchan_map, rm_desc->start,
|
||||
rm_desc->num);
|
||||
}
|
||||
}
|
||||
|
||||
/* rchan and matching default flow ranges */
|
||||
rm_res = tisci_rm->rm_ranges[RM_RANGE_RCHAN];
|
||||
if (IS_ERR(rm_res)) {
|
||||
bitmap_zero(ud->rchan_map, ud->rchan_cnt);
|
||||
bitmap_zero(ud->rflow_map, ud->rchan_cnt);
|
||||
} else {
|
||||
bitmap_fill(ud->rchan_map, ud->rchan_cnt);
|
||||
bitmap_fill(ud->rflow_map, ud->rchan_cnt);
|
||||
for (i = 0; i < rm_res->sets; i++) {
|
||||
rm_desc = &rm_res->desc[i];
|
||||
bitmap_clear(ud->rchan_map, rm_desc->start,
|
||||
rm_desc->num);
|
||||
bitmap_clear(ud->rflow_map, rm_desc->start,
|
||||
rm_desc->num);
|
||||
}
|
||||
}
|
||||
|
||||
/* GP rflow ranges */
|
||||
rm_res = tisci_rm->rm_ranges[RM_RANGE_RFLOW];
|
||||
if (IS_ERR(rm_res)) {
|
||||
bitmap_clear(ud->rflow_map, ud->rchan_cnt,
|
||||
ud->rflow_cnt - ud->rchan_cnt);
|
||||
} else {
|
||||
bitmap_set(ud->rflow_map, ud->rchan_cnt,
|
||||
ud->rflow_cnt - ud->rchan_cnt);
|
||||
for (i = 0; i < rm_res->sets; i++) {
|
||||
rm_desc = &rm_res->desc[i];
|
||||
bitmap_clear(ud->rflow_map, rm_desc->start,
|
||||
rm_desc->num);
|
||||
}
|
||||
}
|
||||
|
||||
ch_count -= bitmap_weight(ud->tchan_map, ud->tchan_cnt);
|
||||
ch_count -= bitmap_weight(ud->rchan_map, ud->rchan_cnt);
|
||||
if (!ch_count)
|
||||
return -ENODEV;
|
||||
|
||||
ud->channels = devm_kcalloc(dev, ch_count, sizeof(*ud->channels),
|
||||
GFP_KERNEL);
|
||||
if (!ud->channels)
|
||||
return -ENOMEM;
|
||||
|
||||
dev_info(dev,
|
||||
"Channels: %d (tchan: %u, echan: %u, rchan: %u, rflow: %u)\n",
|
||||
ch_count, ud->tchan_cnt, ud->echan_cnt, ud->rchan_cnt,
|
||||
ud->rflow_cnt);
|
||||
|
||||
return ch_count;
|
||||
}
|
||||
static int udma_probe(struct udevice *dev)
|
||||
{
|
||||
struct dma_dev_priv *uc_priv = dev_get_uclass_priv(dev);
|
||||
struct udma_dev *ud = dev_get_priv(dev);
|
||||
int i, ret;
|
||||
u32 cap2, cap3;
|
||||
struct udevice *tmp;
|
||||
struct udevice *tisci_dev = NULL;
|
||||
struct udma_tisci_rm *tisci_rm = &ud->tisci_rm;
|
||||
ofnode navss_ofnode = ofnode_get_parent(dev_ofnode(dev));
|
||||
|
||||
|
||||
ret = udma_get_mmrs(dev);
|
||||
if (ret)
|
||||
|
|
@ -1134,79 +1296,45 @@ static int udma_probe(struct udevice *dev)
|
|||
return -EINVAL;
|
||||
}
|
||||
|
||||
ret = uclass_get_device_by_name(UCLASS_FIRMWARE, "dmsc", &tisci_dev);
|
||||
ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
|
||||
"ti,sci", &tisci_dev);
|
||||
if (ret) {
|
||||
debug("TISCI RA RM get failed (%d)\n", ret);
|
||||
ud->tisci = NULL;
|
||||
return 0;
|
||||
debug("Failed to get TISCI phandle (%d)\n", ret);
|
||||
tisci_rm->tisci = NULL;
|
||||
return -EINVAL;
|
||||
}
|
||||
ud->tisci = (struct ti_sci_handle *)
|
||||
(ti_sci_get_handle_from_sysfw(tisci_dev));
|
||||
tisci_rm->tisci = (struct ti_sci_handle *)
|
||||
(ti_sci_get_handle_from_sysfw(tisci_dev));
|
||||
|
||||
ret = dev_read_u32_default(dev, "ti,sci", 0);
|
||||
if (!ret) {
|
||||
dev_err(dev, "TISCI RA RM disabled\n");
|
||||
ud->tisci = NULL;
|
||||
tisci_rm->tisci_dev_id = -1;
|
||||
ret = dev_read_u32(dev, "ti,sci-dev-id", &tisci_rm->tisci_dev_id);
|
||||
if (ret) {
|
||||
dev_err(dev, "ti,sci-dev-id read failure %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (ud->tisci) {
|
||||
ofnode navss_ofnode = ofnode_get_parent(dev_ofnode(dev));
|
||||
|
||||
ud->tisci_dev_id = -1;
|
||||
ret = dev_read_u32(dev, "ti,sci-dev-id", &ud->tisci_dev_id);
|
||||
if (ret) {
|
||||
dev_err(dev, "ti,sci-dev-id read failure %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ud->tisci_navss_dev_id = -1;
|
||||
ret = ofnode_read_u32(navss_ofnode, "ti,sci-dev-id",
|
||||
&ud->tisci_navss_dev_id);
|
||||
if (ret) {
|
||||
dev_err(dev, "navss sci-dev-id read failure %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ud->tisci_udmap_ops = &ud->tisci->ops.rm_udmap_ops;
|
||||
ud->tisci_psil_ops = &ud->tisci->ops.rm_psil_ops;
|
||||
tisci_rm->tisci_navss_dev_id = -1;
|
||||
ret = ofnode_read_u32(navss_ofnode, "ti,sci-dev-id",
|
||||
&tisci_rm->tisci_navss_dev_id);
|
||||
if (ret) {
|
||||
dev_err(dev, "navss sci-dev-id read failure %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ud->is_coherent = dev_read_bool(dev, "dma-coherent");
|
||||
tisci_rm->tisci_udmap_ops = &tisci_rm->tisci->ops.rm_udmap_ops;
|
||||
tisci_rm->tisci_psil_ops = &tisci_rm->tisci->ops.rm_psil_ops;
|
||||
|
||||
cap2 = udma_read(ud->mmrs[MMR_GCFG], 0x28);
|
||||
cap3 = udma_read(ud->mmrs[MMR_GCFG], 0x2c);
|
||||
|
||||
ud->rflow_cnt = cap3 & 0x3fff;
|
||||
ud->tchan_cnt = cap2 & 0x1ff;
|
||||
ud->echan_cnt = (cap2 >> 9) & 0x1ff;
|
||||
ud->rchan_cnt = (cap2 >> 18) & 0x1ff;
|
||||
ud->ch_count = ud->tchan_cnt + ud->rchan_cnt;
|
||||
ud->dev = dev;
|
||||
ud->ch_count = udma_setup_resources(ud);
|
||||
if (ud->ch_count <= 0)
|
||||
return ud->ch_count;
|
||||
|
||||
dev_info(dev,
|
||||
"Number of channels: %u (tchan: %u, echan: %u, rchan: %u dev-id %u)\n",
|
||||
ud->ch_count, ud->tchan_cnt, ud->echan_cnt, ud->rchan_cnt,
|
||||
ud->tisci_dev_id);
|
||||
tisci_rm->tisci_dev_id);
|
||||
dev_info(dev, "Number of rflows: %u\n", ud->rflow_cnt);
|
||||
|
||||
ud->channels = devm_kcalloc(dev, ud->ch_count, sizeof(*ud->channels),
|
||||
GFP_KERNEL);
|
||||
ud->tchan_map = devm_kcalloc(dev, BITS_TO_LONGS(ud->tchan_cnt),
|
||||
sizeof(unsigned long), GFP_KERNEL);
|
||||
ud->tchans = devm_kcalloc(dev, ud->tchan_cnt,
|
||||
sizeof(*ud->tchans), GFP_KERNEL);
|
||||
ud->rchan_map = devm_kcalloc(dev, BITS_TO_LONGS(ud->rchan_cnt),
|
||||
sizeof(unsigned long), GFP_KERNEL);
|
||||
ud->rchans = devm_kcalloc(dev, ud->rchan_cnt,
|
||||
sizeof(*ud->rchans), GFP_KERNEL);
|
||||
ud->rflow_map = devm_kcalloc(dev, BITS_TO_LONGS(ud->rflow_cnt),
|
||||
sizeof(unsigned long), GFP_KERNEL);
|
||||
ud->rflows = devm_kcalloc(dev, ud->rflow_cnt,
|
||||
sizeof(*ud->rflows), GFP_KERNEL);
|
||||
|
||||
if (!ud->channels || !ud->tchan_map || !ud->rchan_map ||
|
||||
!ud->rflow_map || !ud->tchans || !ud->rchans || !ud->rflows)
|
||||
return -ENOMEM;
|
||||
|
||||
for (i = 0; i < ud->tchan_cnt; i++) {
|
||||
struct udma_tchan *tchan = &ud->tchans[i];
|
||||
|
||||
|
|
@ -1253,6 +1381,14 @@ static int udma_probe(struct udevice *dev)
|
|||
return ret;
|
||||
}
|
||||
|
||||
static int udma_push_to_ring(struct k3_nav_ring *ring, void *elem)
|
||||
{
|
||||
u64 addr = 0;
|
||||
|
||||
memcpy(&addr, &elem, sizeof(elem));
|
||||
return k3_nav_ringacc_ring_push(ring, &addr);
|
||||
}
|
||||
|
||||
static int *udma_prep_dma_memcpy(struct udma_chan *uc, dma_addr_t dest,
|
||||
dma_addr_t src, size_t len)
|
||||
{
|
||||
|
|
@ -1340,13 +1476,11 @@ static int *udma_prep_dma_memcpy(struct udma_chan *uc, dma_addr_t dest,
|
|||
|
||||
cppi5_tr_csf_set(&tr_req[num_tr - 1].flags, CPPI5_TR_CSF_EOP);
|
||||
|
||||
if (!udma_is_coherent(uc)) {
|
||||
flush_dcache_range((u64)tr_desc,
|
||||
ALIGN((u64)tr_desc + desc_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
}
|
||||
flush_dcache_range((unsigned long)tr_desc,
|
||||
ALIGN((unsigned long)tr_desc + desc_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
|
||||
k3_nav_ringacc_ring_push(uc->tchan->t_ring, &tr_desc);
|
||||
udma_push_to_ring(uc->tchan->t_ring, tr_desc);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -1514,16 +1648,14 @@ static int udma_send(struct dma *dma, void *src, size_t len, void *metadata)
|
|||
cppi5_hdesc_set_pkttype(desc_tx, packet_data.pkt_type);
|
||||
cppi5_desc_set_tags_ids(&desc_tx->hdr, 0, packet_data.dest_tag);
|
||||
|
||||
if (!udma_is_coherent(uc)) {
|
||||
flush_dcache_range((u64)dma_src,
|
||||
ALIGN((u64)dma_src + len,
|
||||
ARCH_DMA_MINALIGN));
|
||||
flush_dcache_range((u64)desc_tx,
|
||||
ALIGN((u64)desc_tx + uc->hdesc_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
}
|
||||
flush_dcache_range((unsigned long)dma_src,
|
||||
ALIGN((unsigned long)dma_src + len,
|
||||
ARCH_DMA_MINALIGN));
|
||||
flush_dcache_range((unsigned long)desc_tx,
|
||||
ALIGN((unsigned long)desc_tx + uc->hdesc_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
|
||||
ret = k3_nav_ringacc_ring_push(uc->tchan->t_ring, &uc->desc_tx);
|
||||
ret = udma_push_to_ring(uc->tchan->t_ring, uc->desc_tx);
|
||||
if (ret) {
|
||||
dev_err(dma->dev, "TX dma push fail ch_id %lu %d\n",
|
||||
dma->id, ret);
|
||||
|
|
@ -1565,19 +1697,15 @@ static int udma_receive(struct dma *dma, void **dst, void *metadata)
|
|||
}
|
||||
|
||||
/* invalidate cache data */
|
||||
if (!udma_is_coherent(uc)) {
|
||||
invalidate_dcache_range((ulong)desc_rx,
|
||||
(ulong)(desc_rx + uc->hdesc_size));
|
||||
}
|
||||
invalidate_dcache_range((ulong)desc_rx,
|
||||
(ulong)(desc_rx + uc->hdesc_size));
|
||||
|
||||
cppi5_hdesc_get_obuf(desc_rx, &buf_dma, &buf_dma_len);
|
||||
pkt_len = cppi5_hdesc_get_pktlen(desc_rx);
|
||||
|
||||
/* invalidate cache data */
|
||||
if (!udma_is_coherent(uc)) {
|
||||
invalidate_dcache_range((ulong)buf_dma,
|
||||
(ulong)(buf_dma + buf_dma_len));
|
||||
}
|
||||
invalidate_dcache_range((ulong)buf_dma,
|
||||
(ulong)(buf_dma + buf_dma_len));
|
||||
|
||||
cppi5_desc_get_tags_ids(&desc_rx->hdr, &port_id, NULL);
|
||||
|
||||
|
|
@ -1682,13 +1810,11 @@ int udma_prepare_rcv_buf(struct dma *dma, void *dst, size_t size)
|
|||
cppi5_hdesc_set_pktlen(desc_rx, size);
|
||||
cppi5_hdesc_attach_buf(desc_rx, dma_dst, size, dma_dst, size);
|
||||
|
||||
if (!udma_is_coherent(uc)) {
|
||||
flush_dcache_range((u64)desc_rx,
|
||||
ALIGN((u64)desc_rx + uc->hdesc_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
}
|
||||
flush_dcache_range((unsigned long)desc_rx,
|
||||
ALIGN((unsigned long)desc_rx + uc->hdesc_size,
|
||||
ARCH_DMA_MINALIGN));
|
||||
|
||||
k3_nav_ringacc_ring_push(uc->rchan->fd_ring, &desc_rx);
|
||||
udma_push_to_ring(uc->rchan->fd_ring, desc_rx);
|
||||
|
||||
uc->num_rx_bufs++;
|
||||
uc->desc_rx_cur++;
|
||||
|
|
|
|||
|
|
@ -36,11 +36,14 @@
|
|||
#define OTAPDLYSEL_SHIFT 12
|
||||
#define OTAPDLYSEL_MASK GENMASK(15, 12)
|
||||
#define STRBSEL_SHIFT 24
|
||||
#define STRBSEL_MASK GENMASK(27, 24)
|
||||
#define STRBSEL_4BIT_MASK GENMASK(27, 24)
|
||||
#define STRBSEL_8BIT_MASK GENMASK(31, 24)
|
||||
#define SEL50_SHIFT 8
|
||||
#define SEL50_MASK BIT(SEL50_SHIFT)
|
||||
#define SEL100_SHIFT 9
|
||||
#define SEL100_MASK BIT(SEL100_SHIFT)
|
||||
#define FREQSEL_SHIFT 8
|
||||
#define FREQSEL_MASK GENMASK(10, 8)
|
||||
#define DLL_TRIM_ICP_SHIFT 4
|
||||
#define DLL_TRIM_ICP_MASK GENMASK(7, 4)
|
||||
#define DR_TY_SHIFT 20
|
||||
|
|
@ -72,11 +75,20 @@ struct am654_sdhci_plat {
|
|||
u32 otap_del_sel;
|
||||
u32 trm_icp;
|
||||
u32 drv_strength;
|
||||
u32 strb_sel;
|
||||
u32 flags;
|
||||
#define DLL_PRESENT (1 << 0)
|
||||
#define IOMUX_PRESENT (1 << 1)
|
||||
#define FREQSEL_2_BIT (1 << 2)
|
||||
#define STRBSEL_4_BIT (1 << 3)
|
||||
bool dll_on;
|
||||
};
|
||||
|
||||
struct am654_driver_data {
|
||||
const struct sdhci_ops *ops;
|
||||
u32 flags;
|
||||
};
|
||||
|
||||
static void am654_sdhci_set_control_reg(struct sdhci_host *host)
|
||||
{
|
||||
struct mmc *mmc = (struct mmc *)host->mmc;
|
||||
|
|
@ -97,7 +109,7 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
|
|||
struct udevice *dev = host->mmc->dev;
|
||||
struct am654_sdhci_plat *plat = dev_get_platdata(dev);
|
||||
unsigned int speed = host->mmc->clock;
|
||||
int sel50, sel100;
|
||||
int sel50, sel100, freqsel;
|
||||
u32 mask, val;
|
||||
int ret;
|
||||
|
||||
|
|
@ -121,25 +133,49 @@ static int am654_sdhci_set_ios_post(struct sdhci_host *host)
|
|||
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
|
||||
val = (1 << OTAPDLYENA_SHIFT) |
|
||||
(plat->otap_del_sel << OTAPDLYSEL_SHIFT);
|
||||
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
|
||||
switch (speed) {
|
||||
case 200000000:
|
||||
sel50 = 0;
|
||||
sel100 = 0;
|
||||
break;
|
||||
case 100000000:
|
||||
sel50 = 0;
|
||||
sel100 = 1;
|
||||
break;
|
||||
default:
|
||||
sel50 = 1;
|
||||
sel100 = 0;
|
||||
|
||||
/* Write to STRBSEL for HS400 speed mode */
|
||||
if (host->mmc->selected_mode == MMC_HS_400) {
|
||||
if (plat->flags & STRBSEL_4_BIT)
|
||||
mask |= STRBSEL_4BIT_MASK;
|
||||
else
|
||||
mask |= STRBSEL_8BIT_MASK;
|
||||
|
||||
val |= plat->strb_sel << STRBSEL_SHIFT;
|
||||
}
|
||||
|
||||
/* Configure PHY DLL frequency */
|
||||
mask = SEL50_MASK | SEL100_MASK;
|
||||
val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);
|
||||
regmap_update_bits(plat->base, PHY_CTRL5, mask, val);
|
||||
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
|
||||
|
||||
if (plat->flags & FREQSEL_2_BIT) {
|
||||
switch (speed) {
|
||||
case 200000000:
|
||||
sel50 = 0;
|
||||
sel100 = 0;
|
||||
break;
|
||||
case 100000000:
|
||||
sel50 = 0;
|
||||
sel100 = 1;
|
||||
break;
|
||||
default:
|
||||
sel50 = 1;
|
||||
sel100 = 0;
|
||||
}
|
||||
|
||||
/* Configure PHY DLL frequency */
|
||||
mask = SEL50_MASK | SEL100_MASK;
|
||||
val = (sel50 << SEL50_SHIFT) | (sel100 << SEL100_SHIFT);
|
||||
regmap_update_bits(plat->base, PHY_CTRL5, mask, val);
|
||||
} else {
|
||||
switch (speed) {
|
||||
case 200000000:
|
||||
freqsel = 0x0;
|
||||
break;
|
||||
default:
|
||||
freqsel = 0x4;
|
||||
}
|
||||
regmap_update_bits(plat->base, PHY_CTRL5, FREQSEL_MASK,
|
||||
freqsel << FREQSEL_SHIFT);
|
||||
}
|
||||
|
||||
/* Enable DLL */
|
||||
regmap_update_bits(plat->base, PHY_CTRL1, ENDLL_MASK,
|
||||
|
|
@ -164,8 +200,37 @@ const struct sdhci_ops am654_sdhci_ops = {
|
|||
.set_control_reg = &am654_sdhci_set_control_reg,
|
||||
};
|
||||
|
||||
const struct am654_driver_data am654_drv_data = {
|
||||
.ops = &am654_sdhci_ops,
|
||||
.flags = IOMUX_PRESENT | FREQSEL_2_BIT | DLL_PRESENT | STRBSEL_4_BIT,
|
||||
};
|
||||
|
||||
const struct am654_driver_data j721e_8bit_drv_data = {
|
||||
.ops = &am654_sdhci_ops,
|
||||
.flags = DLL_PRESENT,
|
||||
};
|
||||
|
||||
static int j721e_4bit_sdhci_set_ios_post(struct sdhci_host *host)
|
||||
{
|
||||
struct udevice *dev = host->mmc->dev;
|
||||
struct am654_sdhci_plat *plat = dev_get_platdata(dev);
|
||||
u32 mask, val;
|
||||
|
||||
mask = OTAPDLYENA_MASK | OTAPDLYSEL_MASK;
|
||||
val = (1 << OTAPDLYENA_SHIFT) |
|
||||
(plat->otap_del_sel << OTAPDLYSEL_SHIFT);
|
||||
regmap_update_bits(plat->base, PHY_CTRL4, mask, val);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct sdhci_ops j721e_4bit_sdhci_ops = {
|
||||
.set_control_reg = &am654_sdhci_set_control_reg,
|
||||
.set_ios_post = &j721e_4bit_sdhci_set_ios_post,
|
||||
};
|
||||
|
||||
const struct am654_driver_data j721e_4bit_drv_data = {
|
||||
.ops = &j721e_4bit_sdhci_ops,
|
||||
.flags = IOMUX_PRESENT,
|
||||
};
|
||||
|
||||
int am654_sdhci_init(struct am654_sdhci_plat *plat)
|
||||
|
|
@ -202,7 +267,8 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)
|
|||
}
|
||||
|
||||
/* Enable pins by setting IO mux to 0 */
|
||||
regmap_update_bits(plat->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);
|
||||
if (plat->flags & IOMUX_PRESENT)
|
||||
regmap_update_bits(plat->base, PHY_CTRL1, IOMUX_ENABLE_MASK, 0);
|
||||
|
||||
/* Set slot type based on SD or eMMC */
|
||||
if (plat->non_removable)
|
||||
|
|
@ -215,6 +281,8 @@ int am654_sdhci_init(struct am654_sdhci_plat *plat)
|
|||
|
||||
static int am654_sdhci_probe(struct udevice *dev)
|
||||
{
|
||||
struct am654_driver_data *drv_data =
|
||||
(struct am654_driver_data *)dev_get_driver_data(dev);
|
||||
struct am654_sdhci_plat *plat = dev_get_platdata(dev);
|
||||
struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev);
|
||||
struct sdhci_host *host = dev_get_priv(dev);
|
||||
|
|
@ -223,7 +291,7 @@ static int am654_sdhci_probe(struct udevice *dev)
|
|||
unsigned long clock;
|
||||
int ret;
|
||||
|
||||
ret = clk_get_by_index(dev, 0, &clk);
|
||||
ret = clk_get_by_name(dev, "clk_xin", &clk);
|
||||
if (ret) {
|
||||
dev_err(dev, "failed to get clock\n");
|
||||
return ret;
|
||||
|
|
@ -242,7 +310,8 @@ static int am654_sdhci_probe(struct udevice *dev)
|
|||
AM654_SDHCI_MIN_FREQ);
|
||||
if (ret)
|
||||
return ret;
|
||||
host->ops = (struct sdhci_ops *)dev_get_driver_data(dev);
|
||||
|
||||
host->ops = drv_data->ops;
|
||||
host->mmc->priv = host;
|
||||
upriv->mmc = host->mmc;
|
||||
|
||||
|
|
@ -265,10 +334,6 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
|
|||
host->ioaddr = (void *)dev_read_addr(dev);
|
||||
plat->non_removable = dev_read_bool(dev, "non-removable");
|
||||
|
||||
if (device_is_compatible(dev, "ti,am654-sdhci-5.1") ||
|
||||
device_is_compatible(dev, "ti,j721e-sdhci-8bit"))
|
||||
plat->flags |= DLL_PRESENT;
|
||||
|
||||
ret = dev_read_u32(dev, "ti,otap-del-sel", &plat->otap_del_sel);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
|
@ -314,23 +379,27 @@ static int am654_sdhci_ofdata_to_platdata(struct udevice *dev)
|
|||
|
||||
static int am654_sdhci_bind(struct udevice *dev)
|
||||
{
|
||||
struct am654_driver_data *drv_data =
|
||||
(struct am654_driver_data *)dev_get_driver_data(dev);
|
||||
struct am654_sdhci_plat *plat = dev_get_platdata(dev);
|
||||
|
||||
plat->flags = drv_data->flags;
|
||||
|
||||
return sdhci_bind(dev, &plat->mmc, &plat->cfg);
|
||||
}
|
||||
|
||||
static const struct udevice_id am654_sdhci_ids[] = {
|
||||
{
|
||||
.compatible = "ti,am654-sdhci-5.1",
|
||||
.data = (ulong)&am654_sdhci_ops,
|
||||
.data = (ulong)&am654_drv_data,
|
||||
},
|
||||
{
|
||||
.compatible = "ti,j721e-sdhci-8bit",
|
||||
.data = (ulong)&am654_sdhci_ops,
|
||||
.data = (ulong)&j721e_8bit_drv_data,
|
||||
},
|
||||
{
|
||||
.compatible = "ti,j721e-sdhci-4bit",
|
||||
.data = (ulong)&j721e_4bit_sdhci_ops,
|
||||
.data = (ulong)&j721e_4bit_drv_data,
|
||||
},
|
||||
{ }
|
||||
};
|
||||
|
|
|
|||
|
|
@ -27,6 +27,10 @@
|
|||
#define USB2PHY_DISCON_BYP_LATCH BIT(31)
|
||||
#define USB2PHY_ANA_CONFIG1 (0x4c)
|
||||
|
||||
#define AM654_USB2_OTG_PD BIT(8)
|
||||
#define AM654_USB2_VBUS_DET_EN BIT(5)
|
||||
#define AM654_USB2_VBUSVALID_DET_EN BIT(4)
|
||||
|
||||
DECLARE_GLOBAL_DATA_PTR;
|
||||
|
||||
struct omap_usb2_phy {
|
||||
|
|
@ -74,6 +78,15 @@ static const struct usb_phy_data am437x_usb2_data = {
|
|||
.power_off = AM437X_USB2_PHY_PD | AM437X_USB2_OTG_PD,
|
||||
};
|
||||
|
||||
static const struct usb_phy_data am654_usb2_data = {
|
||||
.label = "am654_usb2",
|
||||
.flags = OMAP_USB2_CALIBRATE_FALSE_DISCONNECT,
|
||||
.mask = AM654_USB2_OTG_PD | AM654_USB2_VBUS_DET_EN |
|
||||
AM654_USB2_VBUSVALID_DET_EN,
|
||||
.power_on = AM654_USB2_VBUS_DET_EN | AM654_USB2_VBUSVALID_DET_EN,
|
||||
.power_off = AM654_USB2_OTG_PD,
|
||||
};
|
||||
|
||||
static const struct udevice_id omap_usb2_id_table[] = {
|
||||
{
|
||||
.compatible = "ti,omap5-usb2",
|
||||
|
|
@ -91,6 +104,10 @@ static const struct udevice_id omap_usb2_id_table[] = {
|
|||
.compatible = "ti,am437x-usb2",
|
||||
.data = (ulong)&am437x_usb2_data,
|
||||
},
|
||||
{
|
||||
.compatible = "ti,am654-usb2",
|
||||
.data = (ulong)&am654_usb2_data,
|
||||
},
|
||||
{},
|
||||
};
|
||||
|
||||
|
|
@ -179,11 +196,10 @@ int omap_usb2_phy_probe(struct udevice *dev)
|
|||
return -EINVAL;
|
||||
|
||||
if (data->flags & OMAP_USB2_CALIBRATE_FALSE_DISCONNECT) {
|
||||
u32 base = dev_read_addr(dev);
|
||||
priv->phy_base = dev_read_addr_ptr(dev);
|
||||
|
||||
if (base == FDT_ADDR_T_NONE)
|
||||
if (!priv->phy_base)
|
||||
return -EINVAL;
|
||||
priv->phy_base = (void *)base;
|
||||
priv->flags |= OMAP_USB2_CALIBRATE_FALSE_DISCONNECT;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ static int tps62360_regulator_get_value(struct udevice *dev)
|
|||
return (u32)regval * TPS62360_VSEL_STEPSIZE + pdata->config->vmin;
|
||||
}
|
||||
|
||||
static int tps62360_regulator_ofdata_to_platdata(struct udevice *dev)
|
||||
static int tps62360_regulator_probe(struct udevice *dev)
|
||||
{
|
||||
struct tps62360_regulator_pdata *pdata = dev_get_platdata(dev);
|
||||
u8 vsel0;
|
||||
|
|
@ -119,5 +119,5 @@ U_BOOT_DRIVER(tps62360_regulator) = {
|
|||
.ops = &tps62360_regulator_ops,
|
||||
.of_match = tps62360_regulator_ids,
|
||||
.platdata_auto_alloc_size = sizeof(struct tps62360_regulator_pdata),
|
||||
.ofdata_to_platdata = tps62360_regulator_ofdata_to_platdata,
|
||||
.probe = tps62360_regulator_probe,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -6,6 +6,7 @@
|
|||
*/
|
||||
|
||||
#include <common.h>
|
||||
#include <cpu_func.h>
|
||||
#include <asm/io.h>
|
||||
#include <malloc.h>
|
||||
#include <asm/dma-mapping.h>
|
||||
|
|
@ -807,6 +808,11 @@ static int k3_nav_ringacc_ring_push_mem(struct k3_nav_ring *ring, void *elem)
|
|||
|
||||
memcpy(elem_ptr, elem, (4 << ring->elm_size));
|
||||
|
||||
flush_dcache_range((unsigned long)ring->ring_mem_virt,
|
||||
ALIGN((unsigned long)ring->ring_mem_virt +
|
||||
ring->size * (4 << ring->elm_size),
|
||||
ARCH_DMA_MINALIGN));
|
||||
|
||||
ring->windex = (ring->windex + 1) % ring->size;
|
||||
ring->free--;
|
||||
ringacc_writel(1, &ring->rt->db);
|
||||
|
|
@ -823,6 +829,11 @@ static int k3_nav_ringacc_ring_pop_mem(struct k3_nav_ring *ring, void *elem)
|
|||
|
||||
elem_ptr = k3_nav_ringacc_get_elm_addr(ring, ring->rindex);
|
||||
|
||||
invalidate_dcache_range((unsigned long)ring->ring_mem_virt,
|
||||
ALIGN((unsigned long)ring->ring_mem_virt +
|
||||
ring->size * (4 << ring->elm_size),
|
||||
ARCH_DMA_MINALIGN));
|
||||
|
||||
memcpy(elem, elem_ptr, (4 << ring->elm_size));
|
||||
|
||||
ring->rindex = (ring->rindex + 1) % ring->size;
|
||||
|
|
@ -931,7 +942,8 @@ static int k3_nav_ringacc_probe_dt(struct k3_nav_ringacc *ringacc)
|
|||
ringacc->dma_ring_reset_quirk =
|
||||
dev_read_bool(dev, "ti,dma-ring-reset-quirk");
|
||||
|
||||
ret = uclass_get_device_by_name(UCLASS_FIRMWARE, "dmsc", &tisci_dev);
|
||||
ret = uclass_get_device_by_phandle(UCLASS_FIRMWARE, dev,
|
||||
"ti,sci", &tisci_dev);
|
||||
if (ret) {
|
||||
pr_debug("TISCI RA RM get failed (%d)\n", ret);
|
||||
ringacc->tisci = NULL;
|
||||
|
|
|
|||
|
|
@ -26,7 +26,7 @@
|
|||
|
||||
struct ti_bandgap {
|
||||
ulong base;
|
||||
int temperature; /* in mili degree celsius */
|
||||
uint adc_val;
|
||||
};
|
||||
|
||||
/*
|
||||
|
|
@ -162,8 +162,8 @@ static int ti_bandgap_get_temp(struct udevice *dev, int *temp)
|
|||
{
|
||||
struct ti_bandgap *bgp = dev_get_priv(dev);
|
||||
|
||||
bgp->temperature = 0x3ff & readl(bgp->base + CTRL_CORE_TEMP_SENSOR_MPU);
|
||||
*temp = dra752_adc_to_temp[bgp->temperature - DRA752_ADC_START_VALUE];
|
||||
bgp->adc_val = 0x3ff & readl(bgp->base + CTRL_CORE_TEMP_SENSOR_MPU);
|
||||
*temp = dra752_adc_to_temp[bgp->adc_val - DRA752_ADC_START_VALUE];
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -426,6 +426,7 @@ static const struct udevice_id dwc3_glue_ids[] = {
|
|||
{ .compatible = "ti,keystone-dwc3"},
|
||||
{ .compatible = "ti,dwc3", .data = (ulong)&ti_ops },
|
||||
{ .compatible = "ti,am437x-dwc3", .data = (ulong)&ti_ops },
|
||||
{ .compatible = "ti,am654-dwc3" },
|
||||
{ }
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -22,7 +22,6 @@
|
|||
|
||||
#define CONFIG_SYS_BOOTM_LEN SZ_64M
|
||||
|
||||
#define CONSOLEDEV "ttyS2"
|
||||
#define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */
|
||||
#define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */
|
||||
#define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */
|
||||
|
|
@ -33,7 +32,6 @@
|
|||
|
||||
#define CONFIG_SYS_OMAP_ABE_SYSCK
|
||||
|
||||
#ifdef CONFIG_SPL_DFU
|
||||
#ifndef CONFIG_SPL_BUILD
|
||||
#define DFUARGS \
|
||||
"dfu_bufsiz=0x10000\0" \
|
||||
|
|
@ -43,6 +41,7 @@
|
|||
DFU_ALT_INFO_QSPI
|
||||
#else
|
||||
#undef CONFIG_CMD_BOOTD
|
||||
#ifdef CONFIG_SPL_DFU
|
||||
#define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000
|
||||
#define DFUARGS \
|
||||
"dfu_bufsiz=0x10000\0" \
|
||||
|
|
|
|||
|
|
@ -13,6 +13,7 @@
|
|||
#include <config_distro_bootcmd.h>
|
||||
#include <environment/ti/mmc.h>
|
||||
#include <environment/ti/k3_rproc.h>
|
||||
#include <environment/ti/k3_dfu.h>
|
||||
|
||||
/* DDR Configuration */
|
||||
#define CONFIG_SYS_SDRAM_BASE1 0x880000000
|
||||
|
|
@ -71,6 +72,7 @@
|
|||
"overlayaddr=0x83000000\0" \
|
||||
"name_kern=Image\0" \
|
||||
"console=ttyS2,115200n8\0" \
|
||||
"stdin=serial,usbkbd\0" \
|
||||
"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \
|
||||
"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0" \
|
||||
|
||||
|
|
@ -104,13 +106,20 @@
|
|||
"0 /lib/firmware/am65x-mcu-r5f0_0-fw " \
|
||||
"1 /lib/firmware/am65x-mcu-r5f0_1-fw "
|
||||
|
||||
#define EXTRA_ENV_DFUARGS \
|
||||
"dfu_bufsiz=0x20000\0" \
|
||||
DFU_ALT_INFO_MMC \
|
||||
DFU_ALT_INFO_EMMC \
|
||||
DFU_ALT_INFO_OSPI
|
||||
|
||||
/* Incorporate settings into the U-Boot environment */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
DEFAULT_MMC_TI_ARGS \
|
||||
DEFAULT_FIT_TI_ARGS \
|
||||
EXTRA_ENV_AM65X_BOARD_SETTINGS \
|
||||
EXTRA_ENV_AM65X_BOARD_SETTINGS_MMC \
|
||||
EXTRA_ENV_RPROC_SETTINGS
|
||||
EXTRA_ENV_RPROC_SETTINGS \
|
||||
EXTRA_ENV_DFUARGS
|
||||
|
||||
/* MMC ENV related defines */
|
||||
#ifdef CONFIG_ENV_IS_IN_MMC
|
||||
|
|
|
|||
|
|
@ -14,6 +14,7 @@
|
|||
#include <environment/ti/mmc.h>
|
||||
#include <environment/ti/k3_rproc.h>
|
||||
#include <environment/ti/ufs.h>
|
||||
#include <environment/ti/k3_dfu.h>
|
||||
|
||||
/* DDR Configuration */
|
||||
#define CONFIG_SYS_SDRAM_BASE1 0x880000000
|
||||
|
|
@ -61,7 +62,9 @@
|
|||
/* U-Boot general configuration */
|
||||
#define EXTRA_ENV_J721E_BOARD_SETTINGS \
|
||||
"default_device_tree=" CONFIG_DEFAULT_DEVICE_TREE ".dtb\0" \
|
||||
"findfdt=setenv fdtfile ${default_device_tree}\0" \
|
||||
"findfdt=" \
|
||||
"setenv name_fdt ${default_device_tree};" \
|
||||
"setenv fdtfile ${name_fdt}\0" \
|
||||
"loadaddr=0x80080000\0" \
|
||||
"fdtaddr=0x82000000\0" \
|
||||
"overlayaddr=0x83000000\0" \
|
||||
|
|
@ -70,6 +73,11 @@
|
|||
"args_all=setenv optargs earlycon=ns16550a,mmio32,0x02800000\0" \
|
||||
"run_kern=booti ${loadaddr} ${rd_spec} ${fdtaddr}\0"
|
||||
|
||||
#define PARTS_DEFAULT \
|
||||
/* Linux partitions */ \
|
||||
"uuid_disk=${uuid_gpt_disk};" \
|
||||
"name=rootfs,start=0,size=-,uuid=${uuid_gpt_rootfs}\0"
|
||||
|
||||
/* U-Boot MMC-specific configuration */
|
||||
#define EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
|
||||
"boot=mmc\0" \
|
||||
|
|
@ -78,7 +86,7 @@
|
|||
"bootdir=/boot\0" \
|
||||
"rd_spec=-\0" \
|
||||
"init_mmc=run args_all args_mmc\0" \
|
||||
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
|
||||
"get_fdt_mmc=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${name_fdt}\0" \
|
||||
"get_overlay_mmc=" \
|
||||
"fdt address ${fdtaddr};" \
|
||||
"fdt resize 0x100000;" \
|
||||
|
|
@ -87,8 +95,12 @@
|
|||
"load mmc ${bootpart} ${overlayaddr} ${bootdir}/${overlay} && " \
|
||||
"fdt apply ${overlayaddr};" \
|
||||
"done;\0" \
|
||||
"partitions=" PARTS_DEFAULT \
|
||||
"get_kern_mmc=load mmc ${bootpart} ${loadaddr} " \
|
||||
"${bootdir}/${name_kern}\0"
|
||||
"${bootdir}/${name_kern}\0" \
|
||||
"get_fit_mmc=load mmc ${bootpart} ${addr_fit} " \
|
||||
"${bootdir}/${name_fit}\0" \
|
||||
"partitions=" PARTS_DEFAULT
|
||||
|
||||
#ifdef DEFAULT_RPROCS
|
||||
#undef DEFAULT_RPROCS
|
||||
|
|
@ -100,15 +112,31 @@
|
|||
"7 /lib/firmware/j7-c66_1-fw " \
|
||||
"8 /lib/firmware/j7-c71_0-fw "
|
||||
|
||||
/* set default dfu_bufsiz to 128KB (sector size of OSPI) */
|
||||
#define EXTRA_ENV_DFUARGS \
|
||||
"dfu_bufsiz=0x20000\0" \
|
||||
DFU_ALT_INFO_MMC \
|
||||
DFU_ALT_INFO_EMMC \
|
||||
DFU_ALT_INFO_RAM \
|
||||
DFU_ALT_INFO_OSPI
|
||||
|
||||
/* Incorporate settings into the U-Boot environment */
|
||||
#define CONFIG_EXTRA_ENV_SETTINGS \
|
||||
DEFAULT_MMC_TI_ARGS \
|
||||
DEFAULT_FIT_TI_ARGS \
|
||||
EXTRA_ENV_J721E_BOARD_SETTINGS \
|
||||
EXTRA_ENV_J721E_BOARD_SETTINGS_MMC \
|
||||
EXTRA_ENV_RPROC_SETTINGS \
|
||||
EXTRA_ENV_DFUARGS \
|
||||
DEFAULT_UFS_TI_ARGS
|
||||
|
||||
/* Now for the remaining common defines */
|
||||
#include <configs/ti_armv7_common.h>
|
||||
|
||||
/* MMC ENV related defines */
|
||||
#ifdef CONFIG_ENV_IS_IN_MMC
|
||||
#define CONFIG_SYS_MMC_ENV_DEV 0
|
||||
#define CONFIG_SYS_MMC_ENV_PART 1
|
||||
#endif
|
||||
|
||||
#endif /* __CONFIG_J721E_EVM_H */
|
||||
|
|
|
|||
|
|
@ -61,7 +61,6 @@
|
|||
"setenv overlaystring ${overlaystring}'#'${overlay};" \
|
||||
"done;\0" \
|
||||
"run_fit=bootm ${addr_fit}#${fdtfile}${overlaystring}\0" \
|
||||
"loadfit=run args_mmc; run run_fit;\0" \
|
||||
|
||||
/*
|
||||
* DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
|
||||
|
|
|
|||
|
|
@ -185,6 +185,8 @@
|
|||
"setenv fdtfile am57xx-beagle-x15-revb1.dtb; fi;" \
|
||||
"if test $board_name = beagle_x15_revc; then " \
|
||||
"setenv fdtfile am57xx-beagle-x15-revc.dtb; fi;" \
|
||||
"if test $board_name = am5729_beagleboneai; then " \
|
||||
"setenv fdtfile am5729-beagleboneai.dtb; fi;" \
|
||||
"if test $board_name = am572x_idk; then " \
|
||||
"setenv fdtfile am572x-idk.dtb; fi;" \
|
||||
"if test $board_name = am574x_idk; then " \
|
||||
|
|
|
|||
|
|
@ -0,0 +1,46 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0+ */
|
||||
/*
|
||||
* Copyright (C) 2019 Texas Instruments Incorporated - http://www.ti.com
|
||||
*
|
||||
* Environment variable definitions for DFU on TI K3 SoCs.
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __TI_DFU_H
|
||||
#define __TI_DFU_H
|
||||
|
||||
#define DFU_ALT_INFO_MMC \
|
||||
"dfu_alt_info_mmc=" \
|
||||
"boot part 1 1;" \
|
||||
"rootfs part 1 2;" \
|
||||
"tiboot3.bin fat 1 1;" \
|
||||
"tispl.bin fat 1 1;" \
|
||||
"u-boot.img fat 1 1;" \
|
||||
"uEnv.txt fat 1 1;" \
|
||||
"sysfw.itb fat 1 1\0"
|
||||
|
||||
#define DFU_ALT_INFO_EMMC \
|
||||
"dfu_alt_info_emmc=" \
|
||||
"rawemmc raw 0 0x800000 mmcpart 1;" \
|
||||
"rootfs part 0 1 mmcpart 0;" \
|
||||
"tiboot3.bin.raw raw 0x0 0x400 mmcpart 1;" \
|
||||
"tispl.bin.raw raw 0x400 0x1000 mmcpart 1;" \
|
||||
"u-boot.img.raw raw 0x1400 0x2000 mmcpart 1;" \
|
||||
"u-env.raw raw 0x3400 0x100 mmcpart 1;" \
|
||||
"sysfw.itb.raw raw 0x3600 0x800 mmcpart 1\0"
|
||||
|
||||
#define DFU_ALT_INFO_OSPI \
|
||||
"dfu_alt_info_ospi=" \
|
||||
"tiboot3.bin raw 0x0 0x080000;" \
|
||||
"tispl.bin raw 0x080000 0x200000;" \
|
||||
"u-boot.img raw 0x280000 0x400000;" \
|
||||
"u-boot-env raw 0x680000 0x020000;" \
|
||||
"sysfw.itb raw 0x6c0000 0x100000;" \
|
||||
"rootfs raw 0x800000 0x3800000\0"
|
||||
|
||||
#define DFU_ALT_INFO_RAM \
|
||||
"dfu_alt_info_ram=" \
|
||||
"tispl.bin ram 0x80080000 0x100000;" \
|
||||
"u-boot.img ram 0x81000000 0x100000\0" \
|
||||
|
||||
#endif /* __TI_DFU_H */
|
||||
|
|
@ -41,7 +41,7 @@
|
|||
"fi;" \
|
||||
"fi;" \
|
||||
"fi;\0" \
|
||||
"mmcloados=run args_mmc; " \
|
||||
"mmcloados=" \
|
||||
"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
|
||||
"if run loadfdt; then " \
|
||||
"bootz ${loadaddr} - ${fdtaddr}; " \
|
||||
|
|
@ -61,8 +61,9 @@
|
|||
"if mmc rescan; then " \
|
||||
"echo SD/MMC found on device ${mmcdev};" \
|
||||
"if run loadimage; then " \
|
||||
"run args_mmc; " \
|
||||
"if test ${boot_fit} -eq 1; then " \
|
||||
"run loadfit; " \
|
||||
"run run_fit; " \
|
||||
"else " \
|
||||
"run mmcloados;" \
|
||||
"fi;" \
|
||||
|
|
|
|||
|
|
@ -5,10 +5,88 @@
|
|||
#include <asm/types.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/string.h>
|
||||
|
||||
#ifdef __LITTLE_ENDIAN
|
||||
#define BITMAP_MEM_ALIGNMENT 8
|
||||
#else
|
||||
#define BITMAP_MEM_ALIGNMENT (8 * sizeof(unsigned long))
|
||||
#endif
|
||||
#define BITMAP_MEM_MASK (BITMAP_MEM_ALIGNMENT - 1)
|
||||
|
||||
#define BITMAP_FIRST_WORD_MASK(start) (~0UL << ((start) & (BITS_PER_LONG - 1)))
|
||||
#define BITMAP_LAST_WORD_MASK(nbits) (~0UL >> (-(nbits) & (BITS_PER_LONG - 1)))
|
||||
#define small_const_nbits(nbits) \
|
||||
(__builtin_constant_p(nbits) && (nbits) <= BITS_PER_LONG)
|
||||
|
||||
static inline void
|
||||
__bitmap_or(unsigned long *dst, const unsigned long *bitmap1,
|
||||
const unsigned long *bitmap2, unsigned int bits)
|
||||
{
|
||||
unsigned int k;
|
||||
unsigned int nr = BITS_TO_LONGS(bits);
|
||||
|
||||
for (k = 0; k < nr; k++)
|
||||
dst[k] = bitmap1[k] | bitmap2[k];
|
||||
}
|
||||
|
||||
static inline int
|
||||
__bitmap_weight(const unsigned long *bitmap, unsigned int bits)
|
||||
{
|
||||
unsigned int k, lim = bits / BITS_PER_LONG;
|
||||
int w = 0;
|
||||
|
||||
for (k = 0; k < lim; k++)
|
||||
w += hweight_long(bitmap[k]);
|
||||
|
||||
if (bits % BITS_PER_LONG)
|
||||
w += hweight_long(bitmap[k] & BITMAP_LAST_WORD_MASK(bits));
|
||||
|
||||
return w;
|
||||
}
|
||||
|
||||
static inline void
|
||||
__bitmap_set(unsigned long *map, unsigned int start, int len)
|
||||
{
|
||||
unsigned long *p = map + BIT_WORD(start);
|
||||
const unsigned int size = start + len;
|
||||
int bits_to_set = BITS_PER_LONG - (start % BITS_PER_LONG);
|
||||
unsigned long mask_to_set = BITMAP_FIRST_WORD_MASK(start);
|
||||
|
||||
while (len - bits_to_set >= 0) {
|
||||
*p |= mask_to_set;
|
||||
len -= bits_to_set;
|
||||
bits_to_set = BITS_PER_LONG;
|
||||
mask_to_set = ~0UL;
|
||||
p++;
|
||||
}
|
||||
if (len) {
|
||||
mask_to_set &= BITMAP_LAST_WORD_MASK(size);
|
||||
*p |= mask_to_set;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void
|
||||
__bitmap_clear(unsigned long *map, unsigned int start, int len)
|
||||
{
|
||||
unsigned long *p = map + BIT_WORD(start);
|
||||
const unsigned int size = start + len;
|
||||
int bits_to_clear = BITS_PER_LONG - (start % BITS_PER_LONG);
|
||||
unsigned long mask_to_clear = BITMAP_FIRST_WORD_MASK(start);
|
||||
|
||||
while (len - bits_to_clear >= 0) {
|
||||
*p &= ~mask_to_clear;
|
||||
len -= bits_to_clear;
|
||||
bits_to_clear = BITS_PER_LONG;
|
||||
mask_to_clear = ~0UL;
|
||||
p++;
|
||||
}
|
||||
if (len) {
|
||||
mask_to_clear &= BITMAP_LAST_WORD_MASK(size);
|
||||
*p &= ~mask_to_clear;
|
||||
}
|
||||
}
|
||||
|
||||
static inline void bitmap_zero(unsigned long *dst, int nbits)
|
||||
{
|
||||
if (small_const_nbits(nbits)) {
|
||||
|
|
@ -81,4 +159,59 @@ static inline unsigned long find_first_bit(const unsigned long *addr, unsigned l
|
|||
(bit) < (size); \
|
||||
(bit) = find_next_bit((addr), (size), (bit) + 1))
|
||||
|
||||
static inline void bitmap_fill(unsigned long *dst, unsigned int nbits)
|
||||
{
|
||||
if (small_const_nbits(nbits)) {
|
||||
*dst = ~0UL;
|
||||
} else {
|
||||
unsigned int len = BITS_TO_LONGS(nbits) * sizeof(unsigned long);
|
||||
|
||||
memset(dst, 0xff, len);
|
||||
}
|
||||
}
|
||||
|
||||
static inline void bitmap_or(unsigned long *dst, const unsigned long *src1,
|
||||
const unsigned long *src2, unsigned int nbits)
|
||||
{
|
||||
if (small_const_nbits(nbits))
|
||||
*dst = *src1 | *src2;
|
||||
else
|
||||
__bitmap_or(dst, src1, src2, nbits);
|
||||
}
|
||||
|
||||
static inline int bitmap_weight(const unsigned long *src, unsigned int nbits)
|
||||
{
|
||||
if (small_const_nbits(nbits))
|
||||
return hweight_long(*src & BITMAP_LAST_WORD_MASK(nbits));
|
||||
return __bitmap_weight(src, nbits);
|
||||
}
|
||||
|
||||
static inline void bitmap_set(unsigned long *map, unsigned int start,
|
||||
unsigned int nbits)
|
||||
{
|
||||
if (__builtin_constant_p(nbits) && nbits == 1)
|
||||
__set_bit(start, map);
|
||||
else if (__builtin_constant_p(start & BITMAP_MEM_MASK) &&
|
||||
IS_ALIGNED(start, BITMAP_MEM_ALIGNMENT) &&
|
||||
__builtin_constant_p(nbits & BITMAP_MEM_MASK) &&
|
||||
IS_ALIGNED(nbits, BITMAP_MEM_ALIGNMENT))
|
||||
memset((char *)map + start / 8, 0xff, nbits / 8);
|
||||
else
|
||||
__bitmap_set(map, start, nbits);
|
||||
}
|
||||
|
||||
static inline void bitmap_clear(unsigned long *map, unsigned int start,
|
||||
unsigned int nbits)
|
||||
{
|
||||
if (__builtin_constant_p(nbits) && nbits == 1)
|
||||
__clear_bit(start, map);
|
||||
else if (__builtin_constant_p(start & BITMAP_MEM_MASK) &&
|
||||
IS_ALIGNED(start, BITMAP_MEM_ALIGNMENT) &&
|
||||
__builtin_constant_p(nbits & BITMAP_MEM_MASK) &&
|
||||
IS_ALIGNED(nbits, BITMAP_MEM_ALIGNMENT))
|
||||
memset((char *)map + start / 8, 0, nbits / 8);
|
||||
else
|
||||
__bitmap_clear(map, start, nbits);
|
||||
}
|
||||
|
||||
#endif /* __LINUX_BITMAP_H */
|
||||
|
|
|
|||
|
|
@ -4,6 +4,7 @@
|
|||
#include <asm/types.h>
|
||||
#include <asm-generic/bitsperlong.h>
|
||||
#include <linux/compiler.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
#define BIT(nr) (1UL << (nr))
|
||||
|
|
@ -133,6 +134,17 @@ static inline unsigned int generic_hweight8(unsigned int w)
|
|||
return (res & 0x0F) + ((res >> 4) & 0x0F);
|
||||
}
|
||||
|
||||
static inline unsigned long generic_hweight64(__u64 w)
|
||||
{
|
||||
return generic_hweight32((unsigned int)(w >> 32)) +
|
||||
generic_hweight32((unsigned int)w);
|
||||
}
|
||||
|
||||
static inline unsigned long hweight_long(unsigned long w)
|
||||
{
|
||||
return sizeof(w) == 4 ? generic_hweight32(w) : generic_hweight64(w);
|
||||
}
|
||||
|
||||
#include <asm/bitops.h>
|
||||
|
||||
/* linux/include/asm-generic/bitops/non-atomic.h */
|
||||
|
|
|
|||
Loading…
Reference in New Issue