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Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

Browse Source 
* 'master' of git://git.denx.de/u-boot-mpc85xx:
  mpc85xx: Add inline GPIO acessor functions
  powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)
  powerpc/85xx: Fix P2020DS booting
  powerpc/85xx: Update USB device tree status based on pin settings
  fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers
  powerpc/85xx: Add support for RMan LIODN initialization
  powerpc/85xx: Update device tree handling for SRIO
  powerpc/85xx: Update setting of SRIO LIODNs
  fm: Don't allow disabling of FM1-DTSEC1
  fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree
This commit is contained in:
Wolfgang Denk 2011-10-21 23:48:46 +02:00
commit 02aff558f4
29 changed files with 602 additions and 86 deletions
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23
arch/powerpc/cpu/mpc85xx/fdt.c
View File

@ -537,6 +537,27 @@ void fdt_fixup_fman_firmware(void *blob)
#define fdt_fixup_fman_firmware(x)
#endif
#if defined(CONFIG_PPC_P4080) || defined(CONFIG_PPC_P3060)
static void fdt_fixup_usb(void *fdt)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
u32 rcwsr11 = in_be32(&gur->rcwsr[11]);
int off;
off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-mph");
if ((rcwsr11 & FSL_CORENET_RCWSR11_EC1) !=
FSL_CORENET_RCWSR11_EC1_FM1_USB1)
fdt_status_disabled(fdt, off);
off = fdt_node_offset_by_compatible(fdt, -1, "fsl,mpc85xx-usb2-dr");
if ((rcwsr11 & FSL_CORENET_RCWSR11_EC2) !=
FSL_CORENET_RCWSR11_EC2_USB2)
fdt_status_disabled(fdt, off);
}
#else
#define fdt_fixup_usb(x)
#endif
void ft_cpu_setup(void *blob, bd_t *bd)
{
int off;
@ -641,6 +662,8 @@ void ft_cpu_setup(void *blob, bd_t *bd)
do_fixup_by_compat_u32(blob, "fsl,flexcan-v1.0",
"clock_freq", gd->bus_clk, 1);
fdt_fixup_usb(blob);
}
/*

10
arch/powerpc/cpu/mpc85xx/fsl_corenet_serdes.c
View File

@ -504,9 +504,6 @@ void fsl_serdes_init(void)
const char *srds_lpd_arg;
size_t arglen;
#endif
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
enum srds_prtcl device;
#endif
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES_A001
int need_serdes_a001; /* TRUE == need work-around for SERDES A001 */
#endif
@ -787,11 +784,4 @@ void fsl_serdes_init(void)
SRDS_RSTCTL_SDPD);
}
#endif
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
for (device = XAUI_FM1; device <= XAUI_FM2; device++) {
if (is_serdes_configured(device))
__serdes_reset_rx(srds_regs, cfg, device);
}
#endif
}

88
arch/powerpc/cpu/mpc85xx/liodn.c
View File

@ -40,6 +40,21 @@ int get_dpaa_liodn(enum fsl_dpaa_dev dpaa_dev, u32 *liodns, int liodn_offset)
return liodn_bases[dpaa_dev].num_ids;
}
static void set_srio_liodn(struct srio_liodn_id_table *tbl, int size)
{
int i;
for (i = 0; i < size; i++) {
unsigned long reg_off = tbl[i].reg_offset[0];
out_be32((u32 *)reg_off, tbl[i].id[0]);
if (tbl[i].num_ids == 2) {
reg_off = tbl[i].reg_offset[1];
out_be32((u32 *)reg_off, tbl[i].id[1]);
}
}
}
static void set_liodn(struct liodn_id_table *tbl, int size)
{
int i;
@ -133,11 +148,42 @@ static void setup_raide_liodn_base(void)
}
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
static void set_rman_liodn(struct liodn_id_table *tbl, int size)
{
int i;
struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR;
for (i = 0; i < size; i++) {
/* write the RMan block number */
out_be32(&rman->mmitar, i);
/* write the liodn offset corresponding to the block */
out_be32((u32 *)(tbl[i].reg_offset), tbl[i].id[0]);
}
}
static void setup_rman_liodn_base(struct liodn_id_table *tbl, int size)
{
int i;
struct ccsr_rman *rman = (void *)CONFIG_SYS_FSL_CORENET_RMAN_ADDR;
u32 base = liodn_bases[FSL_HW_PORTAL_RMAN].id[0];
out_be32(&rman->mmliodnbr, base);
/* update liodn offset */
for (i = 0; i < size; i++)
tbl[i].id[0] += base;
}
#endif
void set_liodns(void)
{
/* setup general liodn offsets */
set_liodn(liodn_tbl, liodn_tbl_sz);
/* setup SRIO port liodns */
set_srio_liodn(srio_liodn_tbl, srio_liodn_tbl_sz);
/* setup SEC block liodn bases & offsets if we have one */
if (IS_E_PROCESSOR(get_svr())) {
set_liodn(sec_liodn_tbl, sec_liodn_tbl_sz);
@ -164,6 +210,42 @@ void set_liodns(void)
set_liodn(raide_liodn_tbl, raide_liodn_tbl_sz);
setup_raide_liodn_base();
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
/* setup RMan liodn offsets */
set_rman_liodn(rman_liodn_tbl, rman_liodn_tbl_sz);
/* setup RMan liodn base */
setup_rman_liodn_base(rman_liodn_tbl, rman_liodn_tbl_sz);
#endif
}
static void fdt_fixup_srio_liodn(void *blob, struct srio_liodn_id_table *tbl)
{
int i, srio_off;
/* search for srio node, if doesn't exist just return - nothing todo */
srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
if (srio_off < 0)
return ;
for (i = 0; i < srio_liodn_tbl_sz; i++) {
int off, portid = tbl[i].portid;
off = fdt_node_offset_by_prop_value(blob, srio_off,
"cell-index", &portid, 4);
if (off >= 0) {
off = fdt_setprop(blob, off, "fsl,liodn",
&tbl[i].id[0],
sizeof(u32) * tbl[i].num_ids);
if (off > 0)
printf("WARNING unable to set fsl,liodn for "
"fsl,srio port %d: %s\n",
portid, fdt_strerror(off));
} else {
debug("WARNING: couldn't set fsl,liodn for srio: %s.\n",
fdt_strerror(off));
}
}
}
static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
@ -195,6 +277,8 @@ static void fdt_fixup_liodn_tbl(void *blob, struct liodn_id_table *tbl, int sz)
void fdt_fixup_liodn(void *blob)
{
fdt_fixup_srio_liodn(blob, srio_liodn_tbl);
fdt_fixup_liodn_tbl(blob, liodn_tbl, liodn_tbl_sz);
#ifdef CONFIG_SYS_DPAA_FMAN
fdt_fixup_liodn_tbl(blob, fman1_liodn_tbl, fman1_liodn_tbl_sz);
@ -207,4 +291,8 @@ void fdt_fixup_liodn(void *blob)
#ifdef CONFIG_SYS_FSL_RAID_ENGINE
fdt_fixup_liodn_tbl(blob, raide_liodn_tbl, raide_liodn_tbl_sz);
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
fdt_fixup_liodn_tbl(blob, rman_liodn_tbl, rman_liodn_tbl_sz);
#endif
}

20
arch/powerpc/cpu/mpc85xx/p2041_ids.c
View File

@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
};
#endif
struct srio_liodn_id_table srio_liodn_tbl[] = {
SET_SRIO_LIODN_2(1, 199, 200),
SET_SRIO_LIODN_2(2, 201, 202),
};
int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
struct liodn_id_table liodn_tbl[] = {
#ifdef CONFIG_SYS_DPAA_QBMAN
SET_QMAN_LIODN(31),
@ -98,6 +104,17 @@ struct liodn_id_table sec_liodn_tbl[] = {
};
int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
#ifdef CONFIG_SYS_DPAA_RMAN
struct liodn_id_table rman_liodn_tbl[] = {
/* Set RMan block 0-3 liodn offset */
SET_RMAN_LIODN(0, 6),
SET_RMAN_LIODN(1, 7),
SET_RMAN_LIODN(2, 8),
SET_RMAN_LIODN(3, 9),
};
int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
#endif
struct liodn_id_table liodn_bases[] = {
[FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100),
#ifdef CONFIG_SYS_DPAA_FMAN
@ -106,4 +123,7 @@ struct liodn_id_table liodn_bases[] = {
#ifdef CONFIG_SYS_DPAA_PME
[FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172),
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
[FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80),
#endif
};

20
arch/powerpc/cpu/mpc85xx/p3041_ids.c
View File

@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
};
#endif
struct srio_liodn_id_table srio_liodn_tbl[] = {
SET_SRIO_LIODN_2(1, 199, 200),
SET_SRIO_LIODN_2(2, 201, 202),
};
int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
struct liodn_id_table liodn_tbl[] = {
#ifdef CONFIG_SYS_DPAA_QBMAN
SET_QMAN_LIODN(31),
@ -97,6 +103,17 @@ struct liodn_id_table sec_liodn_tbl[] = {
};
int sec_liodn_tbl_sz = ARRAY_SIZE(sec_liodn_tbl);
#ifdef CONFIG_SYS_DPAA_RMAN
struct liodn_id_table rman_liodn_tbl[] = {
/* Set RMan block 0-3 liodn offset */
SET_RMAN_LIODN(0, 6),
SET_RMAN_LIODN(1, 7),
SET_RMAN_LIODN(2, 8),
SET_RMAN_LIODN(3, 9),
};
int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
#endif
struct liodn_id_table liodn_bases[] = {
[FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100),
#ifdef CONFIG_SYS_DPAA_FMAN
@ -105,4 +122,7 @@ struct liodn_id_table liodn_bases[] = {
#ifdef CONFIG_SYS_DPAA_PME
[FSL_HW_PORTAL_PME] = SET_LIODN_BASE_2(136, 172),
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
[FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80),
#endif
};

10
arch/powerpc/cpu/mpc85xx/p3060_ids.c
View File

@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
};
#endif
struct srio_liodn_id_table srio_liodn_tbl[] = {
SET_SRIO_LIODN_1(1, 198),
SET_SRIO_LIODN_1(2, 199),
};
int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
struct liodn_id_table liodn_tbl[] = {
SET_USB_LIODN(1, "fsl-usb2-mph", 127),
SET_USB_LIODN(2, "fsl-usb2-dr", 157),
@ -50,9 +56,7 @@ struct liodn_id_table liodn_tbl[] = {
SET_DMA_LIODN(1, 196),
SET_DMA_LIODN(2, 197),
SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0),
SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0),
SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0),
SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000),
#ifdef CONFIG_SYS_DPAA_QBMAN
SET_QMAN_LIODN(31),

10
arch/powerpc/cpu/mpc85xx/p4080_ids.c
View File

@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
};
#endif
struct srio_liodn_id_table srio_liodn_tbl[] = {
SET_SRIO_LIODN_1(1, 198),
SET_SRIO_LIODN_1(2, 199),
};
int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
struct liodn_id_table liodn_tbl[] = {
SET_USB_LIODN(1, "fsl-usb2-mph", 127),
SET_USB_LIODN(2, "fsl-usb2-dr", 157),
@ -53,9 +59,7 @@ struct liodn_id_table liodn_tbl[] = {
SET_DMA_LIODN(1, 196),
SET_DMA_LIODN(2, 197),
SET_GUTS_LIODN("fsl,rapidio-delta", 198, rio1liodnr, 0),
SET_GUTS_LIODN(NULL, 199, rio2liodnr, 0),
SET_GUTS_LIODN(NULL, 200, rmuliodnr, 0),
SET_GUTS_LIODN("fsl,srio-rmu", 200, rmuliodnr, 0xd3000),
#ifdef CONFIG_SYS_DPAA_QBMAN
SET_QMAN_LIODN(31),

20
arch/powerpc/cpu/mpc85xx/p5020_ids.c
View File

@ -40,6 +40,12 @@ struct qportal_info qp_info[CONFIG_SYS_QMAN_NUM_PORTALS] = {
};
#endif
struct srio_liodn_id_table srio_liodn_tbl[] = {
SET_SRIO_LIODN_2(1, 199, 200),
SET_SRIO_LIODN_2(2, 201, 202),
};
int srio_liodn_tbl_sz = ARRAY_SIZE(srio_liodn_tbl);
struct liodn_id_table liodn_tbl[] = {
#ifdef CONFIG_SYS_DPAA_QBMAN
SET_QMAN_LIODN(31),
@ -107,6 +113,17 @@ struct liodn_id_table raide_liodn_tbl[] = {
int raide_liodn_tbl_sz = ARRAY_SIZE(raide_liodn_tbl);
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
struct liodn_id_table rman_liodn_tbl[] = {
/* Set RMan block 0-3 liodn offset */
SET_RMAN_LIODN(0, 6),
SET_RMAN_LIODN(1, 7),
SET_RMAN_LIODN(2, 8),
SET_RMAN_LIODN(3, 9),
};
int rman_liodn_tbl_sz = ARRAY_SIZE(rman_liodn_tbl);
#endif
struct liodn_id_table liodn_bases[] = {
[FSL_HW_PORTAL_SEC] = SET_LIODN_BASE_2(64, 100),
#ifdef CONFIG_SYS_DPAA_FMAN
@ -118,4 +135,7 @@ struct liodn_id_table liodn_bases[] = {
#ifdef CONFIG_SYS_FSL_RAID_ENGINE
[FSL_HW_PORTAL_RAID_ENGINE] = SET_LIODN_BASE_1(47),
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
[FSL_HW_PORTAL_RMAN] = SET_LIODN_BASE_1(80),
#endif
};

6
arch/powerpc/cpu/mpc85xx/portals.c
View File

@ -245,6 +245,12 @@ void fdt_fixup_qportals(void *blob)
goto err;
}
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
err = fdt_qportal(blob, off, i, "rman@0",
FSL_HW_PORTAL_RMAN, 1);
if (err < 0)
goto err;
#endif
err:
if (err < 0) {

72
arch/powerpc/cpu/mpc8xxx/fdt.c
View File

@ -275,21 +275,73 @@ int fdt_fixup_phy_connection(void *blob, int offset, phy_interface_t phyc)
}
#ifdef CONFIG_SYS_SRIO
static inline void ft_disable_srio_port(void *blob, int srio_off, int port)
{
int off = fdt_node_offset_by_prop_value(blob, srio_off,
"cell-index", &port, 4);
if (off >= 0) {
off = fdt_setprop_string(blob, off, "status", "disabled");
if (off > 0)
printf("WARNING unable to set status for fsl,srio "
"port %d: %s\n", port, fdt_strerror(off));
}
}
static inline void ft_disable_rman(void *blob)
{
int off = fdt_node_offset_by_compatible(blob, -1, "fsl,rman");
if (off >= 0) {
off = fdt_setprop_string(blob, off, "status", "disabled");
if (off > 0)
printf("WARNING unable to set status for fsl,rman %s\n",
fdt_strerror(off));
}
}
static inline void ft_disable_rmu(void *blob)
{
int off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio-rmu");
if (off >= 0) {
off = fdt_setprop_string(blob, off, "status", "disabled");
if (off > 0)
printf("WARNING unable to set status for "
"fsl,srio-rmu %s\n", fdt_strerror(off));
}
}
void ft_srio_setup(void *blob)
{
int srio1_used = 0, srio2_used = 0;
int srio_off;
/* search for srio node, if doesn't exist just return - nothing todo */
srio_off = fdt_node_offset_by_compatible(blob, -1, "fsl,srio");
if (srio_off < 0)
return ;
#ifdef CONFIG_SRIO1
if (!is_serdes_configured(SRIO1)) {
fdt_del_node_and_alias(blob, "rio0");
}
#else
fdt_del_node_and_alias(blob, "rio0");
if (is_serdes_configured(SRIO1))
srio1_used = 1;
#endif
#ifdef CONFIG_SRIO2
if (!is_serdes_configured(SRIO2)) {
fdt_del_node_and_alias(blob, "rio1");
}
#else
fdt_del_node_and_alias(blob, "rio1");
if (is_serdes_configured(SRIO2))
srio2_used = 1;
#endif
/* mark port1 disabled */
if (!srio1_used)
ft_disable_srio_port(blob, srio_off, 1);
/* mark port2 disabled */
if (!srio2_used)
ft_disable_srio_port(blob, srio_off, 2);
/* if both ports not used, disable controller, rmu and rman */
if (!srio1_used && !srio2_used) {
fdt_setprop_string(blob, srio_off, "status", "disabled");
ft_disable_rman(blob);
ft_disable_rmu(blob);
}
}
#endif

30
arch/powerpc/include/asm/fsl_liodn.h
View File

@ -25,6 +25,26 @@
#include <asm/types.h>
struct srio_liodn_id_table {
u32 id[2];
unsigned long reg_offset[2];
u8 num_ids;
u8 portid;
};
#define SET_SRIO_LIODN_1(port, idA) \
{ .id = { idA }, .num_ids = 1, .portid = port, \
.reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
}
#define SET_SRIO_LIODN_2(port, idA, idB) \
{ .id = { idA, idB }, .num_ids = 2, .portid = port, \
.reg_offset[0] = offsetof(ccsr_gur_t, rio##port##liodnr) \
+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
.reg_offset[1] = offsetof(ccsr_gur_t, rio##port##maintliodnr) \
+ CONFIG_SYS_MPC85xx_GUTS_OFFSET + CONFIG_SYS_CCSRBAR, \
}
struct liodn_id_table {
const char * compat;
u32 id[2];
@ -155,10 +175,20 @@ extern void fdt_fixup_liodn(void *blob);
offsetof(struct ccsr_raide, jq[jqNum].ring[rNum].cfg0) + \
CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
#define SET_RMAN_LIODN(ibNum, liodn) \
SET_LIODN_ENTRY_1("fsl,rman-inbound-block", liodn, \
offsetof(struct ccsr_rman, mmitdr) + \
CONFIG_SYS_FSL_CORENET_RMAN_OFFSET, \
CONFIG_SYS_FSL_CORENET_RMAN_OFFSET + ibNum * 0x1000)
extern struct liodn_id_table liodn_tbl[], liodn_bases[], sec_liodn_tbl[];
extern struct liodn_id_table raide_liodn_tbl[];
extern struct liodn_id_table fman1_liodn_tbl[], fman2_liodn_tbl[];
extern struct srio_liodn_id_table srio_liodn_tbl[];
extern struct liodn_id_table rman_liodn_tbl[];
extern int liodn_tbl_sz, sec_liodn_tbl_sz, raide_liodn_tbl_sz;
extern int fman1_liodn_tbl_sz, fman2_liodn_tbl_sz;
extern int srio_liodn_tbl_sz;
extern int rman_liodn_tbl_sz;
#endif

4
arch/powerpc/include/asm/fsl_portals.h
View File

@ -38,6 +38,10 @@ enum fsl_dpaa_dev {
#ifdef CONFIG_SYS_FSL_RAID_ENGINE
FSL_HW_PORTAL_RAID_ENGINE,
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
FSL_HW_PORTAL_RMAN,
#endif
};
struct qportal_info {

13
arch/powerpc/include/asm/immap_85xx.h
View File

@ -2339,6 +2339,16 @@ struct ccsr_raide {
};
#endif
#ifdef CONFIG_SYS_DPAA_RMAN
struct ccsr_rman {
u8 res0[0xf64];
u32 mmliodnbr; /* Message Manager LIODN Base Register */
u32 mmitar; /* RMAN Inbound Translation Address Register */
u32 mmitdr; /* RMAN Inbound Translation Data Register */
u8 res4[0x1f090];
};
#endif
#ifdef CONFIG_FSL_CORENET
#define CONFIG_SYS_FSL_CORENET_CCM_OFFSET 0x0000
#define CONFIG_SYS_MPC85xx_DDR_OFFSET 0x8000
@ -2354,6 +2364,7 @@ struct ccsr_raide {
#define CONFIG_SYS_MPC85xx_ESDHC_OFFSET 0x114000
#define CONFIG_SYS_MPC85xx_LBC_OFFSET 0x124000
#define CONFIG_SYS_MPC85xx_GPIO_OFFSET 0x130000
#define CONFIG_SYS_FSL_CORENET_RMAN_OFFSET 0x1e0000
#define CONFIG_SYS_MPC85xx_PCIE1_OFFSET 0x200000
#define CONFIG_SYS_MPC85xx_PCIE2_OFFSET 0x201000
#define CONFIG_SYS_MPC85xx_PCIE3_OFFSET 0x202000
@ -2442,6 +2453,8 @@ struct ccsr_raide {
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_PME_OFFSET)
#define CONFIG_SYS_FSL_RAID_ENGINE_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_RAID_ENGINE_OFFSET)
#define CONFIG_SYS_FSL_CORENET_RMAN_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_FSL_CORENET_RMAN_OFFSET)
#define CONFIG_SYS_MPC85xx_GUTS_ADDR \
(CONFIG_SYS_IMMR + CONFIG_SYS_MPC85xx_GUTS_OFFSET)
#define CONFIG_SYS_FSL_CORENET_CCM_ADDR \

123
arch/powerpc/include/asm/mpc85xx_gpio.h Normal file
View File

@ -0,0 +1,123 @@
/*
* Copyright 2010 eXMeritus, A Boeing Company
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of
* the License, or (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
* MA 02111-1307 USA
*/
#ifndef POWERPC_ASM_MPC85XX_GPIO_H_
#define POWERPC_ASM_MPC85XX_GPIO_H_
# include <asm/immap_85xx.h>
/*
* The following internal functions are an MPC85XX-specific GPIO API which
* allows setting and querying multiple GPIOs in a single operation.
*
* All of these look relatively large, but the arguments are almost always
* constants, so they compile down to just a few instructions and a
* memory-mapped IO operation or two.
*/
static inline void mpc85xx_gpio_set(unsigned int mask,
unsigned int dir, unsigned int val)
{
ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR + 0xc00);
/* First mask off the unwanted parts of "dir" and "val" */
dir &= mask;
val &= mask;
/* Now read in the values we're supposed to preserve */
dir |= (in_be32(&gpio->gpdir) & ~mask);
val |= (in_be32(&gpio->gpdat) & ~mask);
/*
* Poke the new output values first, then set the direction. This
* helps to avoid transient data when switching from input to output
* and vice versa.
*/
out_be32(&gpio->gpdat, val);
out_be32(&gpio->gpdir, dir);
}
static inline void mpc85xx_gpio_set_in(unsigned int gpios)
{
mpc85xx_gpio_set(gpios, 0x00000000, 0x00000000);
}
static inline void mpc85xx_gpio_set_low(unsigned int gpios)
{
mpc85xx_gpio_set(gpios, 0xFFFFFFFF, 0x00000000);
}
static inline void mpc85xx_gpio_set_high(unsigned int gpios)
{
mpc85xx_gpio_set(gpios, 0xFFFFFFFF, 0xFFFFFFFF);
}
static inline unsigned int mpc85xx_gpio_get(unsigned int mask)
{
ccsr_gpio_t *gpio = (void *)(CONFIG_SYS_MPC85xx_GPIO_ADDR + 0xc00);
/* Read the requested values */
return in_be32(&gpio->gpdat) & mask;
}
/*
* These implement the generic Linux GPIO API on top of the other functions
* in this header.
*/
static inline int gpio_request(unsigned gpio, const char *label)
{
/* Compatibility shim */
return 0;
}
static inline void gpio_free(unsigned gpio)
{
/* Compatibility shim */
}
static inline int gpio_direction_input(unsigned gpio)
{
mpc85xx_gpio_set_in(1U << gpio);
return 0;
}
static inline int gpio_direction_output(unsigned gpio, int value)
{
mpc85xx_gpio_set_low(1U << gpio);
return 0;
}
static inline int gpio_get_value(unsigned gpio)
{
return !!mpc85xx_gpio_get(1U << gpio);
}
static inline void gpio_set_value(unsigned gpio, int value)
{
if (value)
mpc85xx_gpio_set_high(1U << gpio);
else
mpc85xx_gpio_set_low(1U << gpio);
}
static inline int gpio_is_valid(int gpio)
{
return (gpio >= 0) && (gpio < 32);
}
#endif /* not POWERPC_ASM_MPC85XX_GPIO_H_ */

26
board/freescale/corenet_ds/eth_hydra.c
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@ -70,6 +70,7 @@
#include <fm_eth.h>
#include <fsl_mdio.h>
#include <malloc.h>
#include <fdt_support.h>
#include <asm/fsl_dtsec.h>
#include "../common/ngpixis.h"
@ -199,25 +200,6 @@ static int hydra_mdio_init(char *realbusname, char *fakebusname)
return mdio_register(bus);
}
/*
* Given an alias or a path for a node, set the status of that node.
*
* If 'alias' is not a valid alias, then it is treated as a full path to the
* node. No error checking is performed.
*
* This function is normally called to set the status for a virtual MDIO node.
*/
static void fdt_set_node_status(void *fdt, const char *alias,
const char *status)
{
const char *path = fdt_get_alias(fdt, alias);
if (!path)
path = alias;
do_fixup_by_path(fdt, path, "status", status, strlen(status) + 1, 1);
}
/*
* Given an alias or a path for a node, set the mux value of that node.
*
@ -372,14 +354,14 @@ void fdt_fixup_board_enet(void *fdt)
case PHY_INTERFACE_MODE_SGMII:
lane = serdes_get_first_lane(SGMII_FM1_DTSEC1 + idx);
if (lane >= 0) {
fdt_set_node_status(fdt, "emi1_sgmii", "okay");
fdt_status_okay_by_alias(fdt, "emi1_sgmii");
/* Also set the MUX value */
fdt_set_mdio_mux(fdt, "emi1_sgmii",
mdio_mux[i].val);
}
break;
case PHY_INTERFACE_MODE_RGMII:
fdt_set_node_status(fdt, "emi1_rgmii", "okay");
fdt_status_okay_by_alias(fdt, "emi1_rgmii");
break;
default:
break;
@ -388,7 +370,7 @@ void fdt_fixup_board_enet(void *fdt)
lane = serdes_get_first_lane(XAUI_FM1);
if (lane >= 0)
fdt_set_node_status(fdt, "emi2_xgmii", "okay");
fdt_status_okay_by_alias(fdt, "emi2_xgmii");
#endif
}

74
board/freescale/corenet_ds/eth_p4080.c
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@ -93,21 +93,43 @@ struct mii_dev *mii_dev_for_muxval(u32 muxval)
return bus;
}
#ifdef CONFIG_SYS_P4080_ERRATUM_SERDES9
#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9) && defined(CONFIG_PHY_TERANETICS)
int board_phy_config(struct phy_device *phydev)
{
/*
* If this is the 10G PHY, and we switched it to fiber,
* we need to reset the serdes link for SERDES9
*/
if ((phydev->port == PORT_FIBRE) && (phydev->drv->uid == 0x00a19410)) {
if (phydev->drv->uid == PHY_UID_TN2020) {
unsigned long timeout = 1 * 1000; /* 1 seconds */
enum srds_prtcl device;
/*
* Wait for the XAUI to come out of reset. This is when it
* starts transmitting alignment signals.
*/
while (--timeout) {
int reg = phy_read(phydev, MDIO_MMD_PHYXS, MDIO_CTRL1);
if (reg < 0) {
printf("TN2020: Error reading from PHY at "
"address %u\n", phydev->addr);
break;
}
/*
* Note that we've never actually seen
* MDIO_CTRL1_RESET set to 1.
*/
if ((reg & MDIO_CTRL1_RESET) == 0)
break;
udelay(1000);
}
if (!timeout) {
printf("TN2020: Timeout waiting for PHY at address %u "
" to reset.\n", phydev->addr);
}
switch (phydev->addr) {
case 4:
case CONFIG_SYS_FM1_10GEC1_PHY_ADDR:
device = XAUI_FM1;
break;
case 0:
case CONFIG_SYS_FM2_10GEC1_PHY_ADDR:
device = XAUI_FM2;
break;
default:
@ -199,22 +221,6 @@ static int p4080ds_mdio_init(char *realbusname, u32 muxval)
return mdio_register(bus);
}
/*
* Sets the specified node's status to the value contained in "status"
* If the first character of the specified path is "/" then we use
* alias as a path. Otherwise, we look for an alias of that name
*/
static void fdt_set_node_status(void *fdt, const char *alias,
const char *status)
{
const char *path = fdt_get_alias(fdt, alias);
if (!path)
path = alias;
do_fixup_by_path(fdt, path, "status", status, strlen(status) + 1, 1);
}
void board_ft_fman_fixup_port(void *blob, char * prop, phys_addr_t pa,
enum fm_port port, int offset)
{
@ -255,28 +261,28 @@ void fdt_fixup_board_enet(void *fdt)
*/
/* We've got six MDIO nodes that may or may not need to exist */
fdt_set_node_status(fdt, "emi1_slot3", "disabled");
fdt_set_node_status(fdt, "emi1_slot4", "disabled");
fdt_set_node_status(fdt, "emi1_slot5", "disabled");
fdt_set_node_status(fdt, "emi2_slot4", "disabled");
fdt_set_node_status(fdt, "emi2_slot5", "disabled");
fdt_status_disabled_by_alias(fdt, "emi1_slot3");
fdt_status_disabled_by_alias(fdt, "emi1_slot4");
fdt_status_disabled_by_alias(fdt, "emi1_slot5");
fdt_status_disabled_by_alias(fdt, "emi2_slot4");
fdt_status_disabled_by_alias(fdt, "emi2_slot5");
for (i = 0; i < NUM_FM_PORTS; i++) {
switch (mdio_mux[i]) {
case EMI1_SLOT3:
fdt_set_node_status(fdt, "emi1_slot3", "okay");
fdt_status_okay_by_alias(fdt, "emi1_slot3");
break;
case EMI1_SLOT4:
fdt_set_node_status(fdt, "emi1_slot4", "okay");
fdt_status_okay_by_alias(fdt, "emi1_slot4");
break;
case EMI1_SLOT5:
fdt_set_node_status(fdt, "emi1_slot5", "okay");
fdt_status_okay_by_alias(fdt, "emi1_slot5");
break;
case EMI2_SLOT4:
fdt_set_node_status(fdt, "emi2_slot4", "okay");
fdt_status_okay_by_alias(fdt, "emi2_slot4");
break;
case EMI2_SLOT5:
fdt_set_node_status(fdt, "emi2_slot5", "okay");
fdt_status_okay_by_alias(fdt, "emi2_slot5");
break;
}
}

12
board/freescale/p2020ds/ddr.c
View File

@ -57,6 +57,7 @@ void fsl_ddr_board_options(memctl_options_t *popts,
{
const struct board_specific_parameters *pbsp, *pbsp_highest = NULL;
ulong ddr_freq;
int i;
if (ctrl_num) {
printf("Wrong parameter for controller number %d", ctrl_num);
@ -65,6 +66,17 @@ void fsl_ddr_board_options(memctl_options_t *popts,
if (!pdimm->n_ranks)
return;
/*
* set odt_rd_cfg and odt_wr_cfg. If the there is only one dimm in
* that controller, set odt_wr_cfg to 4 for CS0, and 0 to CS1. If
* there are two dimms in the controller, set odt_rd_cfg to 3 and
* odt_wr_cfg to 3 for the even CS, 0 for the odd CS.
*/
for (i = 0; i < CONFIG_CHIP_SELECTS_PER_CTRL; i++) {
popts->cs_local_opts[i].odt_rd_cfg = 0;
popts->cs_local_opts[i].odt_wr_cfg = 1;
}
pbsp = dimm0;
/* Get clk_adjust, cpo, write_data_delay,2T, according to the board ddr

60
common/fdt_support.c
View File

@ -2,7 +2,7 @@
* (C) Copyright 2007
* Gerald Van Baren, Custom IDEAS, vanbaren@cideas.com
*
* Copyright 2010 Freescale Semiconductor, Inc.
* Copyright 2010-2011 Freescale Semiconductor, Inc.
*
* See file CREDITS for list of people who contributed to this
* project.
@ -1259,6 +1259,64 @@ unsigned int fdt_create_phandle(void *fdt, int nodeoffset)
return phandle;
}
/*
* fdt_set_node_status: Set status for the given node
*
* @fdt: ptr to device tree
* @nodeoffset: node to update
* @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED,
* FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE
* @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE
*/
int fdt_set_node_status(void *fdt, int nodeoffset,
enum fdt_status status, unsigned int error_code)
{
char buf[16];
int ret = 0;
if (nodeoffset < 0)
return nodeoffset;
switch (status) {
case FDT_STATUS_OKAY:
ret = fdt_setprop_string(fdt, nodeoffset, "status", "okay");
break;
case FDT_STATUS_DISABLED:
ret = fdt_setprop_string(fdt, nodeoffset, "status", "disabled");
break;
case FDT_STATUS_FAIL:
ret = fdt_setprop_string(fdt, nodeoffset, "status", "fail");
break;
case FDT_STATUS_FAIL_ERROR_CODE:
sprintf(buf, "fail-%d", error_code);
ret = fdt_setprop_string(fdt, nodeoffset, "status", buf);
break;
default:
printf("Invalid fdt status: %x\n", status);
ret = -1;
break;
}
return ret;
}
/*
* fdt_set_status_by_alias: Set status for the given node given an alias
*
* @fdt: ptr to device tree
* @alias: alias of node to update
* @status: FDT_STATUS_OKAY, FDT_STATUS_DISABLED,
* FDT_STATUS_FAIL, FDT_STATUS_FAIL_ERROR_CODE
* @error_code: optional, only used if status is FDT_STATUS_FAIL_ERROR_CODE
*/
int fdt_set_status_by_alias(void *fdt, const char* alias,
enum fdt_status status, unsigned int error_code)
{
int offset = fdt_path_offset(fdt, alias);
return fdt_set_node_status(fdt, offset, status, error_code);
}
#if defined(CONFIG_VIDEO)
int fdt_add_edid(void *blob, const char *compat, unsigned char *edid_buf)
{

10
drivers/net/fm/init.c
View File

@ -183,6 +183,8 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
{
int off, ph;
phys_addr_t paddr = CONFIG_SYS_CCSRBAR_PHYS + info->compat_offset;
u64 dtsec1_addr = (u64)CONFIG_SYS_CCSRBAR_PHYS +
CONFIG_SYS_FSL_FM1_DTSEC1_OFFSET;
off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
@ -195,9 +197,13 @@ static void ft_fixup_port(void *blob, struct fm_eth_info *info, char *prop)
/* board code might have caused offset to change */
off = fdt_node_offset_by_compat_reg(blob, prop, paddr);
/* disable both the mac node and the node that has a handle to it */
fdt_setprop_string(blob, off, "status", "disabled");
/* Don't disable FM1-DTSEC1 MAC as its used for MDIO */
if (paddr != dtsec1_addr) {
/* disable the mac node */
fdt_setprop_string(blob, off, "status", "disabled");
}
/* disable the node point to the mac */
ph = fdt_get_phandle(blob, off);
do_fixup_by_prop(blob, "fsl,fman-mac", &ph, sizeof(ph),
"status", "disabled", strlen("disabled") + 1, 1);

5
drivers/net/fm/p1023.c
View File

@ -39,6 +39,11 @@ static int is_device_disabled(enum fm_port port)
void fman_disable_port(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* don't allow disabling of DTSEC1 as its needed for MDIO */
if (port == FM1_DTSEC1)
return;
setbits_be32(&gur->devdisr, port_to_devdisr[port]);
}

5
drivers/net/fm/p3060.c
View File

@ -45,6 +45,11 @@ static int is_device_disabled(enum fm_port port)
void fman_disable_port(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* don't allow disabling of DTSEC1 as its needed for MDIO */
if (port == FM1_DTSEC1)
return;
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}

5
drivers/net/fm/p4080.c
View File

@ -47,6 +47,11 @@ static int is_device_disabled(enum fm_port port)
void fman_disable_port(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* don't allow disabling of DTSEC1 as its needed for MDIO */
if (port == FM1_DTSEC1)
return;
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}

5
drivers/net/fm/p5020.c
View File

@ -43,6 +43,11 @@ static int is_device_disabled(enum fm_port port)
void fman_disable_port(enum fm_port port)
{
ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
/* don't allow disabling of DTSEC1 as its needed for MDIO */
if (port == FM1_DTSEC1)
return;
setbits_be32(&gur->devdisr2, port_to_devdisr[port]);
}

2
drivers/net/phy/teranetics.c
View File

@ -95,7 +95,7 @@ int tn2020_startup(struct phy_device *phydev)
struct phy_driver tn2020_driver = {
.name = "Teranetics TN2020",
.uid = 0x00a19410,
.uid = PHY_UID_TN2020,
.mask = 0xfffffff0,
.features = PHY_10G_FEATURES,
.mmds = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |

1
include/configs/P2041RDB.h
View File

@ -66,6 +66,7 @@
#define CONFIG_SYS_SRIO
#define CONFIG_SRIO1 /* SRIO port 1 */
#define CONFIG_SRIO2 /* SRIO port 2 */
#define CONFIG_SYS_DPAA_RMAN /* RMan */
#define CONFIG_FSL_LAW /* Use common FSL init code */

1
include/configs/P3041DS.h
View File

@ -35,6 +35,7 @@
#define CONFIG_FSL_SATA_V2
#define CONFIG_PCIE3
#define CONFIG_PCIE4
#define CONFIG_SYS_DPAA_RMAN
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */

1
include/configs/P5020DS.h
View File

@ -36,6 +36,7 @@
#define CONFIG_PCIE3
#define CONFIG_PCIE4
#define CONFIG_SYS_FSL_RAID_ENGINE
#define CONFIG_SYS_DPAA_RMAN
#define CONFIG_ICS307_REFCLK_HZ 25000000 /* ICS307 ref clk freq */

28
include/fdt_support.h
View File

@ -104,5 +104,33 @@ int fdt_verify_alias_address(void *fdt, int anode, const char *alias,
u64 addr);
u64 fdt_get_base_address(void *fdt, int node);
enum fdt_status {
FDT_STATUS_OKAY,
FDT_STATUS_DISABLED,
FDT_STATUS_FAIL,
FDT_STATUS_FAIL_ERROR_CODE,
};
int fdt_set_node_status(void *fdt, int nodeoffset,
enum fdt_status status, unsigned int error_code);
static inline int fdt_status_okay(void *fdt, int nodeoffset)
{
return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_OKAY, 0);
}
static inline int fdt_status_disabled(void *fdt, int nodeoffset)
{
return fdt_set_node_status(fdt, nodeoffset, FDT_STATUS_DISABLED, 0);
}
int fdt_set_status_by_alias(void *fdt, const char* alias,
enum fdt_status status, unsigned int error_code);
static inline int fdt_status_okay_by_alias(void *fdt, const char* alias)
{
return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_OKAY, 0);
}
static inline int fdt_status_disabled_by_alias(void *fdt, const char* alias)
{
return fdt_set_status_by_alias(fdt, alias, FDT_STATUS_DISABLED, 0);
}
#endif /* ifdef CONFIG_OF_LIBFDT */
#endif /* ifndef __FDT_SUPPORT_H */

4
include/phy.h
View File

@ -226,4 +226,8 @@ int phy_natsemi_init(void);
int phy_realtek_init(void);
int phy_teranetics_init(void);
int phy_vitesse_init(void);
/* PHY UIDs for various PHYs that are referenced in external code */
#define PHY_UID_TN2020 0x00a19410
#endif