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https://github.com/brain-hackers/u-boot-brain
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sunxi_nand_spl: Use kernel driver algorithm for determining ecc_mode / _off
Sync the code for figuring out the ecc_mode and ecc_offset with the linux kernel v4.1. Keeping this in sync seems like a good idea in general, and it fixes / adds support for ecc strengths of 56, 60 and 64 bits. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
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@ -181,60 +181,26 @@ static void nand_read_page(unsigned int real_addr, dma_addr_t dst,
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int syndrome, uint32_t *ecc_errors)
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{
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uint32_t val;
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int ecc_off = 0;
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int i, ecc_off = 0;
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uint16_t ecc_mode = 0;
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uint16_t rand_seed;
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uint32_t page;
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uint16_t column;
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uint32_t oob_offset;
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static const u8 strengths[] = { 16, 24, 28, 32, 40, 48, 56, 60, 64 };
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switch (CONFIG_NAND_SUNXI_SPL_ECC_STRENGTH) {
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case 16:
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ecc_mode = 0;
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ecc_off = 0x20;
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break;
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case 24:
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ecc_mode = 1;
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ecc_off = 0x2e;
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break;
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case 28:
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ecc_mode = 2;
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ecc_off = 0x32;
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break;
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case 32:
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ecc_mode = 3;
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ecc_off = 0x3c;
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break;
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case 40:
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ecc_mode = 4;
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ecc_off = 0x4a;
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break;
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case 48:
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ecc_mode = 4;
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ecc_off = 0x52;
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break;
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case 56:
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ecc_mode = 4;
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ecc_off = 0x60;
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break;
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case 60:
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ecc_mode = 4;
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ecc_off = 0x0;
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break;
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case 64:
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ecc_mode = 4;
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ecc_off = 0x0;
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break;
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default:
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ecc_mode = 0;
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ecc_off = 0;
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for (i = 0; i < ARRAY_SIZE(strengths); i++) {
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if (CONFIG_NAND_SUNXI_SPL_ECC_STRENGTH == strengths[i]) {
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ecc_mode = i;
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break;
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}
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}
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if (ecc_off == 0) {
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printf("Unsupported ECC strength (%d)!\n",
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CONFIG_NAND_SUNXI_SPL_ECC_STRENGTH);
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return;
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}
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/* HW ECC always request ECC bytes for 1024 bytes blocks */
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ecc_off = DIV_ROUND_UP(CONFIG_NAND_SUNXI_SPL_ECC_STRENGTH * fls(8 * 1024), 8);
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/* HW ECC always work with even numbers of ECC bytes */
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ecc_off += (ecc_off & 1);
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ecc_off += 4; /* prepad */
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page = real_addr / CONFIG_NAND_SUNXI_SPL_PAGE_SIZE;
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column = real_addr % CONFIG_NAND_SUNXI_SPL_PAGE_SIZE;
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