u-boot-brain/arch/x86/cpu/queensbay/Makefile

#
# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>
#
# SPDX-License-Identifier:	GPL-2.0+
#

obj-y += fsp_configs.o irq.o
obj-y += tnc.o topcliff.o
x86: Add basic support to queensbay platform and crownbay board Implement minimum required functions for the basic support to queensbay platform and crownbay board. Currently the implementation is to call fsp_init() in the car_init(). We may move that call to cpu_init_f() in the future. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2014-12-17 16:50:36 +09:00			`#`
			`# Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com>`
			`#`
			`# SPDX-License-Identifier: GPL-2.0+`
			`#`

dm: x86: queensbay: Add an interrupt driver Add a driver for interrupts on queensbay and move the code currently in cpu_irq_init() into its probe() method. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> 2016-01-20 13:32:31 +09:00			`obj-y += fsp_configs.o irq.o`
x86: Refactor PIRQ routing support PIRQ routing is pretty much common in Intel chipset. It has several PIRQ links (normally 8) and corresponding registers (either in PCI configuration space or memory-mapped IBASE) to configure the legacy 8259 IRQ vector mapping. Refactor current Queensbay PIRQ routing support using device tree and move it to a common place, so that we can easily add PIRQ routing support on a new platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 2015-05-25 23:35:04 +09:00			`obj-y += tnc.o topcliff.o`