u-boot-brain/arch/mips/mach-mtmips/mt7628/Makefile

# SPDX-License-Identifier: GPL-2.0

obj-y += lowlevel_init.o
obj-y += init.o
obj-y += ddr.o
obj-$(CONFIG_SPL_BUILD) += serial.o
mips: mtmips: rewrite lowlevel codes of mt7628 This patch rewrites the mtmips architecture with the following changes: 1. Move MT7628 soc parts into a subfolder. 2. Lock parts of D-Cache as temporary stack. 3. Reimplement DDR initialization in C language. 4. Reimplement DDR calibration in a clear logic. 5. Add full support for auto size detection for DDR1 and DDR2. 6. Use accurate CPU clock depending on the input xtal frequency for timer and delay functions. Note: print_cpuinfo() has incompatible parts with MT7620 so it's moved into mt7628 subfolder. Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> 2020-04-21 16:28:34 +09:00			`# SPDX-License-Identifier: GPL-2.0`

			`obj-y += lowlevel_init.o`
			`obj-y += init.o`
			`obj-y += ddr.o`
mips: mtmips: add SPL support This patch adds SPL support for mtmips platform. The lowlevel architecture is split into SPL and the rest parts are built into a memory loadable u-boot image. Optional SPL_DM and OF_CONTROL are also supported. The increment of size is very small (< 10 KiB) if SPL_DM and OF_CONTROL are not enabled and the memory bootable u-boot (u-boot.img) is generated automatically so there is not need to add a separate config for it. A lzma compressed payload (u-boot-lzma.img) is also generated and it will be combined with u-boot-spl.bin to form the unified ROM bootable binary u-boot-mtmips.bin. A spl loader is added to support uncompress the payload. Reviewed-by: Stefan Roese <sr@denx.de> Signed-off-by: Weijie Gao <weijie.gao@mediatek.com> 2020-04-21 16:28:47 +09:00			`obj-$(CONFIG_SPL_BUILD) += serial.o`