2002-11-03 09:38:21 +09:00
|
|
|
/*
|
|
|
|
* armboot - Startup Code for ARM720 CPU-core
|
|
|
|
*
|
2011-08-05 01:45:45 +09:00
|
|
|
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
|
|
|
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
2002-11-03 09:38:21 +09:00
|
|
|
*
|
|
|
|
* See file CREDITS for list of people who contributed to this
|
|
|
|
* project.
|
|
|
|
*
|
|
|
|
* This program is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU General Public License as
|
|
|
|
* published by the Free Software Foundation; either version 2 of
|
|
|
|
* the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This program is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
2004-07-12 07:27:55 +09:00
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
2002-11-03 09:38:21 +09:00
|
|
|
* GNU General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU General Public License
|
|
|
|
* along with this program; if not, write to the Free Software
|
|
|
|
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
|
|
|
* MA 02111-1307 USA
|
|
|
|
*/
|
|
|
|
|
2010-10-26 21:34:52 +09:00
|
|
|
#include <asm-offsets.h>
|
2002-11-03 09:38:21 +09:00
|
|
|
#include <config.h>
|
|
|
|
#include <version.h>
|
2004-07-02 01:30:44 +09:00
|
|
|
#include <asm/hardware.h>
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
/*
|
|
|
|
*************************************************************************
|
|
|
|
*
|
|
|
|
* Jump vector table as in table 3.1 in [1]
|
|
|
|
*
|
|
|
|
*************************************************************************
|
|
|
|
*/
|
|
|
|
|
|
|
|
|
|
|
|
.globl _start
|
2004-07-12 07:27:55 +09:00
|
|
|
_start: b reset
|
2002-11-03 09:38:21 +09:00
|
|
|
ldr pc, _undefined_instruction
|
|
|
|
ldr pc, _software_interrupt
|
|
|
|
ldr pc, _prefetch_abort
|
|
|
|
ldr pc, _data_abort
|
|
|
|
ldr pc, _not_used
|
|
|
|
ldr pc, _irq
|
|
|
|
ldr pc, _fiq
|
|
|
|
|
2012-08-31 17:30:07 +09:00
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
|
|
_undefined_instruction: .word _undefined_instruction
|
|
|
|
_software_interrupt: .word _software_interrupt
|
|
|
|
_prefetch_abort: .word _prefetch_abort
|
|
|
|
_data_abort: .word _data_abort
|
|
|
|
_not_used: .word _not_used
|
|
|
|
_irq: .word _irq
|
|
|
|
_fiq: .word _fiq
|
2012-08-31 17:30:09 +09:00
|
|
|
_pad: .word 0x12345678 /* now 16*4=64 */
|
2012-08-31 17:30:07 +09:00
|
|
|
#else
|
2004-07-12 07:27:55 +09:00
|
|
|
_undefined_instruction: .word undefined_instruction
|
2002-11-03 09:38:21 +09:00
|
|
|
_software_interrupt: .word software_interrupt
|
|
|
|
_prefetch_abort: .word prefetch_abort
|
|
|
|
_data_abort: .word data_abort
|
|
|
|
_not_used: .word not_used
|
|
|
|
_irq: .word irq
|
|
|
|
_fiq: .word fiq
|
2012-08-31 17:30:09 +09:00
|
|
|
_pad: .word 0x12345678 /* now 16*4=64 */
|
2012-08-31 17:30:07 +09:00
|
|
|
#endif /* CONFIG_SPL_BUILD */
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
.balignl 16,0xdeadbeef
|
|
|
|
|
|
|
|
|
|
|
|
/*
|
|
|
|
*************************************************************************
|
|
|
|
*
|
|
|
|
* Startup Code (reset vector)
|
|
|
|
*
|
2004-02-09 04:38:38 +09:00
|
|
|
* do important init only if we don't start from RAM!
|
2002-11-03 09:38:21 +09:00
|
|
|
* relocate armboot to ram
|
|
|
|
* setup stack
|
|
|
|
* jump to second stage
|
|
|
|
*
|
|
|
|
*************************************************************************
|
|
|
|
*/
|
|
|
|
|
2010-09-17 20:10:52 +09:00
|
|
|
.globl _TEXT_BASE
|
2002-11-03 09:38:21 +09:00
|
|
|
_TEXT_BASE:
|
2012-08-31 17:30:09 +09:00
|
|
|
#ifdef CONFIG_SPL_BUILD
|
|
|
|
.word CONFIG_SPL_TEXT_BASE
|
|
|
|
#else
|
2010-10-08 04:51:12 +09:00
|
|
|
.word CONFIG_SYS_TEXT_BASE
|
2012-08-31 17:30:09 +09:00
|
|
|
#endif
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
/*
|
2004-02-09 04:38:38 +09:00
|
|
|
* These are defined in the board-specific linker script.
|
2010-11-26 06:45:02 +09:00
|
|
|
* Subtracting _start from them lets the linker put their
|
|
|
|
* relative position in the executable instead of leaving
|
|
|
|
* them null.
|
2002-11-03 09:38:21 +09:00
|
|
|
*/
|
2010-11-26 06:45:02 +09:00
|
|
|
.globl _bss_start_ofs
|
|
|
|
_bss_start_ofs:
|
|
|
|
.word __bss_start - _start
|
2004-02-09 04:38:38 +09:00
|
|
|
|
2010-11-26 06:45:02 +09:00
|
|
|
.globl _bss_end_ofs
|
|
|
|
_bss_end_ofs:
|
2011-03-02 07:59:59 +09:00
|
|
|
.word __bss_end__ - _start
|
2002-11-03 09:38:21 +09:00
|
|
|
|
2011-03-02 08:02:04 +09:00
|
|
|
.globl _end_ofs
|
|
|
|
_end_ofs:
|
|
|
|
.word _end - _start
|
|
|
|
|
2002-11-03 09:38:21 +09:00
|
|
|
#ifdef CONFIG_USE_IRQ
|
|
|
|
/* IRQ stack memory (calculated at run-time) */
|
|
|
|
.globl IRQ_STACK_START
|
|
|
|
IRQ_STACK_START:
|
|
|
|
.word 0x0badc0de
|
|
|
|
|
|
|
|
/* IRQ stack memory (calculated at run-time) */
|
|
|
|
.globl FIQ_STACK_START
|
|
|
|
FIQ_STACK_START:
|
|
|
|
.word 0x0badc0de
|
|
|
|
#endif
|
|
|
|
|
2010-09-17 20:10:52 +09:00
|
|
|
/* IRQ stack memory (calculated at run-time) + 8 bytes */
|
|
|
|
.globl IRQ_STACK_START_IN
|
|
|
|
IRQ_STACK_START_IN:
|
|
|
|
.word 0x0badc0de
|
|
|
|
|
|
|
|
/*
|
|
|
|
* the actual reset code
|
|
|
|
*/
|
|
|
|
|
|
|
|
reset:
|
|
|
|
/*
|
|
|
|
* set the cpu to SVC32 mode
|
|
|
|
*/
|
|
|
|
mrs r0,cpsr
|
|
|
|
bic r0,r0,#0x1f
|
|
|
|
orr r0,r0,#0xd3
|
|
|
|
msr cpsr,r0
|
|
|
|
|
|
|
|
/*
|
|
|
|
* we do sys-critical inits only at reboot,
|
|
|
|
* not when booting from ram!
|
|
|
|
*/
|
|
|
|
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
|
|
|
|
bl cpu_init_crit
|
|
|
|
#endif
|
|
|
|
|
2013-01-08 19:18:02 +09:00
|
|
|
bl _main
|
2010-09-17 20:10:52 +09:00
|
|
|
|
|
|
|
/*------------------------------------------------------------------------------*/
|
|
|
|
|
|
|
|
/*
|
|
|
|
* void relocate_code (addr_sp, gd, addr_moni)
|
|
|
|
*
|
|
|
|
* This "function" does not return, instead it continues in RAM
|
|
|
|
* after relocating the monitor code.
|
|
|
|
*
|
|
|
|
*/
|
|
|
|
.globl relocate_code
|
|
|
|
relocate_code:
|
|
|
|
mov r4, r0 /* save addr_sp */
|
|
|
|
mov r5, r1 /* save addr of gd */
|
|
|
|
mov r6, r2 /* save addr of destination */
|
|
|
|
|
|
|
|
adr r0, _start
|
2010-12-01 08:58:34 +09:00
|
|
|
cmp r0, r6
|
2012-08-31 17:30:07 +09:00
|
|
|
moveq r9, #0 /* no relocation. relocation offset(r9) = 0 */
|
2013-01-08 19:18:02 +09:00
|
|
|
beq relocate_done /* skip relocation */
|
2010-12-01 08:58:33 +09:00
|
|
|
mov r1, r6 /* r1 <- scratch for copy_loop */
|
2010-11-26 06:45:02 +09:00
|
|
|
ldr r3, _bss_start_ofs
|
|
|
|
add r2, r0, r3 /* r2 <- source end address */
|
2010-09-17 20:10:52 +09:00
|
|
|
|
|
|
|
copy_loop:
|
|
|
|
ldmia r0!, {r9-r10} /* copy from source address [r0] */
|
2010-12-01 08:58:33 +09:00
|
|
|
stmia r1!, {r9-r10} /* copy to target address [r1] */
|
2010-10-05 23:06:39 +09:00
|
|
|
cmp r0, r2 /* until source end address [r2] */
|
|
|
|
blo copy_loop
|
2010-09-17 20:10:52 +09:00
|
|
|
|
2011-07-13 14:11:07 +09:00
|
|
|
#ifndef CONFIG_SPL_BUILD
|
2010-11-26 06:45:02 +09:00
|
|
|
/*
|
|
|
|
* fix .rel.dyn relocations
|
|
|
|
*/
|
|
|
|
ldr r0, _TEXT_BASE /* r0 <- Text base */
|
2010-12-01 08:58:33 +09:00
|
|
|
sub r9, r6, r0 /* r9 <- relocation offset */
|
2010-11-26 06:45:02 +09:00
|
|
|
ldr r10, _dynsym_start_ofs /* r10 <- sym table ofs */
|
|
|
|
add r10, r10, r0 /* r10 <- sym table in FLASH */
|
|
|
|
ldr r2, _rel_dyn_start_ofs /* r2 <- rel dyn start ofs */
|
|
|
|
add r2, r2, r0 /* r2 <- rel dyn start in FLASH */
|
|
|
|
ldr r3, _rel_dyn_end_ofs /* r3 <- rel dyn end ofs */
|
|
|
|
add r3, r3, r0 /* r3 <- rel dyn end in FLASH */
|
2010-09-17 20:10:52 +09:00
|
|
|
fixloop:
|
2010-11-26 06:45:02 +09:00
|
|
|
ldr r0, [r2] /* r0 <- location to fix up, IN FLASH! */
|
|
|
|
add r0, r0, r9 /* r0 <- location to fix up in RAM */
|
|
|
|
ldr r1, [r2, #4]
|
2010-12-01 08:58:35 +09:00
|
|
|
and r7, r1, #0xff
|
|
|
|
cmp r7, #23 /* relative fixup? */
|
2010-11-26 06:45:02 +09:00
|
|
|
beq fixrel
|
2010-12-01 08:58:35 +09:00
|
|
|
cmp r7, #2 /* absolute fixup? */
|
2010-11-26 06:45:02 +09:00
|
|
|
beq fixabs
|
|
|
|
/* ignore unknown type of fixup */
|
|
|
|
b fixnext
|
|
|
|
fixabs:
|
|
|
|
/* absolute fix: set location to (offset) symbol value */
|
|
|
|
mov r1, r1, LSR #4 /* r1 <- symbol index in .dynsym */
|
|
|
|
add r1, r10, r1 /* r1 <- address of symbol in table */
|
|
|
|
ldr r1, [r1, #4] /* r1 <- symbol value */
|
2010-12-09 19:26:24 +09:00
|
|
|
add r1, r1, r9 /* r1 <- relocated sym addr */
|
2010-11-26 06:45:02 +09:00
|
|
|
b fixnext
|
|
|
|
fixrel:
|
|
|
|
/* relative fix: increase location by offset */
|
|
|
|
ldr r1, [r0]
|
|
|
|
add r1, r1, r9
|
|
|
|
fixnext:
|
|
|
|
str r1, [r0]
|
|
|
|
add r2, r2, #8 /* each rel.dyn entry is 8 bytes */
|
2010-09-17 20:10:52 +09:00
|
|
|
cmp r2, r3
|
2010-10-24 06:22:38 +09:00
|
|
|
blo fixloop
|
2010-09-17 20:10:52 +09:00
|
|
|
#endif
|
|
|
|
|
2013-01-08 19:18:02 +09:00
|
|
|
relocate_done:
|
2010-09-17 20:10:52 +09:00
|
|
|
|
|
|
|
mov pc, lr
|
|
|
|
|
2010-11-26 06:45:02 +09:00
|
|
|
_rel_dyn_start_ofs:
|
|
|
|
.word __rel_dyn_start - _start
|
|
|
|
_rel_dyn_end_ofs:
|
|
|
|
.word __rel_dyn_end - _start
|
|
|
|
_dynsym_start_ofs:
|
|
|
|
.word __dynsym_start - _start
|
2010-09-17 20:10:52 +09:00
|
|
|
|
2013-01-08 19:18:02 +09:00
|
|
|
.globl c_runtime_cpu_setup
|
|
|
|
c_runtime_cpu_setup:
|
|
|
|
|
|
|
|
mov pc, lr
|
|
|
|
|
2002-11-03 09:38:21 +09:00
|
|
|
/*
|
|
|
|
*************************************************************************
|
|
|
|
*
|
|
|
|
* CPU_init_critical registers
|
|
|
|
*
|
|
|
|
* setup important registers
|
|
|
|
* setup memory timing
|
|
|
|
*
|
|
|
|
*************************************************************************
|
|
|
|
*/
|
|
|
|
|
|
|
|
cpu_init_crit:
|
|
|
|
|
2012-10-03 17:54:08 +09:00
|
|
|
#if !defined(CONFIG_TEGRA)
|
2005-10-07 00:08:18 +09:00
|
|
|
mov ip, lr
|
2002-11-03 09:38:21 +09:00
|
|
|
/*
|
|
|
|
* before relocating, we have to setup RAM timing
|
2004-02-09 04:38:38 +09:00
|
|
|
* because memory timing is board-dependent, you will
|
2005-04-03 08:52:25 +09:00
|
|
|
* find a lowlevel_init.S in your board directory.
|
2002-11-03 09:38:21 +09:00
|
|
|
*/
|
2005-04-03 08:52:25 +09:00
|
|
|
bl lowlevel_init
|
2002-11-03 09:38:21 +09:00
|
|
|
mov lr, ip
|
2007-01-24 20:16:56 +09:00
|
|
|
#endif
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
mov pc, lr
|
|
|
|
|
|
|
|
|
2012-08-31 17:30:07 +09:00
|
|
|
#ifndef CONFIG_SPL_BUILD
|
2002-11-03 09:38:21 +09:00
|
|
|
/*
|
|
|
|
*************************************************************************
|
|
|
|
*
|
|
|
|
* Interrupt handling
|
|
|
|
*
|
|
|
|
*************************************************************************
|
|
|
|
*/
|
|
|
|
|
|
|
|
@
|
|
|
|
@ IRQ stack frame.
|
|
|
|
@
|
|
|
|
#define S_FRAME_SIZE 72
|
|
|
|
|
|
|
|
#define S_OLD_R0 68
|
|
|
|
#define S_PSR 64
|
|
|
|
#define S_PC 60
|
|
|
|
#define S_LR 56
|
|
|
|
#define S_SP 52
|
|
|
|
|
|
|
|
#define S_IP 48
|
|
|
|
#define S_FP 44
|
|
|
|
#define S_R10 40
|
|
|
|
#define S_R9 36
|
|
|
|
#define S_R8 32
|
|
|
|
#define S_R7 28
|
|
|
|
#define S_R6 24
|
|
|
|
#define S_R5 20
|
|
|
|
#define S_R4 16
|
|
|
|
#define S_R3 12
|
|
|
|
#define S_R2 8
|
|
|
|
#define S_R1 4
|
|
|
|
#define S_R0 0
|
|
|
|
|
|
|
|
#define MODE_SVC 0x13
|
|
|
|
#define I_BIT 0x80
|
|
|
|
|
|
|
|
/*
|
|
|
|
* use bad_save_user_regs for abort/prefetch/undef/swi ...
|
|
|
|
* use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
|
|
|
|
*/
|
|
|
|
|
|
|
|
.macro bad_save_user_regs
|
|
|
|
sub sp, sp, #S_FRAME_SIZE
|
|
|
|
stmia sp, {r0 - r12} @ Calling r0-r12
|
2004-07-12 07:27:55 +09:00
|
|
|
add r8, sp, #S_PC
|
2002-11-03 09:38:21 +09:00
|
|
|
|
2010-09-17 20:10:52 +09:00
|
|
|
ldr r2, IRQ_STACK_START_IN
|
2004-07-12 07:27:55 +09:00
|
|
|
ldmia r2, {r2 - r4} @ get pc, cpsr, old_r0
|
2002-11-03 09:38:21 +09:00
|
|
|
add r0, sp, #S_FRAME_SIZE @ restore sp_SVC
|
|
|
|
|
|
|
|
add r5, sp, #S_SP
|
|
|
|
mov r1, lr
|
2004-07-12 07:27:55 +09:00
|
|
|
stmia r5, {r0 - r4} @ save sp_SVC, lr_SVC, pc, cpsr, old_r
|
2002-11-03 09:38:21 +09:00
|
|
|
mov r0, sp
|
|
|
|
.endm
|
|
|
|
|
|
|
|
.macro irq_save_user_regs
|
|
|
|
sub sp, sp, #S_FRAME_SIZE
|
|
|
|
stmia sp, {r0 - r12} @ Calling r0-r12
|
2004-07-12 07:27:55 +09:00
|
|
|
add r8, sp, #S_PC
|
|
|
|
stmdb r8, {sp, lr}^ @ Calling SP, LR
|
|
|
|
str lr, [r8, #0] @ Save calling PC
|
|
|
|
mrs r6, spsr
|
|
|
|
str r6, [r8, #4] @ Save CPSR
|
|
|
|
str r0, [r8, #8] @ Save OLD_R0
|
2002-11-03 09:38:21 +09:00
|
|
|
mov r0, sp
|
|
|
|
.endm
|
|
|
|
|
|
|
|
.macro irq_restore_user_regs
|
|
|
|
ldmia sp, {r0 - lr}^ @ Calling r0 - lr
|
|
|
|
mov r0, r0
|
|
|
|
ldr lr, [sp, #S_PC] @ Get PC
|
|
|
|
add sp, sp, #S_FRAME_SIZE
|
|
|
|
subs pc, lr, #4 @ return & move spsr_svc into cpsr
|
|
|
|
.endm
|
|
|
|
|
|
|
|
.macro get_bad_stack
|
2010-09-17 20:10:52 +09:00
|
|
|
ldr r13, IRQ_STACK_START_IN @ setup our mode stack
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
str lr, [r13] @ save caller lr / spsr
|
|
|
|
mrs lr, spsr
|
2004-07-12 07:27:55 +09:00
|
|
|
str lr, [r13, #4]
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
mov r13, #MODE_SVC @ prepare SVC-Mode
|
|
|
|
msr spsr_c, r13
|
|
|
|
mov lr, pc
|
|
|
|
movs pc, lr
|
|
|
|
.endm
|
|
|
|
|
|
|
|
.macro get_irq_stack @ setup IRQ stack
|
|
|
|
ldr sp, IRQ_STACK_START
|
|
|
|
.endm
|
|
|
|
|
|
|
|
.macro get_fiq_stack @ setup FIQ stack
|
|
|
|
ldr sp, FIQ_STACK_START
|
|
|
|
.endm
|
|
|
|
|
|
|
|
/*
|
|
|
|
* exception handlers
|
|
|
|
*/
|
2004-07-12 07:27:55 +09:00
|
|
|
.align 5
|
2002-11-03 09:38:21 +09:00
|
|
|
undefined_instruction:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_undefined_instruction
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
.align 5
|
|
|
|
software_interrupt:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_software_interrupt
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
.align 5
|
|
|
|
prefetch_abort:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_prefetch_abort
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
.align 5
|
|
|
|
data_abort:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_data_abort
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
.align 5
|
|
|
|
not_used:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_not_used
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
#ifdef CONFIG_USE_IRQ
|
|
|
|
|
|
|
|
.align 5
|
|
|
|
irq:
|
|
|
|
get_irq_stack
|
|
|
|
irq_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_irq
|
2002-11-03 09:38:21 +09:00
|
|
|
irq_restore_user_regs
|
|
|
|
|
|
|
|
.align 5
|
|
|
|
fiq:
|
|
|
|
get_fiq_stack
|
|
|
|
/* someone ought to write a more effiction fiq_save_user_regs */
|
|
|
|
irq_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_fiq
|
2002-11-03 09:38:21 +09:00
|
|
|
irq_restore_user_regs
|
|
|
|
|
|
|
|
#else
|
|
|
|
|
|
|
|
.align 5
|
|
|
|
irq:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_irq
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
.align 5
|
|
|
|
fiq:
|
|
|
|
get_bad_stack
|
|
|
|
bad_save_user_regs
|
2004-07-12 07:27:55 +09:00
|
|
|
bl do_fiq
|
2002-11-03 09:38:21 +09:00
|
|
|
|
|
|
|
#endif
|
2012-08-31 17:30:07 +09:00
|
|
|
#endif /* CONFIG_SPL_BUILD */
|