596 lines
16 KiB
C
596 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/* Copyright (c) 2017 NXP. */
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/power_supply.h>
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#define PHY_CTRL0 0x0
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#define PHY_CTRL0_REF_CLKDIV2 BIT(1)
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#define PHY_CTRL0_REF_SSP_EN BIT(2)
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#define PHY_CTRL0_FSEL_MASK GENMASK(10, 5)
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#define PHY_CTRL0_FSEL_24M 0x2a
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#define PHY_CTRL0_FSEL_100M 0x27
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#define PHY_CTRL0_SSC_RANGE_MASK GENMASK(23, 21)
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#define PHY_CTRL0_SSC_RANGE_4003PPM (0x2 << 21)
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#define PHY_CTRL1 0x4
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#define PHY_CTRL1_RESET BIT(0)
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#define PHY_CTRL1_COMMONONN BIT(1)
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#define PHY_CTRL1_ATERESET BIT(3)
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#define PHY_CTRL1_DCDENB BIT(17)
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#define PHY_CTRL1_CHRGSEL BIT(18)
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#define PHY_CTRL1_VDATSRCENB0 BIT(19)
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#define PHY_CTRL1_VDATDETENB0 BIT(20)
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#define PHY_CTRL2 0x8
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#define PHY_CTRL2_TXENABLEN0 BIT(8)
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#define PHY_CTRL2_OTG_DISABLE BIT(9)
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#define PHY_CTRL3 0xc
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#define PHY_CTRL3_COMPDISTUNE_MASK GENMASK(2, 0)
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#define PHY_CTRL3_TXPREEMP_TUNE_MASK GENMASK(16, 15)
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#define PHY_CTRL3_TXPREEMP_TUNE_SHIFT 15
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#define PHY_CTRL3_TXRISE_TUNE_MASK GENMASK(21, 20)
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#define PHY_CTRL3_TXRISE_TUNE_SHIFT 20
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/* 1111: +24% ... 0000: -6% step: 2% */
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#define PHY_CTRL3_TXVREF_TUNE_MASK GENMASK(25, 22)
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#define PHY_CTRL3_TXVREF_TUNE_SHIFT 22
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#define PHY_CTRL4 0x10
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#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK GENMASK(20, 15)
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#define PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_SHIFT 15
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#define PHY_CTRL5 0x14
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#define PHY_CTRL5_DMPWD_OVERRIDE_SEL BIT(23)
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#define PHY_CTRL5_DMPWD_OVERRIDE BIT(22)
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#define PHY_CTRL5_DPPWD_OVERRIDE_SEL BIT(21)
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#define PHY_CTRL5_DPPWD_OVERRIDE BIT(20)
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#define PHY_CTRL5_PCS_TX_SWING_FULL_MASK GENMASK(6, 0)
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#define PHY_CTRL6 0x18
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#define PHY_CTRL6_RXTERM_OVERRIDE_SEL BIT(29)
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#define PHY_CTRL6_ALT_CLK_EN BIT(1)
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#define PHY_CTRL6_ALT_CLK_SEL BIT(0)
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#define PHY_STS0 0x40
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#define PHY_STS0_OTGSESSVLD BIT(7)
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#define PHY_STS0_CHGDET BIT(4)
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#define PHY_STS0_FSVPLUS BIT(3)
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#define PHY_STS0_FSVMINUS BIT(2)
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#define PHY_TUNE_DEFAULT 0xffffffff
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struct imx8mq_usb_phy {
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struct phy *phy;
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struct clk *clk;
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void __iomem *base;
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struct regulator *vbus;
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struct notifier_block chg_det_nb;
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struct power_supply *vbus_power_supply;
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enum power_supply_usb_type chg_type;
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u32 pcs_tx_swing_full;
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u32 pcs_tx_deemph_3p5db;
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u32 tx_vref_tune;
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u32 tx_rise_tune;
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u32 tx_preemp_amp_tune;
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u32 comp_dis_tune;
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};
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static int imx8mq_usb_phy_init(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 |
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PHY_CTRL1_COMMONONN);
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value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
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writel(value, imx_phy->base + PHY_CTRL1);
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value = readl(imx_phy->base + PHY_CTRL0);
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value |= PHY_CTRL0_REF_SSP_EN;
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value &= ~PHY_CTRL0_SSC_RANGE_MASK;
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value |= PHY_CTRL0_SSC_RANGE_4003PPM;
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writel(value, imx_phy->base + PHY_CTRL0);
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value = readl(imx_phy->base + PHY_CTRL2);
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value |= PHY_CTRL2_TXENABLEN0;
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writel(value, imx_phy->base + PHY_CTRL2);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
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writel(value, imx_phy->base + PHY_CTRL1);
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return 0;
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}
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static int imx8mp_usb_phy_init(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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/* USB3.0 PHY signal fsel for 24M ref */
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value = readl(imx_phy->base + PHY_CTRL0);
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value &= ~PHY_CTRL0_FSEL_MASK;
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value |= (PHY_CTRL0_FSEL_24M << 5);
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writel(value, imx_phy->base + PHY_CTRL0);
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/* Disable alt_clk_en and use internal MPLL clocks */
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value = readl(imx_phy->base + PHY_CTRL6);
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value &= ~(PHY_CTRL6_ALT_CLK_SEL | PHY_CTRL6_ALT_CLK_EN);
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writel(value, imx_phy->base + PHY_CTRL6);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0);
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value |= PHY_CTRL1_RESET | PHY_CTRL1_ATERESET;
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writel(value, imx_phy->base + PHY_CTRL1);
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value = readl(imx_phy->base + PHY_CTRL0);
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value |= PHY_CTRL0_REF_SSP_EN;
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writel(value, imx_phy->base + PHY_CTRL0);
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/* Disable OTG block */
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value = readl(imx_phy->base + PHY_CTRL2);
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value |= PHY_CTRL2_TXENABLEN0 | PHY_CTRL2_OTG_DISABLE;
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writel(value, imx_phy->base + PHY_CTRL2);
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udelay(10);
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value = readl(imx_phy->base + PHY_CTRL1);
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value &= ~(PHY_CTRL1_RESET | PHY_CTRL1_ATERESET);
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writel(value, imx_phy->base + PHY_CTRL1);
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/* PHY tuning */
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if (imx_phy->pcs_tx_deemph_3p5db != PHY_TUNE_DEFAULT) {
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value = readl(imx_phy->base + PHY_CTRL4);
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value &= ~PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_MASK;
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value |= imx_phy->pcs_tx_deemph_3p5db <<
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PHY_CTRL4_PCS_TX_DEEMPH_3P5DB_SHIFT;
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writel(value, imx_phy->base + PHY_CTRL4);
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}
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if (imx_phy->pcs_tx_swing_full != PHY_TUNE_DEFAULT) {
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value = readl(imx_phy->base + PHY_CTRL5);
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value &= ~PHY_CTRL5_PCS_TX_SWING_FULL_MASK;
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value |= imx_phy->pcs_tx_swing_full;
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writel(value, imx_phy->base + PHY_CTRL5);
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}
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if ((imx_phy->tx_vref_tune & imx_phy->tx_rise_tune &
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imx_phy->tx_preemp_amp_tune & imx_phy->comp_dis_tune) ==
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PHY_TUNE_DEFAULT)
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/* If all are the default values, no need update. */
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return 0;
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value = readl(imx_phy->base + PHY_CTRL3);
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if (imx_phy->tx_vref_tune == PHY_TUNE_DEFAULT)
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imx_phy->tx_vref_tune = (value & PHY_CTRL3_TXVREF_TUNE_MASK) >>
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PHY_CTRL3_TXVREF_TUNE_SHIFT;
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if (imx_phy->tx_rise_tune == PHY_TUNE_DEFAULT)
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imx_phy->tx_rise_tune = (value & PHY_CTRL3_TXRISE_TUNE_MASK) >>
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PHY_CTRL3_TXRISE_TUNE_SHIFT;
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if (imx_phy->tx_preemp_amp_tune == PHY_TUNE_DEFAULT)
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imx_phy->tx_preemp_amp_tune = (value &
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PHY_CTRL3_TXPREEMP_TUNE_MASK) >>
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PHY_CTRL3_TXPREEMP_TUNE_SHIFT;
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if (imx_phy->comp_dis_tune == PHY_TUNE_DEFAULT)
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imx_phy->comp_dis_tune = value & PHY_CTRL3_COMPDISTUNE_MASK;
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value &= ~(PHY_CTRL3_TXVREF_TUNE_MASK |
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PHY_CTRL3_TXRISE_TUNE_MASK |
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PHY_CTRL3_TXPREEMP_TUNE_MASK |
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PHY_CTRL3_COMPDISTUNE_MASK);
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value |= imx_phy->tx_vref_tune << PHY_CTRL3_TXVREF_TUNE_SHIFT |
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imx_phy->tx_rise_tune << PHY_CTRL3_TXRISE_TUNE_SHIFT |
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imx_phy->tx_preemp_amp_tune <<
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PHY_CTRL3_TXPREEMP_TUNE_SHIFT |
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imx_phy->comp_dis_tune;
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writel(value, imx_phy->base + PHY_CTRL3);
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return 0;
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}
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static int imx8m_usb_phy_init(struct phy *phy)
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{
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if (of_device_is_compatible(phy->dev.parent->of_node,
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"fsl,imx8mp-usb-phy"))
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return imx8mp_usb_phy_init(phy);
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else
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return imx8mq_usb_phy_init(phy);
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}
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static int imx8mq_phy_power_on(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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int ret;
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ret = regulator_enable(imx_phy->vbus);
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if (ret)
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return ret;
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ret = clk_prepare_enable(imx_phy->clk);
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if (ret)
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return ret;
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/* Disable rx term override */
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value = readl(imx_phy->base + PHY_CTRL6);
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value &= ~PHY_CTRL6_RXTERM_OVERRIDE_SEL;
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writel(value, imx_phy->base + PHY_CTRL6);
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return 0;
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}
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static int imx8mq_phy_power_off(struct phy *phy)
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{
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struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
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u32 value;
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/* Override rx term to be 0 */
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value = readl(imx_phy->base + PHY_CTRL6);
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value |= PHY_CTRL6_RXTERM_OVERRIDE_SEL;
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writel(value, imx_phy->base + PHY_CTRL6);
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clk_disable_unprepare(imx_phy->clk);
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regulator_disable(imx_phy->vbus);
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return 0;
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}
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static int imx8mq_chg_data_contact_det(struct imx8mq_usb_phy *imx_phy)
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{
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int i, data_pin_contact_count = 0;
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u32 val;
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/* Set DMPULLDOWN<#> = 1'b1 (to enable RDM_DWN) */
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val = readl(imx_phy->base + PHY_CTRL5);
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val |= PHY_CTRL5_DMPWD_OVERRIDE_SEL | PHY_CTRL5_DMPWD_OVERRIDE;
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writel(val, imx_phy->base + PHY_CTRL5);
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/* Set DPPULLDOWN<#> = 1'b0 */
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val = readl(imx_phy->base + PHY_CTRL5);
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val |= PHY_CTRL5_DMPWD_OVERRIDE_SEL | PHY_CTRL5_DMPWD_OVERRIDE;
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writel(val, imx_phy->base + PHY_CTRL5);
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/* Enable Data Contact Detect (DCD) per the USB BC 1.2 */
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val = readl(imx_phy->base + PHY_CTRL1);
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writel(val | PHY_CTRL1_DCDENB, imx_phy->base + PHY_CTRL1);
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for (i = 0; i < 100; i = i + 1) {
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val = readl(imx_phy->base + PHY_STS0);
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/* DP is low */
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if (!(val & PHY_STS0_FSVPLUS)) {
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if (data_pin_contact_count++ > 5)
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/* Data pin makes contact */
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break;
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usleep_range(5000, 10000);
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} else {
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data_pin_contact_count = 0;
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usleep_range(5000, 6000);
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}
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}
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/* Disable DCD after finished data contact check */
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val = readl(imx_phy->base + PHY_CTRL1);
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val &= ~PHY_CTRL1_DCDENB;
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writel(val, imx_phy->base + PHY_CTRL1);
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if (i == 100) {
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dev_err(&imx_phy->phy->dev,
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"VBUS is coming from a dedicated power supply.\n");
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/* disable override before finish */
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val = readl(imx_phy->base + PHY_CTRL5);
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val &= ~(PHY_CTRL5_DMPWD_OVERRIDE | PHY_CTRL5_DPPWD_OVERRIDE);
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writel(val, imx_phy->base + PHY_CTRL5);
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return -ENXIO;
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}
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/* Set DMPULLDOWN<#> to 1'b0 when DCD is completed */
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val = readl(imx_phy->base + PHY_CTRL5);
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val &= ~PHY_CTRL5_DMPWD_OVERRIDE_SEL;
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val |= PHY_CTRL5_DMPWD_OVERRIDE;
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writel(val, imx_phy->base + PHY_CTRL5);
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return 0;
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}
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static int imx8mq_chg_primary_detect(struct imx8mq_usb_phy *imx_phy)
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{
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u32 val;
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/* VDP_SRC is connected to D+ and IDM_SINK is connected to D- */
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val = readl(imx_phy->base + PHY_CTRL1);
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val &= ~PHY_CTRL1_CHRGSEL;
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val |= PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0;
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writel(val, imx_phy->base + PHY_CTRL1);
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usleep_range(1000, 2000);
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/* Check if D- is less than VDAT_REF to determine an SDP per BC 1.2 */
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val = readl(imx_phy->base + PHY_STS0);
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if (!(val & PHY_STS0_CHGDET)) {
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dev_dbg(&imx_phy->phy->dev, "It is a SDP.\n");
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imx_phy->chg_type = POWER_SUPPLY_USB_TYPE_SDP;
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}
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return 0;
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}
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static int imx8mq_phy_chg_secondary_det(struct imx8mq_usb_phy *imx_phy)
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{
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u32 val;
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/* VDM_SRC is connected to D- and IDP_SINK is connected to D+ */
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val = readl(imx_phy->base + PHY_CTRL1);
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writel(val | PHY_CTRL1_VDATSRCENB0 | PHY_CTRL1_VDATDETENB0 |
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PHY_CTRL1_CHRGSEL, imx_phy->base + PHY_CTRL1);
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usleep_range(1000, 2000);
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/*
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* Per BC 1.2, check voltage of D+:
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* DCP: if greater than VDAT_REF;
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* CDP: if less than VDAT0_REF.
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*/
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val = readl(imx_phy->base + PHY_STS0);
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if (val & PHY_STS0_CHGDET) {
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dev_dbg(&imx_phy->phy->dev, "It is a DCP.\n");
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imx_phy->chg_type = POWER_SUPPLY_USB_TYPE_DCP;
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} else {
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dev_dbg(&imx_phy->phy->dev, "It is a CDP.\n");
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imx_phy->chg_type = POWER_SUPPLY_USB_TYPE_CDP;
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}
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return 0;
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}
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static void imx8mq_phy_disable_chg_det(struct imx8mq_usb_phy *imx_phy)
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{
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u32 val;
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val = readl(imx_phy->base + PHY_CTRL5);
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val &= ~(PHY_CTRL5_DMPWD_OVERRIDE | PHY_CTRL5_DPPWD_OVERRIDE);
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writel(val, imx_phy->base + PHY_CTRL5);
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val = readl(imx_phy->base + PHY_CTRL1);
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val &= ~(PHY_CTRL1_DCDENB | PHY_CTRL1_VDATSRCENB0 |
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PHY_CTRL1_VDATDETENB0 | PHY_CTRL1_CHRGSEL);
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writel(val, imx_phy->base + PHY_CTRL1);
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}
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static int imx8mq_phy_charger_detect(struct imx8mq_usb_phy *imx_phy)
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{
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struct device *dev = &imx_phy->phy->dev;
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struct device_node *np = dev->parent->of_node;
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union power_supply_propval propval;
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u32 value;
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int ret = 0;
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if (!np)
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return 0;
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imx_phy->vbus_power_supply = power_supply_get_by_phandle(np,
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"vbus-power-supply");
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if (IS_ERR_OR_NULL(imx_phy->vbus_power_supply))
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return 0;
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if (imx_phy->chg_type != POWER_SUPPLY_USB_TYPE_UNKNOWN)
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goto put_psy;
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ret = power_supply_get_property(imx_phy->vbus_power_supply,
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POWER_SUPPLY_PROP_ONLINE,
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&propval);
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if (ret || propval.intval == 0) {
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dev_err(dev, "failed to get psy online infor\n");
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ret = -EINVAL;
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goto put_psy;
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}
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/* Check if vbus is valid */
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value = readl(imx_phy->base + PHY_STS0);
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if (!(value & PHY_STS0_OTGSESSVLD)) {
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dev_err(&imx_phy->phy->dev, "vbus is error\n");
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ret = -EINVAL;
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goto put_psy;
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}
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imx_phy->chg_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
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ret = imx8mq_chg_data_contact_det(imx_phy);
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if (ret)
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goto put_psy;
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ret = imx8mq_chg_primary_detect(imx_phy);
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if (!ret && imx_phy->chg_type != POWER_SUPPLY_USB_TYPE_SDP)
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ret = imx8mq_phy_chg_secondary_det(imx_phy);
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imx8mq_phy_disable_chg_det(imx_phy);
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if (!ret) {
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propval.intval = imx_phy->chg_type;
|
|
power_supply_set_property(imx_phy->vbus_power_supply,
|
|
POWER_SUPPLY_PROP_USB_TYPE,
|
|
&propval);
|
|
}
|
|
|
|
put_psy:
|
|
power_supply_put(imx_phy->vbus_power_supply);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int imx8mq_phy_usb_vbus_notify(struct notifier_block *nb,
|
|
unsigned long val, void *v)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = container_of(nb, struct imx8mq_usb_phy,
|
|
chg_det_nb);
|
|
struct device *dev = &imx_phy->phy->dev;
|
|
struct device_node *np = dev->parent->of_node;
|
|
union power_supply_propval propval;
|
|
struct power_supply *psy = v;
|
|
int ret;
|
|
|
|
if (!np)
|
|
return NOTIFY_DONE;
|
|
|
|
imx_phy->vbus_power_supply = power_supply_get_by_phandle(np,
|
|
"vbus-power-supply");
|
|
if (IS_ERR_OR_NULL(imx_phy->vbus_power_supply)) {
|
|
dev_err(dev, "failed to get power supply\n");
|
|
return NOTIFY_DONE;
|
|
}
|
|
|
|
if (val == PSY_EVENT_PROP_CHANGED && psy == imx_phy->vbus_power_supply) {
|
|
ret = power_supply_get_property(imx_phy->vbus_power_supply,
|
|
POWER_SUPPLY_PROP_ONLINE,
|
|
&propval);
|
|
if (ret) {
|
|
power_supply_put(imx_phy->vbus_power_supply);
|
|
dev_err(dev, "failed to get psy online info\n");
|
|
return NOTIFY_DONE;
|
|
}
|
|
|
|
if (propval.intval == 0)
|
|
imx_phy->chg_type = POWER_SUPPLY_USB_TYPE_UNKNOWN;
|
|
}
|
|
power_supply_put(imx_phy->vbus_power_supply);
|
|
|
|
return NOTIFY_OK;
|
|
}
|
|
|
|
static int imx8mq_phy_set_mode(struct phy *phy, enum phy_mode mode,
|
|
int submode)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = phy_get_drvdata(phy);
|
|
|
|
if (mode == PHY_MODE_USB_DEVICE)
|
|
return imx8mq_phy_charger_detect(imx_phy);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct phy_ops imx8mq_usb_phy_ops = {
|
|
.init = imx8m_usb_phy_init,
|
|
.power_on = imx8mq_phy_power_on,
|
|
.power_off = imx8mq_phy_power_off,
|
|
.set_mode = imx8mq_phy_set_mode,
|
|
.owner = THIS_MODULE,
|
|
};
|
|
|
|
static void imx8mp_get_phy_tuning_data(struct imx8mq_usb_phy *imx_phy)
|
|
{
|
|
struct device *dev = imx_phy->phy->dev.parent;
|
|
|
|
if (device_property_read_u32(dev, "fsl,phy-tx-vref-tune",
|
|
&imx_phy->tx_vref_tune))
|
|
imx_phy->tx_vref_tune = PHY_TUNE_DEFAULT;
|
|
|
|
if (device_property_read_u32(dev, "fsl,phy-tx-rise-tune",
|
|
&imx_phy->tx_rise_tune))
|
|
imx_phy->tx_rise_tune = PHY_TUNE_DEFAULT;
|
|
|
|
if (device_property_read_u32(dev, "fsl,phy-tx-preemp-amp-tune",
|
|
&imx_phy->tx_preemp_amp_tune))
|
|
imx_phy->tx_preemp_amp_tune = PHY_TUNE_DEFAULT;
|
|
|
|
if (device_property_read_u32(dev, "fsl,phy-comp-dis-tune",
|
|
&imx_phy->comp_dis_tune))
|
|
imx_phy->comp_dis_tune = PHY_TUNE_DEFAULT;
|
|
|
|
if (device_property_read_u32(dev, "fsl,pcs-tx-deemph-3p5db",
|
|
&imx_phy->pcs_tx_deemph_3p5db))
|
|
imx_phy->pcs_tx_deemph_3p5db = PHY_TUNE_DEFAULT;
|
|
|
|
if (device_property_read_u32(dev, "fsl,phy-pcs-tx-swing-full",
|
|
&imx_phy->pcs_tx_swing_full))
|
|
imx_phy->pcs_tx_swing_full = PHY_TUNE_DEFAULT;
|
|
}
|
|
|
|
static int imx8mq_usb_phy_probe(struct platform_device *pdev)
|
|
{
|
|
struct phy_provider *phy_provider;
|
|
struct device *dev = &pdev->dev;
|
|
struct imx8mq_usb_phy *imx_phy;
|
|
struct resource *res;
|
|
|
|
imx_phy = devm_kzalloc(dev, sizeof(*imx_phy), GFP_KERNEL);
|
|
if (!imx_phy)
|
|
return -ENOMEM;
|
|
|
|
imx_phy->clk = devm_clk_get(dev, "phy");
|
|
if (IS_ERR(imx_phy->clk)) {
|
|
dev_err(dev, "failed to get imx8mq usb phy clock\n");
|
|
return PTR_ERR(imx_phy->clk);
|
|
}
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
imx_phy->base = devm_ioremap_resource(dev, res);
|
|
if (IS_ERR(imx_phy->base))
|
|
return PTR_ERR(imx_phy->base);
|
|
|
|
imx_phy->phy = devm_phy_create(dev, NULL, &imx8mq_usb_phy_ops);
|
|
if (IS_ERR(imx_phy->phy))
|
|
return PTR_ERR(imx_phy->phy);
|
|
|
|
imx_phy->vbus = devm_regulator_get(dev, "vbus");
|
|
if (IS_ERR(imx_phy->vbus))
|
|
return PTR_ERR(imx_phy->vbus);
|
|
|
|
phy_set_drvdata(imx_phy->phy, imx_phy);
|
|
platform_set_drvdata(pdev, imx_phy);
|
|
|
|
if (device_property_present(dev, "vbus-power-supply")) {
|
|
imx_phy->chg_det_nb.notifier_call = imx8mq_phy_usb_vbus_notify;
|
|
power_supply_reg_notifier(&imx_phy->chg_det_nb);
|
|
}
|
|
|
|
imx8mp_get_phy_tuning_data(imx_phy);
|
|
|
|
phy_provider = devm_of_phy_provider_register(dev, of_phy_simple_xlate);
|
|
|
|
return PTR_ERR_OR_ZERO(phy_provider);
|
|
}
|
|
|
|
static int imx8mq_usb_phy_remove(struct platform_device *pdev)
|
|
{
|
|
struct imx8mq_usb_phy *imx_phy = platform_get_drvdata(pdev);
|
|
|
|
if (device_property_present(&pdev->dev, "vbus-power-supply"))
|
|
power_supply_unreg_notifier(&imx_phy->chg_det_nb);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct of_device_id imx8mq_usb_phy_of_match[] = {
|
|
{.compatible = "fsl,imx8mq-usb-phy",},
|
|
{.compatible = "fsl,imx8mp-usb-phy",},
|
|
{ },
|
|
};
|
|
MODULE_DEVICE_TABLE(of, imx8mq_usb_phy_of_match);
|
|
|
|
static struct platform_driver imx8mq_usb_phy_driver = {
|
|
.probe = imx8mq_usb_phy_probe,
|
|
.remove = imx8mq_usb_phy_remove,
|
|
.driver = {
|
|
.name = "imx8mq-usb-phy",
|
|
.of_match_table = imx8mq_usb_phy_of_match,
|
|
}
|
|
};
|
|
module_platform_driver(imx8mq_usb_phy_driver);
|
|
|
|
MODULE_DESCRIPTION("FSL IMX8MQ USB PHY driver");
|
|
MODULE_LICENSE("GPL");
|