b04976dacc
Refine commit 17db82300f80 ("MLK-25089 phy: freescale: pcie: fix the
imx8mp evk ep rc link speed issue")
Fine tune the PHY parameters, let the PCIe link up to GEN3 between two
i.MX865 EVK boards in the i.MX EP RC validation system.
Since this fine tuned is only specified for EVK boards. Add the command
parameter to specify it when do the EP RC tests between two i.MX8MP EVK
boards. Use the "pcie_phy_tuned=yes" to enable the PHY fine-tune.
Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com>
Reviewed-by: Peter Chen <peter.chen@nxp.com>
(cherry picked from commit 2ab5581a1448bf24a37f8082ffe725a54ce09b5e)
(cherry picked from commit fd8e0e420879277ac6c38fc3ce550dfc659ec0a4)
Signed-off-by: Andrey Zhizhikin <andrey.zhizhikin@leica-geosystems.com>
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| .. | ||
| Kconfig | ||
| Makefile | ||
| phy-fsl-imx8-mipi-dphy.c | ||
| phy-fsl-imx8-pcie.c | ||
| phy-fsl-imx8mp-lvds.c | ||
| phy-fsl-imx8mq-usb.c | ||
| phy-fsl-samsung-hdmi.c | ||