Merge pull request #39 from gibsson/4.9-2.0.x-imx
Merge v4.9.130 into 4.9-2.0.x-imx
This commit is contained in:
commit
f9d241b127
2
Makefile
2
Makefile
|
@ -1,6 +1,6 @@
|
|||
VERSION = 4
|
||||
PATCHLEVEL = 9
|
||||
SUBLEVEL = 126
|
||||
SUBLEVEL = 130
|
||||
EXTRAVERSION =
|
||||
NAME = Roaring Lionus
|
||||
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
|
|
|
@ -1,5 +1,4 @@
|
|||
CONFIG_DEFAULT_HOSTNAME="ARCLinux"
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_POSIX_MQUEUE=y
|
||||
# CONFIG_CROSS_MEMORY_ATTACH is not set
|
||||
|
|
|
@ -188,6 +188,8 @@
|
|||
regulator-max-microvolt = <2950000>;
|
||||
|
||||
regulator-boot-on;
|
||||
regulator-system-load = <200000>;
|
||||
regulator-allow-set-load;
|
||||
};
|
||||
|
||||
l21 {
|
||||
|
|
|
@ -271,7 +271,6 @@ CONFIG_USB_STORAGE=y
|
|||
CONFIG_USB_CHIPIDEA=y
|
||||
CONFIG_USB_CHIPIDEA_UDC=y
|
||||
CONFIG_USB_CHIPIDEA_HOST=y
|
||||
CONFIG_USB_CHIPIDEA_ULPI=y
|
||||
CONFIG_USB_SERIAL=m
|
||||
CONFIG_USB_SERIAL_GENERIC=y
|
||||
CONFIG_USB_SERIAL_FTDI_SIO=m
|
||||
|
@ -308,7 +307,6 @@ CONFIG_USB_GADGETFS=m
|
|||
CONFIG_USB_FUNCTIONFS=m
|
||||
CONFIG_USB_MASS_STORAGE=m
|
||||
CONFIG_USB_G_SERIAL=m
|
||||
CONFIG_USB_ULPI_BUS=y
|
||||
CONFIG_MMC=y
|
||||
CONFIG_MMC_SDHCI=y
|
||||
CONFIG_MMC_SDHCI_PLTFM=y
|
||||
|
|
|
@ -252,6 +252,7 @@ static int __init exynos_pmu_irq_init(struct device_node *node,
|
|||
NULL);
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||||
if (!domain) {
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||||
iounmap(pmu_base_addr);
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||||
pmu_base_addr = NULL;
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||||
return -ENOMEM;
|
||||
}
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||||
|
||||
|
|
|
@ -148,13 +148,20 @@ static int hi3xxx_hotplug_init(void)
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|||
struct device_node *node;
|
||||
|
||||
node = of_find_compatible_node(NULL, NULL, "hisilicon,sysctrl");
|
||||
if (node) {
|
||||
ctrl_base = of_iomap(node, 0);
|
||||
id = HI3620_CTRL;
|
||||
return 0;
|
||||
if (!node) {
|
||||
id = ERROR_CTRL;
|
||||
return -ENOENT;
|
||||
}
|
||||
id = ERROR_CTRL;
|
||||
return -ENOENT;
|
||||
|
||||
ctrl_base = of_iomap(node, 0);
|
||||
of_node_put(node);
|
||||
if (!ctrl_base) {
|
||||
id = ERROR_CTRL;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
id = HI3620_CTRL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
void hi3xxx_set_cpu(int cpu, bool enable)
|
||||
|
@ -173,11 +180,15 @@ static bool hix5hd2_hotplug_init(void)
|
|||
struct device_node *np;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "hisilicon,cpuctrl");
|
||||
if (np) {
|
||||
ctrl_base = of_iomap(np, 0);
|
||||
return true;
|
||||
}
|
||||
return false;
|
||||
if (!np)
|
||||
return false;
|
||||
|
||||
ctrl_base = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
if (!ctrl_base)
|
||||
return false;
|
||||
|
||||
return true;
|
||||
}
|
||||
|
||||
void hix5hd2_set_cpu(int cpu, bool enable)
|
||||
|
@ -219,10 +230,10 @@ void hip01_set_cpu(int cpu, bool enable)
|
|||
|
||||
if (!ctrl_base) {
|
||||
np = of_find_compatible_node(NULL, NULL, "hisilicon,hip01-sysctrl");
|
||||
if (np)
|
||||
ctrl_base = of_iomap(np, 0);
|
||||
else
|
||||
BUG();
|
||||
BUG_ON(!np);
|
||||
ctrl_base = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
BUG_ON(!ctrl_base);
|
||||
}
|
||||
|
||||
if (enable) {
|
||||
|
|
|
@ -16,6 +16,7 @@ config ARCH_ROCKCHIP
|
|||
select ROCKCHIP_TIMER
|
||||
select ARM_GLOBAL_TIMER
|
||||
select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
|
||||
select PM
|
||||
help
|
||||
Support for Rockchip's Cortex-A9 Single-to-Quad-Core-SoCs
|
||||
containing the RK2928, RK30xx and RK31xx series.
|
||||
|
|
|
@ -125,6 +125,7 @@ config ARCH_ROCKCHIP
|
|||
select GPIOLIB
|
||||
select PINCTRL
|
||||
select PINCTRL_ROCKCHIP
|
||||
select PM
|
||||
select ROCKCHIP_TIMER
|
||||
help
|
||||
This enables support for the ARMv8 based Rockchip chipsets,
|
||||
|
|
|
@ -170,7 +170,7 @@
|
|||
led@6 {
|
||||
label = "apq8016-sbc:blue:bt";
|
||||
gpios = <&pm8916_mpps 3 GPIO_ACTIVE_HIGH>;
|
||||
linux,default-trigger = "bt";
|
||||
linux,default-trigger = "bluetooth-power";
|
||||
default-state = "off";
|
||||
};
|
||||
};
|
||||
|
|
|
@ -22,6 +22,11 @@
|
|||
#define CTR_L1IP_MASK 3
|
||||
#define CTR_CWG_SHIFT 24
|
||||
#define CTR_CWG_MASK 15
|
||||
#define CTR_DMINLINE_SHIFT 16
|
||||
#define CTR_IMINLINE_SHIFT 0
|
||||
|
||||
#define CTR_CACHE_MINLINE_MASK \
|
||||
((0xf << CTR_DMINLINE_SHIFT) | (0xf << CTR_IMINLINE_SHIFT))
|
||||
|
||||
#define ICACHE_POLICY_RESERVED 0
|
||||
#define ICACHE_POLICY_AIVIVT 1
|
||||
|
|
|
@ -37,7 +37,8 @@
|
|||
#define ARM64_UNMAP_KERNEL_AT_EL0 16
|
||||
#define ARM64_HARDEN_BRANCH_PREDICTOR 17
|
||||
#define ARM64_SSBD 18
|
||||
#define ARM64_MISMATCHED_CACHE_TYPE 19
|
||||
|
||||
#define ARM64_NCAPS 19
|
||||
#define ARM64_NCAPS 20
|
||||
|
||||
#endif /* __ASM_CPUCAPS_H */
|
||||
|
|
|
@ -17,6 +17,7 @@
|
|||
*/
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/cachetype.h>
|
||||
#include <asm/cpu.h>
|
||||
#include <asm/cputype.h>
|
||||
#include <asm/cpufeature.h>
|
||||
|
@ -31,12 +32,18 @@ is_affected_midr_range(const struct arm64_cpu_capabilities *entry, int scope)
|
|||
}
|
||||
|
||||
static bool
|
||||
has_mismatched_cache_line_size(const struct arm64_cpu_capabilities *entry,
|
||||
int scope)
|
||||
has_mismatched_cache_type(const struct arm64_cpu_capabilities *entry,
|
||||
int scope)
|
||||
{
|
||||
u64 mask = CTR_CACHE_MINLINE_MASK;
|
||||
|
||||
/* Skip matching the min line sizes for cache type check */
|
||||
if (entry->capability == ARM64_MISMATCHED_CACHE_TYPE)
|
||||
mask ^= arm64_ftr_reg_ctrel0.strict_mask;
|
||||
|
||||
WARN_ON(scope != SCOPE_LOCAL_CPU || preemptible());
|
||||
return (read_cpuid_cachetype() & arm64_ftr_reg_ctrel0.strict_mask) !=
|
||||
(arm64_ftr_reg_ctrel0.sys_val & arm64_ftr_reg_ctrel0.strict_mask);
|
||||
return (read_cpuid_cachetype() & mask) !=
|
||||
(arm64_ftr_reg_ctrel0.sys_val & mask);
|
||||
}
|
||||
|
||||
static int cpu_enable_trap_ctr_access(void *__unused)
|
||||
|
@ -446,7 +453,14 @@ const struct arm64_cpu_capabilities arm64_errata[] = {
|
|||
{
|
||||
.desc = "Mismatched cache line size",
|
||||
.capability = ARM64_MISMATCHED_CACHE_LINE_SIZE,
|
||||
.matches = has_mismatched_cache_line_size,
|
||||
.matches = has_mismatched_cache_type,
|
||||
.def_scope = SCOPE_LOCAL_CPU,
|
||||
.enable = cpu_enable_trap_ctr_access,
|
||||
},
|
||||
{
|
||||
.desc = "Mismatched cache type",
|
||||
.capability = ARM64_MISMATCHED_CACHE_TYPE,
|
||||
.matches = has_mismatched_cache_type,
|
||||
.def_scope = SCOPE_LOCAL_CPU,
|
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.enable = cpu_enable_trap_ctr_access,
|
||||
},
|
||||
|
|
|
@ -154,7 +154,7 @@ static const struct arm64_ftr_bits ftr_ctr[] = {
|
|||
ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 28, 3, 0),
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_HIGHER_SAFE, 24, 4, 0), /* CWG */
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 20, 4, 0), /* ERG */
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 16, 4, 1), /* DminLine */
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, CTR_DMINLINE_SHIFT, 4, 1),
|
||||
/*
|
||||
* Linux can handle differing I-cache policies. Userspace JITs will
|
||||
* make use of *minLine.
|
||||
|
@ -162,7 +162,7 @@ static const struct arm64_ftr_bits ftr_ctr[] = {
|
|||
*/
|
||||
ARM64_FTR_BITS(FTR_NONSTRICT, FTR_EXACT, 14, 2, ICACHE_POLICY_AIVIVT), /* L1Ip */
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_EXACT, 4, 10, 0), /* RAZ */
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, 0, 4, 0), /* IminLine */
|
||||
ARM64_FTR_BITS(FTR_STRICT, FTR_LOWER_SAFE, CTR_IMINLINE_SHIFT, 4, 0),
|
||||
ARM64_FTR_END,
|
||||
};
|
||||
|
||||
|
|
|
@ -40,6 +40,7 @@ static char ath79_sys_type[ATH79_SYS_TYPE_LEN];
|
|||
|
||||
static void ath79_restart(char *command)
|
||||
{
|
||||
local_irq_disable();
|
||||
ath79_device_reset_set(AR71XX_RESET_FULL_CHIP);
|
||||
for (;;)
|
||||
if (cpu_wait)
|
||||
|
|
|
@ -366,6 +366,7 @@ static int __init octeon_ehci_device_init(void)
|
|||
return 0;
|
||||
|
||||
pd = of_find_device_by_node(ehci_node);
|
||||
of_node_put(ehci_node);
|
||||
if (!pd)
|
||||
return 0;
|
||||
|
||||
|
@ -428,6 +429,7 @@ static int __init octeon_ohci_device_init(void)
|
|||
return 0;
|
||||
|
||||
pd = of_find_device_by_node(ohci_node);
|
||||
of_node_put(ohci_node);
|
||||
if (!pd)
|
||||
return 0;
|
||||
|
||||
|
|
|
@ -159,6 +159,7 @@ void __init arch_init_irq(void)
|
|||
"mti,cpu-interrupt-controller");
|
||||
if (!cpu_has_veic && !intc_node)
|
||||
mips_cpu_irq_init();
|
||||
of_node_put(intc_node);
|
||||
|
||||
irqchip_init();
|
||||
}
|
||||
|
|
|
@ -141,14 +141,14 @@ static inline void * phys_to_virt(unsigned long address)
|
|||
/*
|
||||
* ISA I/O bus memory addresses are 1:1 with the physical address.
|
||||
*/
|
||||
static inline unsigned long isa_virt_to_bus(volatile void * address)
|
||||
static inline unsigned long isa_virt_to_bus(volatile void *address)
|
||||
{
|
||||
return (unsigned long)address - PAGE_OFFSET;
|
||||
return virt_to_phys(address);
|
||||
}
|
||||
|
||||
static inline void * isa_bus_to_virt(unsigned long address)
|
||||
static inline void *isa_bus_to_virt(unsigned long address)
|
||||
{
|
||||
return (void *)(address + PAGE_OFFSET);
|
||||
return phys_to_virt(address);
|
||||
}
|
||||
|
||||
#define isa_page_to_bus page_to_phys
|
||||
|
|
|
@ -134,6 +134,7 @@ static inline u32 ath79_pll_rr(unsigned reg)
|
|||
static inline void ath79_reset_wr(unsigned reg, u32 val)
|
||||
{
|
||||
__raw_writel(val, ath79_reset_base + reg);
|
||||
(void) __raw_readl(ath79_reset_base + reg); /* flush */
|
||||
}
|
||||
|
||||
static inline u32 ath79_reset_rr(unsigned reg)
|
||||
|
|
|
@ -1,4 +1,4 @@
|
|||
platform-$(CONFIG_MACH_INGENIC) += jz4740/
|
||||
cflags-$(CONFIG_MACH_INGENIC) += -I$(srctree)/arch/mips/include/asm/mach-jz4740
|
||||
load-$(CONFIG_MACH_INGENIC) += 0xffffffff80010000
|
||||
zload-$(CONFIG_MACH_INGENIC) += 0xffffffff80600000
|
||||
zload-$(CONFIG_MACH_INGENIC) += 0xffffffff81000000
|
||||
|
|
|
@ -118,7 +118,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
struct thread_info *ti = task_thread_info(p);
|
||||
struct pt_regs *childregs, *regs = current_pt_regs();
|
||||
unsigned long childksp;
|
||||
p->set_child_tid = p->clear_child_tid = NULL;
|
||||
|
||||
childksp = (unsigned long)task_stack_page(p) + THREAD_SIZE - 32;
|
||||
|
||||
|
|
|
@ -14,12 +14,14 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/irqchip/mips-gic.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/mm.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/timekeeper_internal.h>
|
||||
|
||||
#include <asm/abi.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/vdso.h>
|
||||
|
||||
/* Kernel-provided data used by the VDSO. */
|
||||
|
@ -129,12 +131,30 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
|
|||
vvar_size = gic_size + PAGE_SIZE;
|
||||
size = vvar_size + image->size;
|
||||
|
||||
/*
|
||||
* Find a region that's large enough for us to perform the
|
||||
* colour-matching alignment below.
|
||||
*/
|
||||
if (cpu_has_dc_aliases)
|
||||
size += shm_align_mask + 1;
|
||||
|
||||
base = get_unmapped_area(NULL, 0, size, 0, 0);
|
||||
if (IS_ERR_VALUE(base)) {
|
||||
ret = base;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/*
|
||||
* If we suffer from dcache aliasing, ensure that the VDSO data page
|
||||
* mapping is coloured the same as the kernel's mapping of that memory.
|
||||
* This ensures that when the kernel updates the VDSO data userland
|
||||
* will observe it without requiring cache invalidations.
|
||||
*/
|
||||
if (cpu_has_dc_aliases) {
|
||||
base = __ALIGN_MASK(base, shm_align_mask);
|
||||
base += ((unsigned long)&vdso_data - gic_size) & shm_align_mask;
|
||||
}
|
||||
|
||||
data_addr = base + gic_size;
|
||||
vdso_addr = data_addr + PAGE_SIZE;
|
||||
|
||||
|
|
|
@ -138,7 +138,7 @@ u32 pci_ohci_read_reg(int reg)
|
|||
break;
|
||||
case PCI_OHCI_INT_REG:
|
||||
_rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo);
|
||||
if ((lo & 0x00000f00) == CS5536_USB_INTR)
|
||||
if (((lo >> PIC_YSEL_LOW_USB_SHIFT) & 0xf) == CS5536_USB_INTR)
|
||||
conf_data = 1;
|
||||
break;
|
||||
default:
|
||||
|
|
|
@ -835,7 +835,8 @@ static void r4k_flush_icache_user_range(unsigned long start, unsigned long end)
|
|||
static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
|
||||
{
|
||||
/* Catch bad driver code */
|
||||
BUG_ON(size == 0);
|
||||
if (WARN_ON(size == 0))
|
||||
return;
|
||||
|
||||
preempt_disable();
|
||||
if (cpu_has_inclusive_pcaches) {
|
||||
|
@ -871,7 +872,8 @@ static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
|
|||
static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
|
||||
{
|
||||
/* Catch bad driver code */
|
||||
BUG_ON(size == 0);
|
||||
if (WARN_ON(size == 0))
|
||||
return;
|
||||
|
||||
preempt_disable();
|
||||
if (cpu_has_inclusive_pcaches) {
|
||||
|
|
|
@ -152,8 +152,6 @@ copy_thread(unsigned long clone_flags, unsigned long usp,
|
|||
|
||||
top_of_kernel_stack = sp;
|
||||
|
||||
p->set_child_tid = p->clear_child_tid = NULL;
|
||||
|
||||
/* Locate userspace context on stack... */
|
||||
sp -= STACK_FRAME_OVERHEAD; /* redzone */
|
||||
sp -= sizeof(struct pt_regs);
|
||||
|
|
|
@ -369,7 +369,7 @@ int opal_put_chars(uint32_t vtermno, const char *data, int total_len)
|
|||
/* Closed or other error drop */
|
||||
if (rc != OPAL_SUCCESS && rc != OPAL_BUSY &&
|
||||
rc != OPAL_BUSY_EVENT) {
|
||||
written = total_len;
|
||||
written += total_len;
|
||||
break;
|
||||
}
|
||||
if (rc == OPAL_SUCCESS) {
|
||||
|
|
|
@ -357,7 +357,7 @@ static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
|
|||
int len, error_log_length;
|
||||
|
||||
error_log_length = 8 + rtas_error_extended_log_length(h);
|
||||
len = max_t(int, error_log_length, RTAS_ERROR_LOG_MAX);
|
||||
len = min_t(int, error_log_length, RTAS_ERROR_LOG_MAX);
|
||||
memset(global_mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
|
||||
memcpy(global_mce_data_buf, h, len);
|
||||
errhdr = (struct rtas_error_log *)global_mce_data_buf;
|
||||
|
|
|
@ -196,7 +196,7 @@ static int mpic_msgr_probe(struct platform_device *dev)
|
|||
|
||||
/* IO map the message register block. */
|
||||
of_address_to_resource(np, 0, &rsrc);
|
||||
msgr_block_addr = ioremap(rsrc.start, rsrc.end - rsrc.start);
|
||||
msgr_block_addr = ioremap(rsrc.start, resource_size(&rsrc));
|
||||
if (!msgr_block_addr) {
|
||||
dev_err(&dev->dev, "Failed to iomap MPIC message registers");
|
||||
return -EFAULT;
|
||||
|
|
|
@ -401,11 +401,13 @@ static void *get_vmcoreinfo_old(unsigned long *size)
|
|||
if (copy_oldmem_kernel(nt_name, addr + sizeof(note),
|
||||
sizeof(nt_name) - 1))
|
||||
return NULL;
|
||||
if (strcmp(nt_name, "VMCOREINFO") != 0)
|
||||
if (strcmp(nt_name, VMCOREINFO_NOTE_NAME) != 0)
|
||||
return NULL;
|
||||
vmcoreinfo = kzalloc_panic(note.n_descsz);
|
||||
if (copy_oldmem_kernel(vmcoreinfo, addr + 24, note.n_descsz))
|
||||
if (copy_oldmem_kernel(vmcoreinfo, addr + 24, note.n_descsz)) {
|
||||
kfree(vmcoreinfo);
|
||||
return NULL;
|
||||
}
|
||||
*size = note.n_descsz;
|
||||
return vmcoreinfo;
|
||||
}
|
||||
|
@ -415,15 +417,20 @@ static void *get_vmcoreinfo_old(unsigned long *size)
|
|||
*/
|
||||
static void *nt_vmcoreinfo(void *ptr)
|
||||
{
|
||||
const char *name = VMCOREINFO_NOTE_NAME;
|
||||
unsigned long size;
|
||||
void *vmcoreinfo;
|
||||
|
||||
vmcoreinfo = os_info_old_entry(OS_INFO_VMCOREINFO, &size);
|
||||
if (!vmcoreinfo)
|
||||
vmcoreinfo = get_vmcoreinfo_old(&size);
|
||||
if (vmcoreinfo)
|
||||
return nt_init_name(ptr, 0, vmcoreinfo, size, name);
|
||||
|
||||
vmcoreinfo = get_vmcoreinfo_old(&size);
|
||||
if (!vmcoreinfo)
|
||||
return ptr;
|
||||
return nt_init_name(ptr, 0, vmcoreinfo, size, "VMCOREINFO");
|
||||
ptr = nt_init_name(ptr, 0, vmcoreinfo, size, name);
|
||||
kfree(vmcoreinfo);
|
||||
return ptr;
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -156,7 +156,8 @@ static int shadow_crycb(struct kvm_vcpu *vcpu, struct vsie_page *vsie_page)
|
|||
return set_validity_icpt(scb_s, 0x0039U);
|
||||
|
||||
/* copy only the wrapping keys */
|
||||
if (read_guest_real(vcpu, crycb_addr + 72, &vsie_page->crycb, 56))
|
||||
if (read_guest_real(vcpu, crycb_addr + 72,
|
||||
vsie_page->crycb.dea_wrapping_key_mask, 56))
|
||||
return set_validity_icpt(scb_s, 0x0035U);
|
||||
|
||||
scb_s->ecb3 |= ecb3_flags;
|
||||
|
|
|
@ -27,7 +27,7 @@
|
|||
*/
|
||||
ENTRY(memset)
|
||||
ltgr %r4,%r4
|
||||
bzr %r14
|
||||
jz .Lmemset_exit
|
||||
ltgr %r3,%r3
|
||||
jnz .Lmemset_fill
|
||||
aghi %r4,-1
|
||||
|
@ -42,12 +42,13 @@ ENTRY(memset)
|
|||
.Lmemset_clear_rest:
|
||||
larl %r3,.Lmemset_xc
|
||||
ex %r4,0(%r3)
|
||||
.Lmemset_exit:
|
||||
BR_EX %r14
|
||||
.Lmemset_fill:
|
||||
stc %r3,0(%r2)
|
||||
cghi %r4,1
|
||||
lgr %r1,%r2
|
||||
ber %r14
|
||||
je .Lmemset_fill_exit
|
||||
aghi %r4,-2
|
||||
srlg %r3,%r4,8
|
||||
ltgr %r3,%r3
|
||||
|
@ -59,6 +60,7 @@ ENTRY(memset)
|
|||
.Lmemset_fill_rest:
|
||||
larl %r3,.Lmemset_mvc
|
||||
ex %r4,0(%r3)
|
||||
.Lmemset_fill_exit:
|
||||
BR_EX %r14
|
||||
.Lmemset_xc:
|
||||
xc 0(1,%r1),0(%r1)
|
||||
|
@ -73,7 +75,7 @@ EXPORT_SYMBOL(memset)
|
|||
*/
|
||||
ENTRY(memcpy)
|
||||
ltgr %r4,%r4
|
||||
bzr %r14
|
||||
jz .Lmemcpy_exit
|
||||
aghi %r4,-1
|
||||
srlg %r5,%r4,8
|
||||
ltgr %r5,%r5
|
||||
|
@ -82,6 +84,7 @@ ENTRY(memcpy)
|
|||
.Lmemcpy_rest:
|
||||
larl %r5,.Lmemcpy_mvc
|
||||
ex %r4,0(%r5)
|
||||
.Lmemcpy_exit:
|
||||
BR_EX %r14
|
||||
.Lmemcpy_loop:
|
||||
mvc 0(256,%r1),0(%r3)
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
#ifndef _ASM_X86_PGTABLE_3LEVEL_H
|
||||
#define _ASM_X86_PGTABLE_3LEVEL_H
|
||||
|
||||
#include <asm/atomic64_32.h>
|
||||
|
||||
/*
|
||||
* Intel Physical Address Extension (PAE) Mode - three-level page
|
||||
* tables on PPro+ CPUs.
|
||||
|
@ -142,10 +144,7 @@ static inline pte_t native_ptep_get_and_clear(pte_t *ptep)
|
|||
{
|
||||
pte_t res;
|
||||
|
||||
/* xchg acts as a barrier before the setting of the high bits */
|
||||
res.pte_low = xchg(&ptep->pte_low, 0);
|
||||
res.pte_high = ptep->pte_high;
|
||||
ptep->pte_high = 0;
|
||||
res.pte = (pteval_t)atomic64_xchg((atomic64_t *)ptep, 0);
|
||||
|
||||
return res;
|
||||
}
|
||||
|
|
|
@ -420,7 +420,7 @@ static inline pmd_t pfn_pmd(unsigned long page_nr, pgprot_t pgprot)
|
|||
|
||||
static inline pud_t pfn_pud(unsigned long page_nr, pgprot_t pgprot)
|
||||
{
|
||||
phys_addr_t pfn = page_nr << PAGE_SHIFT;
|
||||
phys_addr_t pfn = (phys_addr_t)page_nr << PAGE_SHIFT;
|
||||
pfn ^= protnone_mask(pgprot_val(pgprot));
|
||||
pfn &= PHYSICAL_PUD_PAGE_MASK;
|
||||
return __pud(pfn | massage_pgprot(pgprot));
|
||||
|
|
|
@ -330,8 +330,6 @@ static noinline int vmalloc_fault(unsigned long address)
|
|||
if (!(address >= VMALLOC_START && address < VMALLOC_END))
|
||||
return -1;
|
||||
|
||||
WARN_ON_ONCE(in_nmi());
|
||||
|
||||
/*
|
||||
* Synchronize this task's top level page-table
|
||||
* with the 'reference' page table.
|
||||
|
|
|
@ -477,7 +477,7 @@ static void xen_convert_regs(const struct xen_pmu_regs *xen_regs,
|
|||
irqreturn_t xen_pmu_irq_handler(int irq, void *dev_id)
|
||||
{
|
||||
int err, ret = IRQ_NONE;
|
||||
struct pt_regs regs;
|
||||
struct pt_regs regs = {0};
|
||||
const struct xen_pmu_data *xenpmu_data = get_xenpmu_data();
|
||||
uint8_t xenpmu_flags = get_xenpmu_flags();
|
||||
|
||||
|
|
|
@ -155,7 +155,7 @@ out:
|
|||
|
||||
unsigned int bvec_nr_vecs(unsigned short idx)
|
||||
{
|
||||
return bvec_slabs[idx].nr_vecs;
|
||||
return bvec_slabs[--idx].nr_vecs;
|
||||
}
|
||||
|
||||
void bvec_free(mempool_t *pool, struct bio_vec *bv, unsigned int idx)
|
||||
|
|
|
@ -185,7 +185,8 @@ static struct blkcg_gq *blkg_create(struct blkcg *blkcg,
|
|||
}
|
||||
|
||||
wb_congested = wb_congested_get_create(&q->backing_dev_info,
|
||||
blkcg->css.id, GFP_NOWAIT);
|
||||
blkcg->css.id,
|
||||
GFP_NOWAIT | __GFP_NOWARN);
|
||||
if (!wb_congested) {
|
||||
ret = -ENOMEM;
|
||||
goto err_put_css;
|
||||
|
@ -193,7 +194,7 @@ static struct blkcg_gq *blkg_create(struct blkcg *blkcg,
|
|||
|
||||
/* allocate */
|
||||
if (!new_blkg) {
|
||||
new_blkg = blkg_alloc(blkcg, q, GFP_NOWAIT);
|
||||
new_blkg = blkg_alloc(blkcg, q, GFP_NOWAIT | __GFP_NOWARN);
|
||||
if (unlikely(!new_blkg)) {
|
||||
ret = -ENOMEM;
|
||||
goto err_put_congested;
|
||||
|
@ -1022,7 +1023,7 @@ blkcg_css_alloc(struct cgroup_subsys_state *parent_css)
|
|||
}
|
||||
|
||||
spin_lock_init(&blkcg->lock);
|
||||
INIT_RADIX_TREE(&blkcg->blkg_tree, GFP_NOWAIT);
|
||||
INIT_RADIX_TREE(&blkcg->blkg_tree, GFP_NOWAIT | __GFP_NOWARN);
|
||||
INIT_HLIST_HEAD(&blkcg->blkg_list);
|
||||
#ifdef CONFIG_CGROUP_WRITEBACK
|
||||
INIT_LIST_HEAD(&blkcg->cgwb_list);
|
||||
|
@ -1238,7 +1239,7 @@ pd_prealloc:
|
|||
if (blkg->pd[pol->plid])
|
||||
continue;
|
||||
|
||||
pd = pol->pd_alloc_fn(GFP_NOWAIT, q->node);
|
||||
pd = pol->pd_alloc_fn(GFP_NOWAIT | __GFP_NOWARN, q->node);
|
||||
if (!pd)
|
||||
swap(pd, pd_prealloc);
|
||||
if (!pd) {
|
||||
|
|
|
@ -2950,7 +2950,8 @@ static void cfq_arm_slice_timer(struct cfq_data *cfqd)
|
|||
* for devices that support queuing, otherwise we still have a problem
|
||||
* with sync vs async workloads.
|
||||
*/
|
||||
if (blk_queue_nonrot(cfqd->queue) && cfqd->hw_tag)
|
||||
if (blk_queue_nonrot(cfqd->queue) && cfqd->hw_tag &&
|
||||
!cfqd->cfq_group_idle)
|
||||
return;
|
||||
|
||||
WARN_ON(!RB_EMPTY_ROOT(&cfqq->sort_list));
|
||||
|
@ -3866,7 +3867,8 @@ cfq_get_queue(struct cfq_data *cfqd, bool is_sync, struct cfq_io_cq *cic,
|
|||
goto out;
|
||||
}
|
||||
|
||||
cfqq = kmem_cache_alloc_node(cfq_pool, GFP_NOWAIT | __GFP_ZERO,
|
||||
cfqq = kmem_cache_alloc_node(cfq_pool,
|
||||
GFP_NOWAIT | __GFP_ZERO | __GFP_NOWARN,
|
||||
cfqd->queue->node);
|
||||
if (!cfqq) {
|
||||
cfqq = &cfqd->oom_cfqq;
|
||||
|
|
|
@ -177,7 +177,7 @@ int aix_partition(struct parsed_partitions *state)
|
|||
u32 vgda_sector = 0;
|
||||
u32 vgda_len = 0;
|
||||
int numlvs = 0;
|
||||
struct pvd *pvd;
|
||||
struct pvd *pvd = NULL;
|
||||
struct lv_info {
|
||||
unsigned short pps_per_lv;
|
||||
unsigned short pps_found;
|
||||
|
@ -231,10 +231,11 @@ int aix_partition(struct parsed_partitions *state)
|
|||
if (lvip[i].pps_per_lv)
|
||||
foundlvs += 1;
|
||||
}
|
||||
/* pvd loops depend on n[].name and lvip[].pps_per_lv */
|
||||
pvd = alloc_pvd(state, vgda_sector + 17);
|
||||
}
|
||||
put_dev_sector(sect);
|
||||
}
|
||||
pvd = alloc_pvd(state, vgda_sector + 17);
|
||||
if (pvd) {
|
||||
int numpps = be16_to_cpu(pvd->pp_count);
|
||||
int psn_part1 = be32_to_cpu(pvd->psn_part1);
|
||||
|
@ -281,10 +282,14 @@ int aix_partition(struct parsed_partitions *state)
|
|||
next_lp_ix += 1;
|
||||
}
|
||||
for (i = 0; i < state->limit; i += 1)
|
||||
if (lvip[i].pps_found && !lvip[i].lv_is_contiguous)
|
||||
if (lvip[i].pps_found && !lvip[i].lv_is_contiguous) {
|
||||
char tmp[sizeof(n[i].name) + 1]; // null char
|
||||
|
||||
snprintf(tmp, sizeof(tmp), "%s", n[i].name);
|
||||
pr_warn("partition %s (%u pp's found) is "
|
||||
"not contiguous\n",
|
||||
n[i].name, lvip[i].pps_found);
|
||||
tmp, lvip[i].pps_found);
|
||||
}
|
||||
kfree(pvd);
|
||||
}
|
||||
kfree(n);
|
||||
|
|
|
@ -215,7 +215,7 @@ struct crypto_alg *crypto_larval_lookup(const char *name, u32 type, u32 mask)
|
|||
type &= mask;
|
||||
|
||||
alg = crypto_alg_lookup(name, type, mask);
|
||||
if (!alg) {
|
||||
if (!alg && !(mask & CRYPTO_NOLOAD)) {
|
||||
request_module("crypto-%s", name);
|
||||
|
||||
if (!((type ^ CRYPTO_ALG_NEED_FALLBACK) & mask &
|
||||
|
|
|
@ -1453,7 +1453,8 @@ static int acpi_add_single_object(struct acpi_device **child,
|
|||
* Note this must be done before the get power-/wakeup_dev-flags calls.
|
||||
*/
|
||||
if (type == ACPI_BUS_TYPE_DEVICE)
|
||||
acpi_bus_get_status(device);
|
||||
if (acpi_bus_get_status(device) < 0)
|
||||
acpi_set_device_status(device, 0);
|
||||
|
||||
acpi_bus_get_power_flags(device);
|
||||
acpi_bus_get_wakeup_device_flags(device);
|
||||
|
@ -1531,7 +1532,7 @@ static int acpi_bus_type_and_status(acpi_handle handle, int *type,
|
|||
* acpi_add_single_object updates this once we've an acpi_device
|
||||
* so that acpi_bus_get_status' quirk handling can be used.
|
||||
*/
|
||||
*sta = 0;
|
||||
*sta = ACPI_STA_DEFAULT;
|
||||
break;
|
||||
case ACPI_TYPE_PROCESSOR:
|
||||
*type = ACPI_BUS_TYPE_PROCESSOR;
|
||||
|
|
|
@ -2132,6 +2132,8 @@ static void ahci_set_aggressive_devslp(struct ata_port *ap, bool sleep)
|
|||
deto = 20;
|
||||
}
|
||||
|
||||
/* Make dito, mdat, deto bits to 0s */
|
||||
devslp &= ~GENMASK_ULL(24, 2);
|
||||
devslp |= ((dito << PORT_DEVSLP_DITO_OFFSET) |
|
||||
(mdat << PORT_DEVSLP_MDAT_OFFSET) |
|
||||
(deto << PORT_DEVSLP_DETO_OFFSET) |
|
||||
|
|
|
@ -2612,6 +2612,9 @@ void device_shutdown(void)
|
|||
{
|
||||
struct device *dev, *parent;
|
||||
|
||||
wait_for_device_probe();
|
||||
device_block_probing();
|
||||
|
||||
spin_lock(&devices_kset->list_lock);
|
||||
/*
|
||||
* Walk the devices list backward, shutting down each in turn.
|
||||
|
|
|
@ -125,6 +125,7 @@ config BT_HCIUART_LL
|
|||
config BT_HCIUART_3WIRE
|
||||
bool "Three-wire UART (H5) protocol support"
|
||||
depends on BT_HCIUART
|
||||
depends on BT_HCIUART_SERDEV
|
||||
help
|
||||
The HCI Three-wire UART Transport Layer makes it possible to
|
||||
user the Bluetooth HCI over a serial port interface. The HCI
|
||||
|
|
|
@ -115,7 +115,7 @@ static int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
|
|||
/* Lock the adapter for the duration of the whole sequence. */
|
||||
if (!tpm_dev.client->adapter->algo->master_xfer)
|
||||
return -EOPNOTSUPP;
|
||||
i2c_lock_adapter(tpm_dev.client->adapter);
|
||||
i2c_lock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
|
||||
|
||||
if (tpm_dev.chip_type == SLB9645) {
|
||||
/* use a combined read for newer chips
|
||||
|
@ -156,7 +156,7 @@ static int iic_tpm_read(u8 addr, u8 *buffer, size_t len)
|
|||
}
|
||||
|
||||
out:
|
||||
i2c_unlock_adapter(tpm_dev.client->adapter);
|
||||
i2c_unlock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
|
||||
/* take care of 'guard time' */
|
||||
usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI);
|
||||
|
||||
|
@ -188,7 +188,7 @@ static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
|
|||
|
||||
if (!tpm_dev.client->adapter->algo->master_xfer)
|
||||
return -EOPNOTSUPP;
|
||||
i2c_lock_adapter(tpm_dev.client->adapter);
|
||||
i2c_lock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
|
||||
|
||||
/* prepend the 'register address' to the buffer */
|
||||
tpm_dev.buf[0] = addr;
|
||||
|
@ -207,7 +207,7 @@ static int iic_tpm_write_generic(u8 addr, u8 *buffer, size_t len,
|
|||
usleep_range(sleep_low, sleep_hi);
|
||||
}
|
||||
|
||||
i2c_unlock_adapter(tpm_dev.client->adapter);
|
||||
i2c_unlock_bus(tpm_dev.client->adapter, I2C_LOCK_SEGMENT);
|
||||
/* take care of 'guard time' */
|
||||
usleep_range(SLEEP_DURATION_LOW, SLEEP_DURATION_HI);
|
||||
|
||||
|
|
|
@ -189,6 +189,7 @@ static const struct tpm_tis_phy_ops tpm_spi_phy_ops = {
|
|||
static int tpm_tis_spi_probe(struct spi_device *dev)
|
||||
{
|
||||
struct tpm_tis_spi_phy *phy;
|
||||
int irq;
|
||||
|
||||
phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy),
|
||||
GFP_KERNEL);
|
||||
|
@ -201,7 +202,13 @@ static int tpm_tis_spi_probe(struct spi_device *dev)
|
|||
if (!phy->iobuf)
|
||||
return -ENOMEM;
|
||||
|
||||
return tpm_tis_core_init(&dev->dev, &phy->priv, -1, &tpm_spi_phy_ops,
|
||||
/* If the SPI device has an IRQ then use that */
|
||||
if (dev->irq > 0)
|
||||
irq = dev->irq;
|
||||
else
|
||||
irq = -1;
|
||||
|
||||
return tpm_tis_core_init(&dev->dev, &phy->priv, irq, &tpm_spi_phy_ops,
|
||||
NULL);
|
||||
}
|
||||
|
||||
|
|
|
@ -177,8 +177,15 @@ static struct clk *_of_fixed_factor_clk_setup(struct device_node *node)
|
|||
|
||||
clk = clk_register_fixed_factor(NULL, clk_name, parent_name, flags,
|
||||
mult, div);
|
||||
if (IS_ERR(clk))
|
||||
if (IS_ERR(clk)) {
|
||||
/*
|
||||
* If parent clock is not registered, registration would fail.
|
||||
* Clear OF_POPULATED flag so that clock registration can be
|
||||
* attempted again from probe function.
|
||||
*/
|
||||
of_node_clear_flag(node, OF_POPULATED);
|
||||
return clk;
|
||||
}
|
||||
|
||||
ret = of_clk_add_provider(node, of_clk_src_simple_get, clk);
|
||||
if (ret) {
|
||||
|
|
|
@ -137,6 +137,7 @@ static void __init imx6ul_clocks_init(struct device_node *ccm_node)
|
|||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-anatop");
|
||||
base = of_iomap(np, 0);
|
||||
of_node_put(np);
|
||||
WARN_ON(!base);
|
||||
|
||||
clks[IMX6UL_PLL1_BYPASS_SRC] = imx_clk_mux("pll1_bypass_src", base + 0x00, 14, 1, pll_bypass_src_sels, ARRAY_SIZE(pll_bypass_src_sels));
|
||||
|
|
|
@ -1521,6 +1521,7 @@ static const char *const rk3399_pmucru_critical_clocks[] __initconst = {
|
|||
"pclk_pmu_src",
|
||||
"fclk_cm0s_src_pmu",
|
||||
"clk_timer_src_pmu",
|
||||
"pclk_rkpwm_pmu",
|
||||
};
|
||||
|
||||
static void __init rk3399_clk_init(struct device_node *np)
|
||||
|
|
|
@ -1352,7 +1352,7 @@ err_sha_v4_algs:
|
|||
|
||||
err_sha_v3_algs:
|
||||
for (j = 0; j < k; j++)
|
||||
crypto_unregister_ahash(&sha_v4_algs[j]);
|
||||
crypto_unregister_ahash(&sha_v3_algs[j]);
|
||||
|
||||
err_aes_algs:
|
||||
for (j = 0; j < i; j++)
|
||||
|
@ -1368,7 +1368,7 @@ static void sahara_unregister_algs(struct sahara_dev *dev)
|
|||
for (i = 0; i < ARRAY_SIZE(aes_algs); i++)
|
||||
crypto_unregister_alg(&aes_algs[i]);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(sha_v4_algs); i++)
|
||||
for (i = 0; i < ARRAY_SIZE(sha_v3_algs); i++)
|
||||
crypto_unregister_ahash(&sha_v3_algs[i]);
|
||||
|
||||
if (dev->version > SAHARA_VERSION_3)
|
||||
|
|
|
@ -844,6 +844,8 @@ static int mv_xor_v2_remove(struct platform_device *pdev)
|
|||
|
||||
platform_msi_domain_free_irqs(&pdev->dev);
|
||||
|
||||
tasklet_kill(&xor_dev->irq_tasklet);
|
||||
|
||||
clk_disable_unprepare(xor_dev->clk);
|
||||
|
||||
return 0;
|
||||
|
|
|
@ -2167,13 +2167,14 @@ static int pl330_terminate_all(struct dma_chan *chan)
|
|||
|
||||
pm_runtime_get_sync(pl330->ddma.dev);
|
||||
spin_lock_irqsave(&pch->lock, flags);
|
||||
|
||||
spin_lock(&pl330->lock);
|
||||
_stop(pch->thread);
|
||||
spin_unlock(&pl330->lock);
|
||||
|
||||
pch->thread->req[0].desc = NULL;
|
||||
pch->thread->req[1].desc = NULL;
|
||||
pch->thread->req_running = -1;
|
||||
spin_unlock(&pl330->lock);
|
||||
|
||||
power_down = pch->active;
|
||||
pch->active = false;
|
||||
|
||||
|
|
|
@ -250,7 +250,6 @@ void __init efi_init(void)
|
|||
reserve_regions();
|
||||
efi_memattr_init();
|
||||
efi_esrt_init();
|
||||
efi_memmap_unmap();
|
||||
|
||||
memblock_reserve(params.mmap & PAGE_MASK,
|
||||
PAGE_ALIGN(params.mmap_size +
|
||||
|
|
|
@ -118,11 +118,13 @@ static int __init arm_enable_runtime_services(void)
|
|||
{
|
||||
u64 mapsize;
|
||||
|
||||
if (!efi_enabled(EFI_BOOT)) {
|
||||
if (!efi_enabled(EFI_BOOT) || !efi_enabled(EFI_MEMMAP)) {
|
||||
pr_info("EFI services will not be available.\n");
|
||||
return 0;
|
||||
}
|
||||
|
||||
efi_memmap_unmap();
|
||||
|
||||
if (efi_runtime_disabled()) {
|
||||
pr_info("EFI runtime services will be disabled.\n");
|
||||
return 0;
|
||||
|
|
|
@ -333,7 +333,8 @@ void __init efi_esrt_init(void)
|
|||
|
||||
end = esrt_data + size;
|
||||
pr_info("Reserving ESRT space from %pa to %pa.\n", &esrt_data, &end);
|
||||
efi_mem_reserve(esrt_data, esrt_data_size);
|
||||
if (md.type == EFI_BOOT_SERVICES_DATA)
|
||||
efi_mem_reserve(esrt_data, esrt_data_size);
|
||||
|
||||
pr_debug("esrt-init: loaded.\n");
|
||||
err_memunmap:
|
||||
|
|
|
@ -495,9 +495,10 @@ err_irq_alloc_descs:
|
|||
|
||||
chip = chip_save;
|
||||
err_gpiochip_add:
|
||||
chip = chip_save;
|
||||
while (--i >= 0) {
|
||||
chip--;
|
||||
gpiochip_remove(&chip->gpio);
|
||||
chip++;
|
||||
}
|
||||
kfree(chip_save);
|
||||
|
||||
|
|
|
@ -660,6 +660,8 @@ static int pxa_gpio_probe(struct platform_device *pdev)
|
|||
pchip->irq0 = irq0;
|
||||
pchip->irq1 = irq1;
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
if (!res)
|
||||
return -EINVAL;
|
||||
gpio_reg_base = devm_ioremap(&pdev->dev, res->start,
|
||||
resource_size(res));
|
||||
if (!gpio_reg_base)
|
||||
|
|
|
@ -723,4 +723,4 @@ static int __init tegra_gpio_init(void)
|
|||
{
|
||||
return platform_driver_register(&tegra_gpio_driver);
|
||||
}
|
||||
postcore_initcall(tegra_gpio_init);
|
||||
subsys_initcall(tegra_gpio_init);
|
||||
|
|
|
@ -85,7 +85,7 @@ struct acpi_gpio_info {
|
|||
};
|
||||
|
||||
/* gpio suffixes used for ACPI and device tree lookup */
|
||||
static const char * const gpio_suffixes[] = { "gpios", "gpio" };
|
||||
static __maybe_unused const char * const gpio_suffixes[] = { "gpios", "gpio" };
|
||||
|
||||
#ifdef CONFIG_OF_GPIO
|
||||
struct gpio_desc *of_find_gpio(struct device *dev,
|
||||
|
|
|
@ -124,6 +124,8 @@ struct kfd_process *kfd_get_process(const struct task_struct *thread)
|
|||
return ERR_PTR(-EINVAL);
|
||||
|
||||
process = find_process(thread);
|
||||
if (!process)
|
||||
return ERR_PTR(-EINVAL);
|
||||
|
||||
return process;
|
||||
}
|
||||
|
|
|
@ -113,6 +113,9 @@ static const struct edid_quirk {
|
|||
/* CPT panel of Asus UX303LA reports 8 bpc, but is a 6 bpc panel */
|
||||
{ "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
|
||||
|
||||
/* SDC panel of Lenovo B50-80 reports 8 bpc, but is a 6 bpc panel */
|
||||
{ "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
|
||||
|
||||
/* Belinea 10 15 55 */
|
||||
{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
|
||||
{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
|
||||
|
|
|
@ -271,12 +271,16 @@ nouveau_connector_detect(struct drm_connector *connector, bool force)
|
|||
nv_connector->edid = NULL;
|
||||
}
|
||||
|
||||
/* Outputs are only polled while runtime active, so acquiring a
|
||||
* runtime PM ref here is unnecessary (and would deadlock upon
|
||||
* runtime suspend because it waits for polling to finish).
|
||||
/* Outputs are only polled while runtime active, so resuming the
|
||||
* device here is unnecessary (and would deadlock upon runtime suspend
|
||||
* because it waits for polling to finish). We do however, want to
|
||||
* prevent the autosuspend timer from elapsing during this operation
|
||||
* if possible.
|
||||
*/
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
ret = pm_runtime_get_sync(connector->dev->dev);
|
||||
if (drm_kms_helper_is_poll_worker()) {
|
||||
pm_runtime_get_noresume(dev->dev);
|
||||
} else {
|
||||
ret = pm_runtime_get_sync(dev->dev);
|
||||
if (ret < 0 && ret != -EACCES)
|
||||
return conn_status;
|
||||
}
|
||||
|
@ -354,10 +358,8 @@ detect_analog:
|
|||
|
||||
out:
|
||||
|
||||
if (!drm_kms_helper_is_poll_worker()) {
|
||||
pm_runtime_mark_last_busy(connector->dev->dev);
|
||||
pm_runtime_put_autosuspend(connector->dev->dev);
|
||||
}
|
||||
pm_runtime_mark_last_busy(dev->dev);
|
||||
pm_runtime_put_autosuspend(dev->dev);
|
||||
|
||||
return conn_status;
|
||||
}
|
||||
|
|
|
@ -367,8 +367,6 @@ nouveau_display_hpd_work(struct work_struct *work)
|
|||
pm_runtime_get_sync(drm->dev->dev);
|
||||
|
||||
drm_helper_hpd_irq_event(drm->dev);
|
||||
/* enable polling for external displays */
|
||||
drm_kms_helper_poll_enable(drm->dev);
|
||||
|
||||
pm_runtime_mark_last_busy(drm->dev->dev);
|
||||
pm_runtime_put_sync(drm->dev->dev);
|
||||
|
@ -391,15 +389,29 @@ nouveau_display_acpi_ntfy(struct notifier_block *nb, unsigned long val,
|
|||
{
|
||||
struct nouveau_drm *drm = container_of(nb, typeof(*drm), acpi_nb);
|
||||
struct acpi_bus_event *info = data;
|
||||
int ret;
|
||||
|
||||
if (!strcmp(info->device_class, ACPI_VIDEO_CLASS)) {
|
||||
if (info->type == ACPI_VIDEO_NOTIFY_PROBE) {
|
||||
/*
|
||||
* This may be the only indication we receive of a
|
||||
* connector hotplug on a runtime suspended GPU,
|
||||
* schedule hpd_work to check.
|
||||
*/
|
||||
schedule_work(&drm->hpd_work);
|
||||
ret = pm_runtime_get(drm->dev->dev);
|
||||
if (ret == 1 || ret == -EACCES) {
|
||||
/* If the GPU is already awake, or in a state
|
||||
* where we can't wake it up, it can handle
|
||||
* it's own hotplug events.
|
||||
*/
|
||||
pm_runtime_put_autosuspend(drm->dev->dev);
|
||||
} else if (ret == 0) {
|
||||
/* This may be the only indication we receive
|
||||
* of a connector hotplug on a runtime
|
||||
* suspended GPU, schedule hpd_work to check.
|
||||
*/
|
||||
NV_DEBUG(drm, "ACPI requested connector reprobe\n");
|
||||
schedule_work(&drm->hpd_work);
|
||||
pm_runtime_put_noidle(drm->dev->dev);
|
||||
} else {
|
||||
NV_WARN(drm, "Dropped ACPI reprobe event due to RPM error: %d\n",
|
||||
ret);
|
||||
}
|
||||
|
||||
/* acpi-video should not generate keypresses for this */
|
||||
return NOTIFY_BAD;
|
||||
|
@ -422,6 +434,11 @@ nouveau_display_init(struct drm_device *dev)
|
|||
if (ret)
|
||||
return ret;
|
||||
|
||||
/* enable connector detection and polling for connectors without HPD
|
||||
* support
|
||||
*/
|
||||
drm_kms_helper_poll_enable(dev);
|
||||
|
||||
/* enable hotplug interrupts */
|
||||
list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
|
||||
struct nouveau_connector *conn = nouveau_connector(connector);
|
||||
|
|
|
@ -23,6 +23,10 @@
|
|||
#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
|
||||
#include "priv.h"
|
||||
|
||||
#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
|
||||
#include <asm/dma-iommu.h>
|
||||
#endif
|
||||
|
||||
static int
|
||||
nvkm_device_tegra_power_up(struct nvkm_device_tegra *tdev)
|
||||
{
|
||||
|
@ -95,6 +99,15 @@ nvkm_device_tegra_probe_iommu(struct nvkm_device_tegra *tdev)
|
|||
unsigned long pgsize_bitmap;
|
||||
int ret;
|
||||
|
||||
#if IS_ENABLED(CONFIG_ARM_DMA_USE_IOMMU)
|
||||
if (dev->archdata.mapping) {
|
||||
struct dma_iommu_mapping *mapping = to_dma_iommu_mapping(dev);
|
||||
|
||||
arm_iommu_detach_device(dev);
|
||||
arm_iommu_release_mapping(mapping);
|
||||
}
|
||||
#endif
|
||||
|
||||
if (!tdev->func->iommu_bit)
|
||||
return;
|
||||
|
||||
|
|
|
@ -823,7 +823,7 @@ static void s6e8aa0_read_mtp_id(struct s6e8aa0 *ctx)
|
|||
int ret, i;
|
||||
|
||||
ret = s6e8aa0_dcs_read(ctx, 0xd1, id, ARRAY_SIZE(id));
|
||||
if (ret < ARRAY_SIZE(id) || id[0] == 0x00) {
|
||||
if (ret < 0 || ret < ARRAY_SIZE(id) || id[0] == 0x00) {
|
||||
dev_err(ctx->dev, "read id failed\n");
|
||||
ctx->error = -EIO;
|
||||
return;
|
||||
|
|
|
@ -327,6 +327,9 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
|
|||
vc4_state->y_scaling[0] = vc4_get_scaling_mode(vc4_state->src_h[0],
|
||||
vc4_state->crtc_h);
|
||||
|
||||
vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
|
||||
vc4_state->y_scaling[0] == VC4_SCALING_NONE);
|
||||
|
||||
if (num_planes > 1) {
|
||||
vc4_state->is_yuv = true;
|
||||
|
||||
|
@ -342,24 +345,17 @@ static int vc4_plane_setup_clipping_and_scaling(struct drm_plane_state *state)
|
|||
vc4_get_scaling_mode(vc4_state->src_h[1],
|
||||
vc4_state->crtc_h);
|
||||
|
||||
/* YUV conversion requires that scaling be enabled,
|
||||
* even on a plane that's otherwise 1:1. Choose TPZ
|
||||
* for simplicity.
|
||||
/* YUV conversion requires that horizontal scaling be enabled,
|
||||
* even on a plane that's otherwise 1:1. Looks like only PPF
|
||||
* works in that case, so let's pick that one.
|
||||
*/
|
||||
if (vc4_state->x_scaling[0] == VC4_SCALING_NONE)
|
||||
vc4_state->x_scaling[0] = VC4_SCALING_TPZ;
|
||||
if (vc4_state->y_scaling[0] == VC4_SCALING_NONE)
|
||||
vc4_state->y_scaling[0] = VC4_SCALING_TPZ;
|
||||
if (vc4_state->is_unity)
|
||||
vc4_state->x_scaling[0] = VC4_SCALING_PPF;
|
||||
} else {
|
||||
vc4_state->x_scaling[1] = VC4_SCALING_NONE;
|
||||
vc4_state->y_scaling[1] = VC4_SCALING_NONE;
|
||||
}
|
||||
|
||||
vc4_state->is_unity = (vc4_state->x_scaling[0] == VC4_SCALING_NONE &&
|
||||
vc4_state->y_scaling[0] == VC4_SCALING_NONE &&
|
||||
vc4_state->x_scaling[1] == VC4_SCALING_NONE &&
|
||||
vc4_state->y_scaling[1] == VC4_SCALING_NONE);
|
||||
|
||||
/* No configuring scaling on the cursor plane, since it gets
|
||||
non-vblank-synced updates, and scaling requires requires
|
||||
LBM changes which have to be vblank-synced.
|
||||
|
@ -637,7 +633,10 @@ static int vc4_plane_mode_set(struct drm_plane *plane,
|
|||
vc4_dlist_write(vc4_state, SCALER_CSC2_ITR_R_601_5);
|
||||
}
|
||||
|
||||
if (!vc4_state->is_unity) {
|
||||
if (vc4_state->x_scaling[0] != VC4_SCALING_NONE ||
|
||||
vc4_state->x_scaling[1] != VC4_SCALING_NONE ||
|
||||
vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
|
||||
vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
|
||||
/* LBM Base Address. */
|
||||
if (vc4_state->y_scaling[0] != VC4_SCALING_NONE ||
|
||||
vc4_state->y_scaling[1] != VC4_SCALING_NONE) {
|
||||
|
|
|
@ -316,13 +316,17 @@ static int mbus_code_to_bus_cfg(struct ipu_csi_bus_config *cfg, u32 mbus_code)
|
|||
/*
|
||||
* Fill a CSI bus config struct from mbus_config and mbus_framefmt.
|
||||
*/
|
||||
static void fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg,
|
||||
static int fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg,
|
||||
struct v4l2_mbus_config *mbus_cfg,
|
||||
struct v4l2_mbus_framefmt *mbus_fmt)
|
||||
{
|
||||
int ret;
|
||||
|
||||
memset(csicfg, 0, sizeof(*csicfg));
|
||||
|
||||
mbus_code_to_bus_cfg(csicfg, mbus_fmt->code);
|
||||
ret = mbus_code_to_bus_cfg(csicfg, mbus_fmt->code);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
switch (mbus_cfg->type) {
|
||||
case V4L2_MBUS_PARALLEL:
|
||||
|
@ -353,6 +357,8 @@ static void fill_csi_bus_cfg(struct ipu_csi_bus_config *csicfg,
|
|||
/* will never get here, keep compiler quiet */
|
||||
break;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int ipu_csi_init_interface(struct ipu_csi *csi,
|
||||
|
@ -362,8 +368,11 @@ int ipu_csi_init_interface(struct ipu_csi *csi,
|
|||
struct ipu_csi_bus_config cfg;
|
||||
unsigned long flags;
|
||||
u32 width, height, data = 0;
|
||||
int ret;
|
||||
|
||||
fill_csi_bus_cfg(&cfg, mbus_cfg, mbus_fmt);
|
||||
ret = fill_csi_bus_cfg(&cfg, mbus_cfg, mbus_fmt);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* set default sensor frame width and height */
|
||||
width = mbus_fmt->width;
|
||||
|
@ -567,11 +576,14 @@ int ipu_csi_set_mipi_datatype(struct ipu_csi *csi, u32 vc,
|
|||
struct ipu_csi_bus_config cfg;
|
||||
unsigned long flags;
|
||||
u32 temp;
|
||||
int ret;
|
||||
|
||||
if (vc > 3)
|
||||
return -EINVAL;
|
||||
|
||||
mbus_code_to_bus_cfg(&cfg, mbus_fmt->code);
|
||||
ret = mbus_code_to_bus_cfg(&cfg, mbus_fmt->code);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
spin_lock_irqsave(&csi->lock, flags);
|
||||
|
||||
|
|
|
@ -2059,6 +2059,9 @@ static const struct hid_device_id hid_have_special_driver[] = {
|
|||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS3_CONTROLLER) },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER) },
|
||||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER) },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER_2) },
|
||||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER_2) },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER_DONGLE) },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_VAIO_VGX_MOUSE) },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_VAIO_VGP_MOUSE) },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SINO_LITE, USB_DEVICE_ID_SINO_LITE_CONTROLLER) },
|
||||
|
|
|
@ -927,6 +927,8 @@
|
|||
#define USB_DEVICE_ID_SONY_PS3_BDREMOTE 0x0306
|
||||
#define USB_DEVICE_ID_SONY_PS3_CONTROLLER 0x0268
|
||||
#define USB_DEVICE_ID_SONY_PS4_CONTROLLER 0x05c4
|
||||
#define USB_DEVICE_ID_SONY_PS4_CONTROLLER_2 0x09cc
|
||||
#define USB_DEVICE_ID_SONY_PS4_CONTROLLER_DONGLE 0x0ba0
|
||||
#define USB_DEVICE_ID_SONY_MOTION_CONTROLLER 0x03d5
|
||||
#define USB_DEVICE_ID_SONY_NAVIGATION_CONTROLLER 0x042f
|
||||
#define USB_DEVICE_ID_SONY_BUZZ_CONTROLLER 0x0002
|
||||
|
|
|
@ -2581,6 +2581,12 @@ static const struct hid_device_id sony_devices[] = {
|
|||
.driver_data = DUALSHOCK4_CONTROLLER_USB },
|
||||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER),
|
||||
.driver_data = DUALSHOCK4_CONTROLLER_BT },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER_2),
|
||||
.driver_data = DUALSHOCK4_CONTROLLER_USB },
|
||||
{ HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER_2),
|
||||
.driver_data = DUALSHOCK4_CONTROLLER_BT },
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SONY, USB_DEVICE_ID_SONY_PS4_CONTROLLER_DONGLE),
|
||||
.driver_data = DUALSHOCK4_CONTROLLER_USB },
|
||||
/* Nyko Core Controller for PS3 */
|
||||
{ HID_USB_DEVICE(USB_VENDOR_ID_SINO_LITE, USB_DEVICE_ID_SINO_LITE_CONTROLLER),
|
||||
.driver_data = SIXAXIS_CONTROLLER_USB | SINO_LITE_CONTROLLER },
|
||||
|
|
|
@ -47,8 +47,9 @@
|
|||
|
||||
/** register definition **/
|
||||
/* FFSR - 0x300 */
|
||||
#define FFSR_FT_STOPPED BIT(1)
|
||||
#define FFSR_FT_STOPPED_BIT 1
|
||||
/* FFCR - 0x304 */
|
||||
#define FFCR_FON_MAN_BIT 6
|
||||
#define FFCR_FON_MAN BIT(6)
|
||||
#define FFCR_STOP_FI BIT(12)
|
||||
|
||||
|
@ -93,9 +94,9 @@ static void tpiu_disable_hw(struct tpiu_drvdata *drvdata)
|
|||
/* Generate manual flush */
|
||||
writel_relaxed(FFCR_STOP_FI | FFCR_FON_MAN, drvdata->base + TPIU_FFCR);
|
||||
/* Wait for flush to complete */
|
||||
coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN, 0);
|
||||
coresight_timeout(drvdata->base, TPIU_FFCR, FFCR_FON_MAN_BIT, 0);
|
||||
/* Wait for formatter to stop */
|
||||
coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED, 1);
|
||||
coresight_timeout(drvdata->base, TPIU_FFSR, FFSR_FT_STOPPED_BIT, 1);
|
||||
|
||||
CS_LOCK(drvdata->base);
|
||||
}
|
||||
|
|
|
@ -107,7 +107,7 @@ static int coresight_find_link_inport(struct coresight_device *csdev,
|
|||
dev_err(&csdev->dev, "couldn't find inport, parent: %s, child: %s\n",
|
||||
dev_name(&parent->dev), dev_name(&csdev->dev));
|
||||
|
||||
return 0;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int coresight_find_link_outport(struct coresight_device *csdev,
|
||||
|
@ -125,7 +125,7 @@ static int coresight_find_link_outport(struct coresight_device *csdev,
|
|||
dev_err(&csdev->dev, "couldn't find outport, parent: %s, child: %s\n",
|
||||
dev_name(&csdev->dev), dev_name(&child->dev));
|
||||
|
||||
return 0;
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
static int coresight_enable_sink(struct coresight_device *csdev, u32 mode)
|
||||
|
@ -178,6 +178,9 @@ static int coresight_enable_link(struct coresight_device *csdev,
|
|||
else
|
||||
refport = 0;
|
||||
|
||||
if (refport < 0)
|
||||
return refport;
|
||||
|
||||
if (atomic_inc_return(&csdev->refcnt[refport]) == 1) {
|
||||
if (link_ops(csdev)->enable) {
|
||||
ret = link_ops(csdev)->enable(csdev, inport, outport);
|
||||
|
|
|
@ -135,6 +135,7 @@
|
|||
|
||||
#define SBREG_BAR 0x10
|
||||
#define SBREG_SMBCTRL 0xc6000c
|
||||
#define SBREG_SMBCTRL_DNV 0xcf000c
|
||||
|
||||
/* Host status bits for SMBPCISTS */
|
||||
#define SMBPCISTS_INTS 0x08
|
||||
|
@ -1387,7 +1388,11 @@ static void i801_add_tco(struct i801_priv *priv)
|
|||
spin_unlock(&p2sb_spinlock);
|
||||
|
||||
res = &tco_res[ICH_RES_MEM_OFF];
|
||||
res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
|
||||
if (pci_dev->device == PCI_DEVICE_ID_INTEL_DNV_SMBUS)
|
||||
res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL_DNV;
|
||||
else
|
||||
res->start = (resource_size_t)base64_addr + SBREG_SMBCTRL;
|
||||
|
||||
res->end = res->start + 3;
|
||||
res->flags = IORESOURCE_MEM;
|
||||
|
||||
|
|
|
@ -538,6 +538,7 @@ static void xiic_start_recv(struct xiic_i2c *i2c)
|
|||
{
|
||||
u8 rx_watermark;
|
||||
struct i2c_msg *msg = i2c->rx_msg = i2c->tx_msg;
|
||||
unsigned long flags;
|
||||
|
||||
/* Clear and enable Rx full interrupt. */
|
||||
xiic_irq_clr_en(i2c, XIIC_INTR_RX_FULL_MASK | XIIC_INTR_TX_ERROR_MASK);
|
||||
|
@ -553,6 +554,7 @@ static void xiic_start_recv(struct xiic_i2c *i2c)
|
|||
rx_watermark = IIC_RX_FIFO_DEPTH;
|
||||
xiic_setreg8(i2c, XIIC_RFD_REG_OFFSET, rx_watermark - 1);
|
||||
|
||||
local_irq_save(flags);
|
||||
if (!(msg->flags & I2C_M_NOSTART))
|
||||
/* write the address */
|
||||
xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
|
||||
|
@ -563,6 +565,8 @@ static void xiic_start_recv(struct xiic_i2c *i2c)
|
|||
|
||||
xiic_setreg16(i2c, XIIC_DTR_REG_OFFSET,
|
||||
msg->len | ((i2c->nmsgs == 1) ? XIIC_TX_DYN_STOP_MASK : 0));
|
||||
local_irq_restore(flags);
|
||||
|
||||
if (i2c->nmsgs == 1)
|
||||
/* very last, enable bus not busy as well */
|
||||
xiic_irq_clr_en(i2c, XIIC_INTR_BNB_MASK);
|
||||
|
|
|
@ -673,6 +673,7 @@ static int cma_resolve_ib_dev(struct rdma_id_private *id_priv)
|
|||
dgid = (union ib_gid *) &addr->sib_addr;
|
||||
pkey = ntohs(addr->sib_pkey);
|
||||
|
||||
mutex_lock(&lock);
|
||||
list_for_each_entry(cur_dev, &dev_list, list) {
|
||||
for (p = 1; p <= cur_dev->device->phys_port_cnt; ++p) {
|
||||
if (!rdma_cap_af_ib(cur_dev->device, p))
|
||||
|
@ -696,18 +697,19 @@ static int cma_resolve_ib_dev(struct rdma_id_private *id_priv)
|
|||
cma_dev = cur_dev;
|
||||
sgid = gid;
|
||||
id_priv->id.port_num = p;
|
||||
goto found;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (!cma_dev)
|
||||
return -ENODEV;
|
||||
mutex_unlock(&lock);
|
||||
return -ENODEV;
|
||||
|
||||
found:
|
||||
cma_attach_to_dev(id_priv, cma_dev);
|
||||
addr = (struct sockaddr_ib *) cma_src_addr(id_priv);
|
||||
memcpy(&addr->sib_addr, &sgid, sizeof sgid);
|
||||
mutex_unlock(&lock);
|
||||
addr = (struct sockaddr_ib *)cma_src_addr(id_priv);
|
||||
memcpy(&addr->sib_addr, &sgid, sizeof(sgid));
|
||||
cma_translate_ib(addr, &id_priv->id.route.addr.dev_addr);
|
||||
return 0;
|
||||
}
|
||||
|
@ -1409,9 +1411,16 @@ static bool cma_match_net_dev(const struct rdma_cm_id *id,
|
|||
(addr->src_addr.ss_family == AF_IB ||
|
||||
cma_protocol_roce_dev_port(id->device, port_num));
|
||||
|
||||
return !addr->dev_addr.bound_dev_if ||
|
||||
(net_eq(dev_net(net_dev), addr->dev_addr.net) &&
|
||||
addr->dev_addr.bound_dev_if == net_dev->ifindex);
|
||||
/*
|
||||
* Net namespaces must match, and if the listner is listening
|
||||
* on a specific netdevice than netdevice must match as well.
|
||||
*/
|
||||
if (net_eq(dev_net(net_dev), addr->dev_addr.net) &&
|
||||
(!!addr->dev_addr.bound_dev_if ==
|
||||
(addr->dev_addr.bound_dev_if == net_dev->ifindex)))
|
||||
return true;
|
||||
else
|
||||
return false;
|
||||
}
|
||||
|
||||
static struct rdma_id_private *cma_find_listener(
|
||||
|
|
|
@ -1258,6 +1258,12 @@ static void flush_qp(struct c4iw_qp *qhp)
|
|||
|
||||
t4_set_wq_in_error(&qhp->wq);
|
||||
if (qhp->ibqp.uobject) {
|
||||
|
||||
/* for user qps, qhp->wq.flushed is protected by qhp->mutex */
|
||||
if (qhp->wq.flushed)
|
||||
return;
|
||||
|
||||
qhp->wq.flushed = 1;
|
||||
t4_set_cq_in_error(&rchp->cq);
|
||||
spin_lock_irqsave(&rchp->comp_handler_lock, flag);
|
||||
(*rchp->ibcq.comp_handler)(&rchp->ibcq, rchp->ibcq.cq_context);
|
||||
|
|
|
@ -35,7 +35,7 @@
|
|||
|
||||
static int hns_roce_pd_alloc(struct hns_roce_dev *hr_dev, unsigned long *pdn)
|
||||
{
|
||||
return hns_roce_bitmap_alloc(&hr_dev->pd_bitmap, pdn);
|
||||
return hns_roce_bitmap_alloc(&hr_dev->pd_bitmap, pdn) ? -ENOMEM : 0;
|
||||
}
|
||||
|
||||
static void hns_roce_pd_free(struct hns_roce_dev *hr_dev, unsigned long pdn)
|
||||
|
|
|
@ -114,7 +114,10 @@ static int hns_roce_reserve_range_qp(struct hns_roce_dev *hr_dev, int cnt,
|
|||
{
|
||||
struct hns_roce_qp_table *qp_table = &hr_dev->qp_table;
|
||||
|
||||
return hns_roce_bitmap_alloc_range(&qp_table->bitmap, cnt, align, base);
|
||||
return hns_roce_bitmap_alloc_range(&qp_table->bitmap, cnt, align,
|
||||
base) ?
|
||||
-ENOMEM :
|
||||
0;
|
||||
}
|
||||
|
||||
enum hns_roce_qp_state to_hns_roce_state(enum ib_qp_state state)
|
||||
|
|
|
@ -225,9 +225,14 @@ static int hdr_check(struct rxe_pkt_info *pkt)
|
|||
goto err1;
|
||||
}
|
||||
|
||||
if (unlikely(qpn == 0)) {
|
||||
pr_warn_once("QP 0 not supported");
|
||||
goto err1;
|
||||
}
|
||||
|
||||
if (qpn != IB_MULTICAST_QPN) {
|
||||
index = (qpn == 0) ? port->qp_smi_index :
|
||||
((qpn == 1) ? port->qp_gsi_index : qpn);
|
||||
index = (qpn == 1) ? port->qp_gsi_index : qpn;
|
||||
|
||||
qp = rxe_pool_get_index(&rxe->qp_pool, index);
|
||||
if (unlikely(!qp)) {
|
||||
pr_warn_ratelimited("no qp matches qpn 0x%x\n", qpn);
|
||||
|
|
|
@ -978,7 +978,9 @@ static int send_atomic_ack(struct rxe_qp *qp, struct rxe_pkt_info *pkt,
|
|||
free_rd_atomic_resource(qp, res);
|
||||
rxe_advance_resp_resource(qp);
|
||||
|
||||
memcpy(SKB_TO_PKT(skb), &ack_pkt, sizeof(skb->cb));
|
||||
memcpy(SKB_TO_PKT(skb), &ack_pkt, sizeof(ack_pkt));
|
||||
memset((unsigned char *)SKB_TO_PKT(skb) + sizeof(ack_pkt), 0,
|
||||
sizeof(skb->cb) - sizeof(ack_pkt));
|
||||
|
||||
res->type = RXE_ATOMIC_MASK;
|
||||
res->atomic.skb = skb;
|
||||
|
|
|
@ -1009,12 +1009,14 @@ static int ipoib_cm_rep_handler(struct ib_cm_id *cm_id, struct ib_cm_event *even
|
|||
|
||||
skb_queue_head_init(&skqueue);
|
||||
|
||||
netif_tx_lock_bh(p->dev);
|
||||
spin_lock_irq(&priv->lock);
|
||||
set_bit(IPOIB_FLAG_OPER_UP, &p->flags);
|
||||
if (p->neigh)
|
||||
while ((skb = __skb_dequeue(&p->neigh->queue)))
|
||||
__skb_queue_tail(&skqueue, skb);
|
||||
spin_unlock_irq(&priv->lock);
|
||||
netif_tx_unlock_bh(p->dev);
|
||||
|
||||
while ((skb = __skb_dequeue(&skqueue))) {
|
||||
skb->dev = p->dev;
|
||||
|
|
|
@ -1671,10 +1671,11 @@ static int mxt_get_object_table(struct mxt_data *data)
|
|||
break;
|
||||
case MXT_TOUCH_MULTI_T9:
|
||||
data->multitouch = MXT_TOUCH_MULTI_T9;
|
||||
/* Only handle messages from first T9 instance */
|
||||
data->T9_reportid_min = min_id;
|
||||
data->T9_reportid_max = max_id;
|
||||
data->num_touchids = object->num_report_ids
|
||||
* mxt_obj_instances(object);
|
||||
data->T9_reportid_max = min_id +
|
||||
object->num_report_ids - 1;
|
||||
data->num_touchids = object->num_report_ids;
|
||||
break;
|
||||
case MXT_SPT_MESSAGECOUNT_T44:
|
||||
data->T44_address = object->start_address;
|
||||
|
|
|
@ -304,7 +304,7 @@ static int rohm_i2c_burst_read(struct i2c_client *client, u8 start, void *buf,
|
|||
msg[1].len = len;
|
||||
msg[1].buf = buf;
|
||||
|
||||
i2c_lock_adapter(adap);
|
||||
i2c_lock_bus(adap, I2C_LOCK_SEGMENT);
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
if (__i2c_transfer(adap, &msg[i], 1) < 0) {
|
||||
|
@ -313,7 +313,7 @@ static int rohm_i2c_burst_read(struct i2c_client *client, u8 start, void *buf,
|
|||
}
|
||||
}
|
||||
|
||||
i2c_unlock_adapter(adap);
|
||||
i2c_unlock_bus(adap, I2C_LOCK_SEGMENT);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
|
|
@ -1233,6 +1233,7 @@ static irqreturn_t arm_smmu_priq_thread(int irq, void *dev)
|
|||
|
||||
/* Sync our overflow flag, as we believe we're up to speed */
|
||||
q->cons = Q_OVF(q, q->prod) | Q_WRP(q, q->cons) | Q_IDX(q, q->cons);
|
||||
writel(q->cons, q->cons_reg);
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
|
|
|
@ -44,7 +44,7 @@ struct ipmmu_vmsa_domain {
|
|||
struct io_pgtable_ops *iop;
|
||||
|
||||
unsigned int context_id;
|
||||
spinlock_t lock; /* Protects mappings */
|
||||
struct mutex mutex; /* Protects mappings */
|
||||
};
|
||||
|
||||
struct ipmmu_vmsa_archdata {
|
||||
|
@ -464,7 +464,7 @@ static struct iommu_domain *ipmmu_domain_alloc(unsigned type)
|
|||
if (!domain)
|
||||
return NULL;
|
||||
|
||||
spin_lock_init(&domain->lock);
|
||||
mutex_init(&domain->mutex);
|
||||
|
||||
return &domain->io_domain;
|
||||
}
|
||||
|
@ -488,7 +488,6 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
|
|||
struct ipmmu_vmsa_archdata *archdata = dev->archdata.iommu;
|
||||
struct ipmmu_vmsa_device *mmu = archdata->mmu;
|
||||
struct ipmmu_vmsa_domain *domain = to_vmsa_domain(io_domain);
|
||||
unsigned long flags;
|
||||
unsigned int i;
|
||||
int ret = 0;
|
||||
|
||||
|
@ -497,7 +496,7 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
|
|||
return -ENXIO;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&domain->lock, flags);
|
||||
mutex_lock(&domain->mutex);
|
||||
|
||||
if (!domain->mmu) {
|
||||
/* The domain hasn't been used yet, initialize it. */
|
||||
|
@ -513,7 +512,7 @@ static int ipmmu_attach_device(struct iommu_domain *io_domain,
|
|||
ret = -EINVAL;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&domain->lock, flags);
|
||||
mutex_unlock(&domain->mutex);
|
||||
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
|
|
@ -215,6 +215,7 @@ static int bcm7038_l1_set_affinity(struct irq_data *d,
|
|||
return 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void bcm7038_l1_cpu_offline(struct irq_data *d)
|
||||
{
|
||||
struct cpumask *mask = irq_data_get_affinity_mask(d);
|
||||
|
@ -239,6 +240,7 @@ static void bcm7038_l1_cpu_offline(struct irq_data *d)
|
|||
}
|
||||
irq_set_affinity_locked(d, &new_affinity, false);
|
||||
}
|
||||
#endif
|
||||
|
||||
static int __init bcm7038_l1_init_one(struct device_node *dn,
|
||||
unsigned int idx,
|
||||
|
@ -291,7 +293,9 @@ static struct irq_chip bcm7038_l1_irq_chip = {
|
|||
.irq_mask = bcm7038_l1_mask,
|
||||
.irq_unmask = bcm7038_l1_unmask,
|
||||
.irq_set_affinity = bcm7038_l1_set_affinity,
|
||||
#ifdef CONFIG_SMP
|
||||
.irq_cpu_offline = bcm7038_l1_cpu_offline,
|
||||
#endif
|
||||
};
|
||||
|
||||
static int bcm7038_l1_map(struct irq_domain *d, unsigned int virq,
|
||||
|
|
|
@ -531,8 +531,9 @@ init_pmu(void)
|
|||
int timeout;
|
||||
struct adb_request req;
|
||||
|
||||
out_8(&via[B], via[B] | TREQ); /* negate TREQ */
|
||||
out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */
|
||||
/* Negate TREQ. Set TACK to input and TREQ to output. */
|
||||
out_8(&via[B], in_8(&via[B]) | TREQ);
|
||||
out_8(&via[DIRB], (in_8(&via[DIRB]) | TREQ) & ~TACK);
|
||||
|
||||
pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask);
|
||||
timeout = 100000;
|
||||
|
@ -1454,8 +1455,8 @@ pmu_sr_intr(void)
|
|||
struct adb_request *req;
|
||||
int bite = 0;
|
||||
|
||||
if (via[B] & TREQ) {
|
||||
printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]);
|
||||
if (in_8(&via[B]) & TREQ) {
|
||||
printk(KERN_ERR "PMU: spurious SR intr (%x)\n", in_8(&via[B]));
|
||||
out_8(&via[IFR], SR_INT);
|
||||
return NULL;
|
||||
}
|
||||
|
|
|
@ -454,6 +454,8 @@ static int run_complete_job(struct kcopyd_job *job)
|
|||
if (atomic_dec_and_test(&kc->nr_jobs))
|
||||
wake_up(&kc->destroyq);
|
||||
|
||||
cond_resched();
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
@ -4207,6 +4207,12 @@ static void analyse_stripe(struct stripe_head *sh, struct stripe_head_state *s)
|
|||
s->failed++;
|
||||
if (rdev && !test_bit(Faulty, &rdev->flags))
|
||||
do_recovery = 1;
|
||||
else if (!rdev) {
|
||||
rdev = rcu_dereference(
|
||||
conf->disks[i].replacement);
|
||||
if (rdev && !test_bit(Faulty, &rdev->flags))
|
||||
do_recovery = 1;
|
||||
}
|
||||
}
|
||||
}
|
||||
if (test_bit(STRIPE_SYNCING, &sh->state)) {
|
||||
|
|
|
@ -898,7 +898,10 @@ static int helene_x_pon(struct helene_priv *priv)
|
|||
helene_write_regs(priv, 0x99, cdata, sizeof(cdata));
|
||||
|
||||
/* 0x81 - 0x94 */
|
||||
data[0] = 0x18; /* xtal 24 MHz */
|
||||
if (priv->xtal == SONY_HELENE_XTAL_16000)
|
||||
data[0] = 0x10; /* xtal 16 MHz */
|
||||
else
|
||||
data[0] = 0x18; /* xtal 24 MHz */
|
||||
data[1] = (uint8_t)(0x80 | (0x04 & 0x1F)); /* 4 x 25 = 100uA */
|
||||
data[2] = (uint8_t)(0x80 | (0x26 & 0x7F)); /* 38 x 0.25 = 9.5pF */
|
||||
data[3] = 0x80; /* REFOUT signal output 500mVpp */
|
||||
|
|
|
@ -1190,6 +1190,14 @@ int tw686x_video_init(struct tw686x_dev *dev)
|
|||
return err;
|
||||
}
|
||||
|
||||
/* Initialize vc->dev and vc->ch for the error path */
|
||||
for (ch = 0; ch < max_channels(dev); ch++) {
|
||||
struct tw686x_video_channel *vc = &dev->video_channels[ch];
|
||||
|
||||
vc->dev = dev;
|
||||
vc->ch = ch;
|
||||
}
|
||||
|
||||
for (ch = 0; ch < max_channels(dev); ch++) {
|
||||
struct tw686x_video_channel *vc = &dev->video_channels[ch];
|
||||
struct video_device *vdev;
|
||||
|
@ -1198,9 +1206,6 @@ int tw686x_video_init(struct tw686x_dev *dev)
|
|||
spin_lock_init(&vc->qlock);
|
||||
INIT_LIST_HEAD(&vc->vidq_queued);
|
||||
|
||||
vc->dev = dev;
|
||||
vc->ch = ch;
|
||||
|
||||
/* default settings */
|
||||
err = tw686x_set_standard(vc, V4L2_STD_NTSC);
|
||||
if (err)
|
||||
|
|
|
@ -249,24 +249,24 @@ static void s5p_mfc_handle_frame_all_extracted(struct s5p_mfc_ctx *ctx)
|
|||
static void s5p_mfc_handle_frame_copy_time(struct s5p_mfc_ctx *ctx)
|
||||
{
|
||||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
struct s5p_mfc_buf *dst_buf, *src_buf;
|
||||
size_t dec_y_addr;
|
||||
struct s5p_mfc_buf *dst_buf, *src_buf;
|
||||
u32 dec_y_addr;
|
||||
unsigned int frame_type;
|
||||
|
||||
/* Make sure we actually have a new frame before continuing. */
|
||||
frame_type = s5p_mfc_hw_call(dev->mfc_ops, get_dec_frame_type, dev);
|
||||
if (frame_type == S5P_FIMV_DECODE_FRAME_SKIPPED)
|
||||
return;
|
||||
dec_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dec_y_adr, dev);
|
||||
dec_y_addr = (u32)s5p_mfc_hw_call(dev->mfc_ops, get_dec_y_adr, dev);
|
||||
|
||||
/* Copy timestamp / timecode from decoded src to dst and set
|
||||
appropriate flags. */
|
||||
src_buf = list_entry(ctx->src_queue.next, struct s5p_mfc_buf, list);
|
||||
list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
|
||||
if (vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0)
|
||||
== dec_y_addr) {
|
||||
dst_buf->b->timecode =
|
||||
src_buf->b->timecode;
|
||||
u32 addr = (u32)vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0);
|
||||
|
||||
if (addr == dec_y_addr) {
|
||||
dst_buf->b->timecode = src_buf->b->timecode;
|
||||
dst_buf->b->vb2_buf.timestamp =
|
||||
src_buf->b->vb2_buf.timestamp;
|
||||
dst_buf->b->flags &=
|
||||
|
@ -302,10 +302,10 @@ static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err)
|
|||
{
|
||||
struct s5p_mfc_dev *dev = ctx->dev;
|
||||
struct s5p_mfc_buf *dst_buf;
|
||||
size_t dspl_y_addr;
|
||||
u32 dspl_y_addr;
|
||||
unsigned int frame_type;
|
||||
|
||||
dspl_y_addr = s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev);
|
||||
dspl_y_addr = (u32)s5p_mfc_hw_call(dev->mfc_ops, get_dspl_y_adr, dev);
|
||||
if (IS_MFCV6_PLUS(dev))
|
||||
frame_type = s5p_mfc_hw_call(dev->mfc_ops,
|
||||
get_disp_frame_type, ctx);
|
||||
|
@ -324,9 +324,10 @@ static void s5p_mfc_handle_frame_new(struct s5p_mfc_ctx *ctx, unsigned int err)
|
|||
/* The MFC returns address of the buffer, now we have to
|
||||
* check which videobuf does it correspond to */
|
||||
list_for_each_entry(dst_buf, &ctx->dst_queue, list) {
|
||||
u32 addr = (u32)vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0);
|
||||
|
||||
/* Check if this is the buffer we're looking for */
|
||||
if (vb2_dma_contig_plane_dma_addr(&dst_buf->b->vb2_buf, 0)
|
||||
== dspl_y_addr) {
|
||||
if (addr == dspl_y_addr) {
|
||||
list_del(&dst_buf->list);
|
||||
ctx->dst_queue_cnt--;
|
||||
dst_buf->b->sequence = ctx->sequence;
|
||||
|
|
|
@ -1375,6 +1375,11 @@ int vb2_core_qbuf(struct vb2_queue *q, unsigned int index, void *pb)
|
|||
struct vb2_buffer *vb;
|
||||
int ret;
|
||||
|
||||
if (q->error) {
|
||||
dprintk(1, "fatal error occurred on queue\n");
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
vb = q->bufs[index];
|
||||
|
||||
switch (vb->state) {
|
||||
|
|
|
@ -146,14 +146,14 @@ int pm860x_page_reg_write(struct i2c_client *i2c, int reg,
|
|||
unsigned char zero;
|
||||
int ret;
|
||||
|
||||
i2c_lock_adapter(i2c->adapter);
|
||||
i2c_lock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
|
||||
read_device(i2c, 0xFA, 0, &zero);
|
||||
read_device(i2c, 0xFB, 0, &zero);
|
||||
read_device(i2c, 0xFF, 0, &zero);
|
||||
ret = write_device(i2c, reg, 1, &data);
|
||||
read_device(i2c, 0xFE, 0, &zero);
|
||||
read_device(i2c, 0xFC, 0, &zero);
|
||||
i2c_unlock_adapter(i2c->adapter);
|
||||
i2c_unlock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(pm860x_page_reg_write);
|
||||
|
@ -164,14 +164,14 @@ int pm860x_page_bulk_read(struct i2c_client *i2c, int reg,
|
|||
unsigned char zero = 0;
|
||||
int ret;
|
||||
|
||||
i2c_lock_adapter(i2c->adapter);
|
||||
i2c_lock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
|
||||
read_device(i2c, 0xfa, 0, &zero);
|
||||
read_device(i2c, 0xfb, 0, &zero);
|
||||
read_device(i2c, 0xff, 0, &zero);
|
||||
ret = read_device(i2c, reg, count, buf);
|
||||
read_device(i2c, 0xFE, 0, &zero);
|
||||
read_device(i2c, 0xFC, 0, &zero);
|
||||
i2c_unlock_adapter(i2c->adapter);
|
||||
i2c_unlock_bus(i2c->adapter, I2C_LOCK_SEGMENT);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(pm860x_page_bulk_read);
|
||||
|
|
|
@ -714,6 +714,7 @@ sm501_create_subdev(struct sm501_devdata *sm, char *name,
|
|||
smdev->pdev.name = name;
|
||||
smdev->pdev.id = sm->pdev_id;
|
||||
smdev->pdev.dev.parent = sm->dev;
|
||||
smdev->pdev.dev.coherent_dma_mask = 0xffffffff;
|
||||
|
||||
if (res_count) {
|
||||
smdev->pdev.resource = (struct resource *)(smdev+1);
|
||||
|
|
|
@ -209,14 +209,13 @@ static int ti_tscadc_probe(struct platform_device *pdev)
|
|||
* The TSC_ADC_SS controller design assumes the OCP clock is
|
||||
* at least 6x faster than the ADC clock.
|
||||
*/
|
||||
clk = clk_get(&pdev->dev, "adc_tsc_fck");
|
||||
clk = devm_clk_get(&pdev->dev, "adc_tsc_fck");
|
||||
if (IS_ERR(clk)) {
|
||||
dev_err(&pdev->dev, "failed to get TSC fck\n");
|
||||
err = PTR_ERR(clk);
|
||||
goto err_disable_clk;
|
||||
}
|
||||
clock_rate = clk_get_rate(clk);
|
||||
clk_put(clk);
|
||||
tscadc->clk_div = clock_rate / ADC_CLK;
|
||||
|
||||
/* TSCADC_CLKDIV needs to be configured to the value minus 1 */
|
||||
|
|
|
@ -27,6 +27,7 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/sysfs.h>
|
||||
#include <linux/nospec.h>
|
||||
|
||||
static DEFINE_MUTEX(compass_mutex);
|
||||
|
||||
|
@ -50,6 +51,7 @@ static int compass_store(struct device *dev, const char *buf, size_t count,
|
|||
return ret;
|
||||
if (val >= strlen(map))
|
||||
return -EINVAL;
|
||||
val = array_index_nospec(val, strlen(map));
|
||||
mutex_lock(&compass_mutex);
|
||||
ret = compass_command(c, map[val]);
|
||||
mutex_unlock(&compass_mutex);
|
||||
|
|
|
@ -178,7 +178,7 @@ static int mei_nfc_if_version(struct mei_cl *cl,
|
|||
|
||||
ret = 0;
|
||||
bytes_recv = __mei_cl_recv(cl, (u8 *)reply, if_version_length);
|
||||
if (bytes_recv < if_version_length) {
|
||||
if (bytes_recv < 0 || bytes_recv < if_version_length) {
|
||||
dev_err(bus->dev, "Could not read IF version\n");
|
||||
ret = -EIO;
|
||||
goto err;
|
||||
|
|
|
@ -1137,15 +1137,18 @@ int mei_hbm_dispatch(struct mei_device *dev, struct mei_msg_hdr *hdr)
|
|||
|
||||
props_res = (struct hbm_props_response *)mei_msg;
|
||||
|
||||
if (props_res->status) {
|
||||
if (props_res->status == MEI_HBMS_CLIENT_NOT_FOUND) {
|
||||
dev_dbg(dev->dev, "hbm: properties response: %d CLIENT_NOT_FOUND\n",
|
||||
props_res->me_addr);
|
||||
} else if (props_res->status) {
|
||||
dev_err(dev->dev, "hbm: properties response: wrong status = %d %s\n",
|
||||
props_res->status,
|
||||
mei_hbm_status_str(props_res->status));
|
||||
return -EPROTO;
|
||||
} else {
|
||||
mei_hbm_me_cl_add(dev, props_res);
|
||||
}
|
||||
|
||||
mei_hbm_me_cl_add(dev, props_res);
|
||||
|
||||
/* request property for the next client */
|
||||
if (mei_hbm_prop_req(dev, props_res->me_addr + 1))
|
||||
return -EIO;
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue