brain-hackers_pepepper-mirror
/
linux-brain
mirror of https://github.com/brain-hackers/linux-brain.git
1
0
Fork 0
Code Issues Projects Releases Wiki Activity

This is the 4.9.75 stable release 

-----BEGIN PGP SIGNATURE-----
 
 iQIzBAABCAAdFiEEZH8oZUiU471FcZm+ONu9yGCSaT4FAlpPj9UACgkQONu9yGCS
 aT6W6A/9HYNDiavWc0w5W96jQKBATh/AbvqULeT7F37Gwp9XRihYqUkHYJlCqtLr
 QiY67DrN08MwNYxq5iXWlG++UJJcG7hE0nWDIuF1WJwsbBVBFuaqeiQWyudkpEXB
 aTF+pmKaVx9crlbWHtwYZEPM4qwT22zxZEEka+DYggTuF7IwvfSYC0GQ3oHvSGcq
 e+iChj72ELtymyo4NxWNndm2wxRkVRdiwRmmFriV7vT4B7QkpmNMYnCODBylyJ1J
 iWD6q4Hv8PsNa9z/Es+v09x0DvTJgexGNsLh6kSCJ+ajiLhw9aEAgqBSlEZANUVm
 p4dNg3POgsry3JCFGb4R9WDSpD7I98xQCeVKccZr7yKAo1gw+h274wV9VnsReoUI
 91MT9VQZDqNnWQFLTC9+k3Cv1UibrDz5hI/m3/foNN3NP8z8xXdsCMMwLVRwSlOP
 ZAGV9yVgA0Hko6457FenUTWfCDVyMBf8monEZ0YWxucAW8ihh/EovmmJMNIxhlWX
 oJsuNwf/zYOxoYIm1Z551RtOxvH84axSHtrPrS47bLggK09IWomfeDwOZv4ZQrIK
 L2LXc5uFlMS7z359paNK8NyvraTFrZ7j5X8RvegZRgKq/T3Qp0jwqu6lxyY8q5hH
 os13s63QBvqdPZm1G3nc5/89oR976k+yW9hhZqwG7qi1XCPuU/k=
 =vqC6
 -----END PGP SIGNATURE-----

Merge tag 'v4.9.75' into 4.9.x+fslc

This is the 4.9.75 stable release

* tag 'v4.9.75': (1351 commits)
  Linux 4.9.75
  kaiser: Set _PAGE_NX only if supported
  KPTI: Report when enabled
  KPTI: Rename to PAGE_TABLE_ISOLATION
  x86/kaiser: Move feature detection up
  kaiser: disabled on Xen PV
  x86/kaiser: Reenable PARAVIRT
  x86/paravirt: Dont patch flush_tlb_single
  kaiser: kaiser_flush_tlb_on_return_to_user() check PCID
  kaiser: asm/tlbflush.h handle noPGE at lower level
  kaiser: drop is_atomic arg to kaiser_pagetable_walk()
  kaiser: use ALTERNATIVE instead of x86_cr3_pcid_noflush
  x86/kaiser: Check boottime cmdline params
  x86/kaiser: Rename and simplify X86_FEATURE_KAISER handling
  kaiser: add "nokaiser" boot option, using ALTERNATIVE
  kaiser: fix unlikely error in alloc_ldt_struct()
  kaiser: kaiser_remove_mapping() move along the pgd
  kaiser: paranoid_entry pass cr3 need to paranoid_exit
  kaiser: x86_cr3_pcid_noflush and x86_cr3_pcid_user
  kaiser: PCID 0 for kernel and 128 for user
  ...
This commit is contained in:
Otavio Salvador 2018-01-09 14:11:19 -02:00
parent 6b0fd61e1b 9f74755895
commit 7c5fe81ab0
1218 changed files with 11478 additions and 5586 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
Documentation/devicetree/bindings/arm/arch_timer.txt
View File

@ -31,6 +31,12 @@ to deliver its interrupts via SPIs.
This also affects writes to the tval register, due to the implicit This also affects writes to the tval register, due to the implicit
counter read. counter read.
- hisilicon,erratum-161010101 : A boolean property. Indicates the
presence of Hisilicon erratum 161010101, which says that reading the
counters is unreliable in some cases, and reads may return a value 32
beyond the correct value. This also affects writes to the tval
registers, due to the implicit counter read.
** Optional properties: ** Optional properties:
- arm,cpu-registers-not-fw-configured : Firmware does not initialize - arm,cpu-registers-not-fw-configured : Firmware does not initialize

1
Documentation/devicetree/bindings/clock/qoriq-clock.txt
View File

@ -31,6 +31,7 @@ Required properties:
* "fsl,t4240-clockgen" * "fsl,t4240-clockgen"
* "fsl,b4420-clockgen" * "fsl,b4420-clockgen"
* "fsl,b4860-clockgen" * "fsl,b4860-clockgen"
* "fsl,ls1012a-clockgen"
* "fsl,ls1021a-clockgen" * "fsl,ls1021a-clockgen"
Chassis-version clock strings include: Chassis-version clock strings include:
* "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks

4
Documentation/devicetree/bindings/hwmon/jc42.txt
View File

@ -34,6 +34,10 @@ Required properties:
- reg: I2C address - reg: I2C address
Optional properties:
- smbus-timeout-disable: When set, the smbus timeout function will be disabled.
This is not supported on all chips.
Example: Example:
temp-sensor@1a { temp-sensor@1a {

2
Documentation/devicetree/bindings/usb/usb-device.txt
View File

@ -11,7 +11,7 @@ Required properties:
be used, but a device adhering to this binding may leave out all except be used, but a device adhering to this binding may leave out all except
for usbVID,PID. for usbVID,PID.
- reg: the port number which this device is connecting to, the range - reg: the port number which this device is connecting to, the range
is 1-31. is 1-255.
Example: Example:

10
Documentation/kernel-parameters.txt
View File

@ -2763,6 +2763,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
nojitter [IA-64] Disables jitter checking for ITC timers. nojitter [IA-64] Disables jitter checking for ITC timers.
nopti [X86-64] Disable KAISER isolation of kernel from user.
no-kvmclock [X86,KVM] Disable paravirtualized KVM clock driver no-kvmclock [X86,KVM] Disable paravirtualized KVM clock driver
no-kvmapf [X86,KVM] Disable paravirtualized asynchronous page no-kvmapf [X86,KVM] Disable paravirtualized asynchronous page
@ -2795,6 +2797,8 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
nopat [X86] Disable PAT (page attribute table extension of nopat [X86] Disable PAT (page attribute table extension of
pagetables) support. pagetables) support.
nopcid [X86-64] Disable the PCID cpu feature.
norandmaps Don't use address space randomization. Equivalent to norandmaps Don't use address space randomization. Equivalent to
echo 0 > /proc/sys/kernel/randomize_va_space echo 0 > /proc/sys/kernel/randomize_va_space
@ -3323,6 +3327,12 @@ bytes respectively. Such letter suffixes can also be entirely omitted.
pt. [PARIDE] pt. [PARIDE]
See Documentation/blockdev/paride.txt. See Documentation/blockdev/paride.txt.
pti= [X86_64]
Control KAISER user/kernel address space isolation:
on - enable
off - disable
auto - default setting
pty.legacy_count= pty.legacy_count=
[KNL] Number of legacy pty's. Overwrites compiled-in [KNL] Number of legacy pty's. Overwrites compiled-in
default number. default number.

26
Makefile
View File

@ -1,6 +1,6 @@
VERSION = 4 VERSION = 4
PATCHLEVEL = 9 PATCHLEVEL = 9
SUBLEVEL = 55 SUBLEVEL = 75
EXTRAVERSION = EXTRAVERSION =
NAME = Roaring Lionus NAME = Roaring Lionus
@ -370,9 +370,6 @@ LDFLAGS_MODULE =
CFLAGS_KERNEL = CFLAGS_KERNEL =
AFLAGS_KERNEL = AFLAGS_KERNEL =
LDFLAGS_vmlinux = LDFLAGS_vmlinux =
CFLAGS_GCOV := -fprofile-arcs -ftest-coverage -fno-tree-loop-im $(call cc-disable-warning,maybe-uninitialized,)
CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,)
# Use USERINCLUDE when you must reference the UAPI directories only. # Use USERINCLUDE when you must reference the UAPI directories only.
USERINCLUDE := \ USERINCLUDE := \
@ -393,21 +390,19 @@ LINUXINCLUDE := \
LINUXINCLUDE += $(filter-out $(LINUXINCLUDE),$(USERINCLUDE)) LINUXINCLUDE += $(filter-out $(LINUXINCLUDE),$(USERINCLUDE))
KBUILD_CPPFLAGS := -D__KERNEL__ KBUILD_AFLAGS := -D__ASSEMBLY__
KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \
-fno-strict-aliasing -fno-common \ -fno-strict-aliasing -fno-common \
-Werror-implicit-function-declaration \ -Werror-implicit-function-declaration \
-Wno-format-security \ -Wno-format-security \
-std=gnu89 $(call cc-option,-fno-PIE) -std=gnu89
KBUILD_CPPFLAGS := -D__KERNEL__
KBUILD_AFLAGS_KERNEL := KBUILD_AFLAGS_KERNEL :=
KBUILD_CFLAGS_KERNEL := KBUILD_CFLAGS_KERNEL :=
KBUILD_AFLAGS := -D__ASSEMBLY__ $(call cc-option,-fno-PIE)
KBUILD_AFLAGS_MODULE := -DMODULE KBUILD_AFLAGS_MODULE := -DMODULE
KBUILD_CFLAGS_MODULE := -DMODULE KBUILD_CFLAGS_MODULE := -DMODULE
KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds KBUILD_LDFLAGS_MODULE := -T $(srctree)/scripts/module-common.lds
GCC_PLUGINS_CFLAGS :=
# Read KERNELRELEASE from include/config/kernel.release (if it exists) # Read KERNELRELEASE from include/config/kernel.release (if it exists)
KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null)
@ -420,7 +415,7 @@ export MAKE AWK GENKSYMS INSTALLKERNEL PERL PYTHON UTS_MACHINE
export HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS export HOSTCXX HOSTCXXFLAGS LDFLAGS_MODULE CHECK CHECKFLAGS
export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS LDFLAGS export KBUILD_CPPFLAGS NOSTDINC_FLAGS LINUXINCLUDE OBJCOPYFLAGS LDFLAGS
export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE CFLAGS_GCOV CFLAGS_KCOV CFLAGS_KASAN CFLAGS_UBSAN export KBUILD_CFLAGS CFLAGS_KERNEL CFLAGS_MODULE CFLAGS_KASAN CFLAGS_UBSAN
export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE export KBUILD_AFLAGS AFLAGS_KERNEL AFLAGS_MODULE
export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE export KBUILD_AFLAGS_MODULE KBUILD_CFLAGS_MODULE KBUILD_LDFLAGS_MODULE
export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL export KBUILD_AFLAGS_KERNEL KBUILD_CFLAGS_KERNEL
@ -620,6 +615,12 @@ endif
# Defaults to vmlinux, but the arch makefile usually adds further targets # Defaults to vmlinux, but the arch makefile usually adds further targets
all: vmlinux all: vmlinux
KBUILD_CFLAGS += $(call cc-option,-fno-PIE)
KBUILD_AFLAGS += $(call cc-option,-fno-PIE)
CFLAGS_GCOV := -fprofile-arcs -ftest-coverage -fno-tree-loop-im $(call cc-disable-warning,maybe-uninitialized,)
CFLAGS_KCOV := $(call cc-option,-fsanitize-coverage=trace-pc,)
export CFLAGS_GCOV CFLAGS_KCOV
# The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default # The arch Makefile can set ARCH_{CPP,A,C}FLAGS to override the default
# values of the respective KBUILD_* variables # values of the respective KBUILD_* variables
ARCH_CPPFLAGS := ARCH_CPPFLAGS :=
@ -787,6 +788,9 @@ KBUILD_CFLAGS += $(call cc-disable-warning, pointer-sign)
# disable invalid "can't wrap" optimizations for signed / pointers # disable invalid "can't wrap" optimizations for signed / pointers
KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow) KBUILD_CFLAGS += $(call cc-option,-fno-strict-overflow)
# Make sure -fstack-check isn't enabled (like gentoo apparently did)
KBUILD_CFLAGS += $(call cc-option,-fno-stack-check,)
# conserve stack if available # conserve stack if available
KBUILD_CFLAGS += $(call cc-option,-fconserve-stack) KBUILD_CFLAGS += $(call cc-option,-fconserve-stack)

1
arch/arm/boot/dts/am335x-evmsk.dts
View File

@ -668,6 +668,7 @@
ti,non-removable; ti,non-removable;
bus-width = <4>; bus-width = <4>;
cap-power-off-card; cap-power-off-card;
keep-power-in-suspend;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>; pinctrl-0 = <&mmc2_pins>;

3
arch/arm/boot/dts/am33xx.dtsi
View File

@ -143,10 +143,11 @@
}; };
scm_conf: scm_conf@0 { scm_conf: scm_conf@0 {
compatible = "syscon"; compatible = "syscon", "simple-bus";
reg = <0x0 0x800>; reg = <0x0 0x800>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 0x800>;
scm_clocks: clocks { scm_clocks: clocks {
#address-cells = <1>; #address-cells = <1>;

4
arch/arm/boot/dts/armada-375.dtsi
View File

@ -176,9 +176,9 @@
reg = <0x8000 0x1000>; reg = <0x8000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,double-linefill-incr = <1>; arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <0>; arm,double-linefill-wrap = <0>;
arm,double-linefill = <1>; arm,double-linefill = <0>;
prefetch-data = <1>; prefetch-data = <1>;
}; };

4
arch/arm/boot/dts/armada-38x.dtsi
View File

@ -143,9 +143,9 @@
reg = <0x8000 0x1000>; reg = <0x8000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,double-linefill-incr = <1>; arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <0>; arm,double-linefill-wrap = <0>;
arm,double-linefill = <1>; arm,double-linefill = <0>;
prefetch-data = <1>; prefetch-data = <1>;
}; };

4
arch/arm/boot/dts/armada-39x.dtsi
View File

@ -111,9 +111,9 @@
reg = <0x8000 0x1000>; reg = <0x8000 0x1000>;
cache-unified; cache-unified;
cache-level = <2>; cache-level = <2>;
arm,double-linefill-incr = <1>; arm,double-linefill-incr = <0>;
arm,double-linefill-wrap = <0>; arm,double-linefill-wrap = <0>;
arm,double-linefill = <1>; arm,double-linefill = <0>;
prefetch-data = <1>; prefetch-data = <1>;
}; };

9
arch/arm/boot/dts/dm814x.dtsi
View File

@ -252,7 +252,7 @@
}; };
uart1: uart@20000 { uart1: uart@20000 {
compatible = "ti,omap3-uart"; compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart1"; ti,hwmods = "uart1";
reg = <0x20000 0x2000>; reg = <0x20000 0x2000>;
clock-frequency = <48000000>; clock-frequency = <48000000>;
@ -262,7 +262,7 @@
}; };
uart2: uart@22000 { uart2: uart@22000 {
compatible = "ti,omap3-uart"; compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart2"; ti,hwmods = "uart2";
reg = <0x22000 0x2000>; reg = <0x22000 0x2000>;
clock-frequency = <48000000>; clock-frequency = <48000000>;
@ -272,7 +272,7 @@
}; };
uart3: uart@24000 { uart3: uart@24000 {
compatible = "ti,omap3-uart"; compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart3"; ti,hwmods = "uart3";
reg = <0x24000 0x2000>; reg = <0x24000 0x2000>;
clock-frequency = <48000000>; clock-frequency = <48000000>;
@ -332,10 +332,11 @@
ranges = <0 0x140000 0x20000>; ranges = <0 0x140000 0x20000>;
scm_conf: scm_conf@0 { scm_conf: scm_conf@0 {
compatible = "syscon"; compatible = "syscon", "simple-bus";
reg = <0x0 0x800>; reg = <0x0 0x800>;
#address-cells = <1>; #address-cells = <1>;
#size-cells = <1>; #size-cells = <1>;
ranges = <0 0 0x800>;
scm_clocks: clocks { scm_clocks: clocks {
#address-cells = <1>; #address-cells = <1>;

6
arch/arm/boot/dts/dm816x.dtsi
View File

@ -371,7 +371,7 @@
}; };
uart1: uart@48020000 { uart1: uart@48020000 {
compatible = "ti,omap3-uart"; compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart1"; ti,hwmods = "uart1";
reg = <0x48020000 0x2000>; reg = <0x48020000 0x2000>;
clock-frequency = <48000000>; clock-frequency = <48000000>;
@ -381,7 +381,7 @@
}; };
uart2: uart@48022000 { uart2: uart@48022000 {
compatible = "ti,omap3-uart"; compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart2"; ti,hwmods = "uart2";
reg = <0x48022000 0x2000>; reg = <0x48022000 0x2000>;
clock-frequency = <48000000>; clock-frequency = <48000000>;
@ -391,7 +391,7 @@
}; };
uart3: uart@48024000 { uart3: uart@48024000 {
compatible = "ti,omap3-uart"; compatible = "ti,am3352-uart", "ti,omap3-uart";
ti,hwmods = "uart3"; ti,hwmods = "uart3";
reg = <0x48024000 0x2000>; reg = <0x48024000 0x2000>;
clock-frequency = <48000000>; clock-frequency = <48000000>;

2
arch/arm/boot/dts/dra7.dtsi
View File

@ -282,6 +282,7 @@
device_type = "pci"; device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000 ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x20013000 0x13000 0 0xffed000>; 0x82000000 0 0x20013000 0x13000 0 0xffed000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
num-lanes = <1>; num-lanes = <1>;
linux,pci-domain = <0>; linux,pci-domain = <0>;
@ -318,6 +319,7 @@
device_type = "pci"; device_type = "pci";
ranges = <0x81000000 0 0 0x03000 0 0x00010000 ranges = <0x81000000 0 0 0x03000 0 0x00010000
0x82000000 0 0x30013000 0x13000 0 0xffed000>; 0x82000000 0 0x30013000 0x13000 0 0xffed000>;
bus-range = <0x00 0xff>;
#interrupt-cells = <1>; #interrupt-cells = <1>;
num-lanes = <1>; num-lanes = <1>;
linux,pci-domain = <1>; linux,pci-domain = <1>;

8
arch/arm/boot/dts/logicpd-torpedo-37xx-devkit.dts
View File

@ -192,7 +192,7 @@
interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>; interrupts-extended = <&intc 83 &omap3_pmx_core 0x11a>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins &mmc1_cd>; pinctrl-0 = <&mmc1_pins &mmc1_cd>;
cd-gpios = <&gpio4 31 IRQ_TYPE_LEVEL_LOW>; /* gpio127 */ cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio127 */
vmmc-supply = <&vmmc1>; vmmc-supply = <&vmmc1>;
bus-width = <4>; bus-width = <4>;
cap-power-off-card; cap-power-off-card;
@ -249,9 +249,9 @@
OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */ OMAP3_CORE1_IOPAD(0x2110, PIN_INPUT | MUX_MODE0) /* cam_xclka.cam_xclka */
OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */ OMAP3_CORE1_IOPAD(0x2112, PIN_INPUT | MUX_MODE0) /* cam_pclk.cam_pclk */
OMAP3_CORE1_IOPAD(0x2114, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */ OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d0.cam_d0 */
OMAP3_CORE1_IOPAD(0x2116, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */ OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d1.cam_d1 */
OMAP3_CORE1_IOPAD(0x2118, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */ OMAP3_CORE1_IOPAD(0x211a, PIN_INPUT | MUX_MODE0) /* cam_d2.cam_d2 */
OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */ OMAP3_CORE1_IOPAD(0x211c, PIN_INPUT | MUX_MODE0) /* cam_d3.cam_d3 */
OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */ OMAP3_CORE1_IOPAD(0x211e, PIN_INPUT | MUX_MODE0) /* cam_d4.cam_d4 */
OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */ OMAP3_CORE1_IOPAD(0x2120, PIN_INPUT | MUX_MODE0) /* cam_d5.cam_d5 */

21
arch/arm/boot/dts/omap5-uevm.dts
View File

@ -18,6 +18,10 @@
reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */ reg = <0 0x80000000 0 0x7f000000>; /* 2032 MB */
}; };
aliases {
ethernet = &ethernet;
};
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
led1 { led1 {
@ -72,6 +76,23 @@
>; >;
}; };
&usbhsehci {
#address-cells = <1>;
#size-cells = <0>;
hub@2 {
compatible = "usb424,3503";
reg = <2>;
#address-cells = <1>;
#size-cells = <0>;
};
ethernet: usbether@3 {
compatible = "usb424,9730";
reg = <3>;
};
};
&wlcore { &wlcore {
compatible = "ti,wl1837"; compatible = "ti,wl1837";
}; };

2
arch/arm/boot/dts/stih410.dtsi
View File

@ -131,7 +131,7 @@
<&clk_s_d2_quadfs 0>; <&clk_s_d2_quadfs 0>;
assigned-clock-rates = <297000000>, assigned-clock-rates = <297000000>,
<108000000>, <297000000>,
<0>, <0>,
<400000000>, <400000000>,
<400000000>; <400000000>;

1
arch/arm/configs/omap2plus_defconfig
View File

@ -216,6 +216,7 @@ CONFIG_SERIO=m
CONFIG_SERIAL_8250=y CONFIG_SERIAL_8250=y
CONFIG_SERIAL_8250_CONSOLE=y CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_NR_UARTS=32 CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=6
CONFIG_SERIAL_8250_EXTENDED=y CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y CONFIG_SERIAL_8250_SHARE_IRQ=y

6
arch/arm/crypto/aesbs-glue.c
View File

@ -363,7 +363,7 @@ static struct crypto_alg aesbs_algs[] = { {
}, { }, {
.cra_name = "cbc(aes)", .cra_name = "cbc(aes)",
.cra_driver_name = "cbc-aes-neonbs", .cra_driver_name = "cbc-aes-neonbs",
.cra_priority = 300, .cra_priority = 250,
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
.cra_blocksize = AES_BLOCK_SIZE, .cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct async_helper_ctx), .cra_ctxsize = sizeof(struct async_helper_ctx),
@ -383,7 +383,7 @@ static struct crypto_alg aesbs_algs[] = { {
}, { }, {
.cra_name = "ctr(aes)", .cra_name = "ctr(aes)",
.cra_driver_name = "ctr-aes-neonbs", .cra_driver_name = "ctr-aes-neonbs",
.cra_priority = 300, .cra_priority = 250,
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
.cra_blocksize = 1, .cra_blocksize = 1,
.cra_ctxsize = sizeof(struct async_helper_ctx), .cra_ctxsize = sizeof(struct async_helper_ctx),
@ -403,7 +403,7 @@ static struct crypto_alg aesbs_algs[] = { {
}, { }, {
.cra_name = "xts(aes)", .cra_name = "xts(aes)",
.cra_driver_name = "xts-aes-neonbs", .cra_driver_name = "xts-aes-neonbs",
.cra_priority = 300, .cra_priority = 250,
.cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC, .cra_flags = CRYPTO_ALG_TYPE_ABLKCIPHER|CRYPTO_ALG_ASYNC,
.cra_blocksize = AES_BLOCK_SIZE, .cra_blocksize = AES_BLOCK_SIZE,
.cra_ctxsize = sizeof(struct async_helper_ctx), .cra_ctxsize = sizeof(struct async_helper_ctx),

1
arch/arm/include/asm/Kbuild
View File

@ -37,4 +37,3 @@ generic-y += termbits.h
generic-y += termios.h generic-y += termios.h
generic-y += timex.h generic-y += timex.h
generic-y += trace_clock.h generic-y += trace_clock.h
generic-y += unaligned.h

18
arch/arm/include/asm/assembler.h
View File

@ -516,4 +516,22 @@ THUMB( orr \reg , \reg , #PSR_T_BIT )
#endif #endif
.endm .endm
.macro bug, msg, line
#ifdef CONFIG_THUMB2_KERNEL
1: .inst 0xde02
#else
1: .inst 0xe7f001f2
#endif
#ifdef CONFIG_DEBUG_BUGVERBOSE
.pushsection .rodata.str, "aMS", %progbits, 1
2: .asciz "\msg"
.popsection
.pushsection __bug_table, "aw"
.align 2
.word 1b, 2b
.hword \line
.popsection
#endif
.endm
#endif /* __ASM_ASSEMBLER_H__ */ #endif /* __ASM_ASSEMBLER_H__ */

4
arch/arm/include/asm/kvm_arm.h
View File

@ -161,8 +161,7 @@
#else #else
#define VTTBR_X (5 - KVM_T0SZ) #define VTTBR_X (5 - KVM_T0SZ)
#endif #endif
#define VTTBR_BADDR_SHIFT (VTTBR_X - 1) #define VTTBR_BADDR_MASK (((_AC(1, ULL) << (40 - VTTBR_X)) - 1) << VTTBR_X)
#define VTTBR_BADDR_MASK (((_AC(1, ULL) << (40 - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT)
#define VTTBR_VMID_SHIFT _AC(48, ULL) #define VTTBR_VMID_SHIFT _AC(48, ULL)
#define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT) #define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT)
@ -209,6 +208,7 @@
#define HSR_EC_IABT_HYP (0x21) #define HSR_EC_IABT_HYP (0x21)
#define HSR_EC_DABT (0x24) #define HSR_EC_DABT (0x24)
#define HSR_EC_DABT_HYP (0x25) #define HSR_EC_DABT_HYP (0x25)
#define HSR_EC_MAX (0x3f)
#define HSR_WFI_IS_WFE (_AC(1, UL) << 0) #define HSR_WFI_IS_WFE (_AC(1, UL) << 0)

44
arch/arm/include/asm/uaccess.h
View File

@ -478,11 +478,10 @@ extern unsigned long __must_check
arm_copy_from_user(void *to, const void __user *from, unsigned long n); arm_copy_from_user(void *to, const void __user *from, unsigned long n);
static inline unsigned long __must_check static inline unsigned long __must_check
__copy_from_user(void *to, const void __user *from, unsigned long n) __arch_copy_from_user(void *to, const void __user *from, unsigned long n)
{ {
unsigned int __ua_flags; unsigned int __ua_flags;
check_object_size(to, n, false);
__ua_flags = uaccess_save_and_enable(); __ua_flags = uaccess_save_and_enable();
n = arm_copy_from_user(to, from, n); n = arm_copy_from_user(to, from, n);
uaccess_restore(__ua_flags); uaccess_restore(__ua_flags);
@ -495,18 +494,15 @@ extern unsigned long __must_check
__copy_to_user_std(void __user *to, const void *from, unsigned long n); __copy_to_user_std(void __user *to, const void *from, unsigned long n);
static inline unsigned long __must_check static inline unsigned long __must_check
__copy_to_user(void __user *to, const void *from, unsigned long n) __arch_copy_to_user(void __user *to, const void *from, unsigned long n)
{ {
#ifndef CONFIG_UACCESS_WITH_MEMCPY #ifndef CONFIG_UACCESS_WITH_MEMCPY
unsigned int __ua_flags; unsigned int __ua_flags;
check_object_size(from, n, true);
__ua_flags = uaccess_save_and_enable(); __ua_flags = uaccess_save_and_enable();
n = arm_copy_to_user(to, from, n); n = arm_copy_to_user(to, from, n);
uaccess_restore(__ua_flags); uaccess_restore(__ua_flags);
return n; return n;
#else #else
check_object_size(from, n, true);
return arm_copy_to_user(to, from, n); return arm_copy_to_user(to, from, n);
#endif #endif
} }
@ -526,25 +522,49 @@ __clear_user(void __user *addr, unsigned long n)
} }
#else #else
#define __copy_from_user(to, from, n) (memcpy(to, (void __force *)from, n), 0) #define __arch_copy_from_user(to, from, n) \
#define __copy_to_user(to, from, n) (memcpy((void __force *)to, from, n), 0) (memcpy(to, (void __force *)from, n), 0)
#define __arch_copy_to_user(to, from, n) \
(memcpy((void __force *)to, from, n), 0)
#define __clear_user(addr, n) (memset((void __force *)addr, 0, n), 0) #define __clear_user(addr, n) (memset((void __force *)addr, 0, n), 0)
#endif #endif
static inline unsigned long __must_check copy_from_user(void *to, const void __user *from, unsigned long n) static inline unsigned long __must_check
__copy_from_user(void *to, const void __user *from, unsigned long n)
{
check_object_size(to, n, false);
return __arch_copy_from_user(to, from, n);
}
static inline unsigned long __must_check
copy_from_user(void *to, const void __user *from, unsigned long n)
{ {
unsigned long res = n; unsigned long res = n;
check_object_size(to, n, false);
if (likely(access_ok(VERIFY_READ, from, n))) if (likely(access_ok(VERIFY_READ, from, n)))
res = __copy_from_user(to, from, n); res = __arch_copy_from_user(to, from, n);
if (unlikely(res)) if (unlikely(res))
memset(to + (n - res), 0, res); memset(to + (n - res), 0, res);
return res; return res;
} }
static inline unsigned long __must_check copy_to_user(void __user *to, const void *from, unsigned long n) static inline unsigned long __must_check
__copy_to_user(void __user *to, const void *from, unsigned long n)
{ {
check_object_size(from, n, true);
return __arch_copy_to_user(to, from, n);
}
static inline unsigned long __must_check
copy_to_user(void __user *to, const void *from, unsigned long n)
{
check_object_size(from, n, true);
if (access_ok(VERIFY_WRITE, to, n)) if (access_ok(VERIFY_WRITE, to, n))
n = __copy_to_user(to, from, n); n = __arch_copy_to_user(to, from, n);
return n; return n;
} }

27
arch/arm/include/asm/unaligned.h Normal file
View File

@ -0,0 +1,27 @@
#ifndef __ASM_ARM_UNALIGNED_H
#define __ASM_ARM_UNALIGNED_H
/*
* We generally want to set CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS on ARMv6+,
* but we don't want to use linux/unaligned/access_ok.h since that can lead
* to traps on unaligned stm/ldm or strd/ldrd.
*/
#include <asm/byteorder.h>
#if defined(__LITTLE_ENDIAN)
# include <linux/unaligned/le_struct.h>
# include <linux/unaligned/be_byteshift.h>
# include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_le
# define put_unaligned __put_unaligned_le
#elif defined(__BIG_ENDIAN)
# include <linux/unaligned/be_struct.h>
# include <linux/unaligned/le_byteshift.h>
# include <linux/unaligned/generic.h>
# define get_unaligned __get_unaligned_be
# define put_unaligned __put_unaligned_be
#else
# error need to define endianess
#endif
#endif /* __ASM_ARM_UNALIGNED_H */

6
arch/arm/kernel/entry-header.S
View File

@ -299,6 +299,8 @@
mov r2, sp mov r2, sp
ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr ldr r1, [r2, #\offset + S_PSR] @ get calling cpsr
ldr lr, [r2, #\offset + S_PC]! @ get pc ldr lr, [r2, #\offset + S_PC]! @ get pc
tst r1, #PSR_I_BIT | 0x0f
bne 1f
msr spsr_cxsf, r1 @ save in spsr_svc msr spsr_cxsf, r1 @ save in spsr_svc
#if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K) #if defined(CONFIG_CPU_V6) || defined(CONFIG_CPU_32v6K)
@ We must avoid clrex due to Cortex-A15 erratum #830321 @ We must avoid clrex due to Cortex-A15 erratum #830321
@ -313,6 +315,7 @@
@ after ldm {}^ @ after ldm {}^
add sp, sp, #\offset + PT_REGS_SIZE add sp, sp, #\offset + PT_REGS_SIZE
movs pc, lr @ return & move spsr_svc into cpsr movs pc, lr @ return & move spsr_svc into cpsr
1: bug "Returning to usermode but unexpected PSR bits set?", \@
#elif defined(CONFIG_CPU_V7M) #elif defined(CONFIG_CPU_V7M)
@ V7M restore. @ V7M restore.
@ Note that we don't need to do clrex here as clearing the local @ Note that we don't need to do clrex here as clearing the local
@ -328,6 +331,8 @@
ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
ldr lr, [sp, #\offset + S_PC] @ get pc ldr lr, [sp, #\offset + S_PC] @ get pc
add sp, sp, #\offset + S_SP add sp, sp, #\offset + S_SP
tst r1, #PSR_I_BIT | 0x0f
bne 1f
msr spsr_cxsf, r1 @ save in spsr_svc msr spsr_cxsf, r1 @ save in spsr_svc
@ We must avoid clrex due to Cortex-A15 erratum #830321 @ We must avoid clrex due to Cortex-A15 erratum #830321
@ -340,6 +345,7 @@
.endif .endif
add sp, sp, #PT_REGS_SIZE - S_SP add sp, sp, #PT_REGS_SIZE - S_SP
movs pc, lr @ return & move spsr_svc into cpsr movs pc, lr @ return & move spsr_svc into cpsr
1: bug "Returning to usermode but unexpected PSR bits set?", \@
#endif /* !CONFIG_THUMB2_KERNEL */ #endif /* !CONFIG_THUMB2_KERNEL */
.endm .endm

28
arch/arm/kernel/traps.c
View File

@ -152,30 +152,26 @@ static void dump_mem(const char *lvl, const char *str, unsigned long bottom,
set_fs(fs); set_fs(fs);
} }
static void dump_instr(const char *lvl, struct pt_regs *regs) static void __dump_instr(const char *lvl, struct pt_regs *regs)
{ {
unsigned long addr = instruction_pointer(regs); unsigned long addr = instruction_pointer(regs);
const int thumb = thumb_mode(regs); const int thumb = thumb_mode(regs);
const int width = thumb ? 4 : 8; const int width = thumb ? 4 : 8;
mm_segment_t fs;
char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str; char str[sizeof("00000000 ") * 5 + 2 + 1], *p = str;
int i; int i;
/* /*
* We need to switch to kernel mode so that we can use __get_user * Note that we now dump the code first, just in case the backtrace
* to safely read from kernel space. Note that we now dump the * kills us.
* code first, just in case the backtrace kills us.
*/ */
fs = get_fs();
set_fs(KERNEL_DS);
for (i = -4; i < 1 + !!thumb; i++) { for (i = -4; i < 1 + !!thumb; i++) {
unsigned int val, bad; unsigned int val, bad;
if (thumb) if (thumb)
bad = __get_user(val, &((u16 *)addr)[i]); bad = get_user(val, &((u16 *)addr)[i]);
else else
bad = __get_user(val, &((u32 *)addr)[i]); bad = get_user(val, &((u32 *)addr)[i]);
if (!bad) if (!bad)
p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ", p += sprintf(p, i == 0 ? "(%0*x) " : "%0*x ",
@ -186,8 +182,20 @@ static void dump_instr(const char *lvl, struct pt_regs *regs)
} }
} }
printk("%sCode: %s\n", lvl, str); printk("%sCode: %s\n", lvl, str);
}
set_fs(fs); static void dump_instr(const char *lvl, struct pt_regs *regs)
{
mm_segment_t fs;
if (!user_mode(regs)) {
fs = get_fs();
set_fs(KERNEL_DS);
__dump_instr(lvl, regs);
set_fs(fs);
} else {
__dump_instr(lvl, regs);
}
} }
#ifdef CONFIG_ARM_UNWIND #ifdef CONFIG_ARM_UNWIND

6
arch/arm/kvm/emulate.c
View File

@ -227,7 +227,7 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
u32 return_offset = (is_thumb) ? 2 : 4; u32 return_offset = (is_thumb) ? 2 : 4;
kvm_update_psr(vcpu, UND_MODE); kvm_update_psr(vcpu, UND_MODE);
*vcpu_reg(vcpu, 14) = *vcpu_pc(vcpu) - return_offset; *vcpu_reg(vcpu, 14) = *vcpu_pc(vcpu) + return_offset;
/* Branch to exception vector */ /* Branch to exception vector */
*vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset; *vcpu_pc(vcpu) = exc_vector_base(vcpu) + vect_offset;
@ -239,10 +239,8 @@ void kvm_inject_undefined(struct kvm_vcpu *vcpu)
*/ */
static void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr) static void inject_abt(struct kvm_vcpu *vcpu, bool is_pabt, unsigned long addr)
{ {
unsigned long cpsr = *vcpu_cpsr(vcpu);
bool is_thumb = (cpsr & PSR_T_BIT);
u32 vect_offset; u32 vect_offset;
u32 return_offset = (is_thumb) ? 4 : 0; u32 return_offset = (is_pabt) ? 4 : 8;
bool is_lpae; bool is_lpae;
kvm_update_psr(vcpu, ABT_MODE); kvm_update_psr(vcpu, ABT_MODE);

19
arch/arm/kvm/handle_exit.c
View File

@ -79,7 +79,19 @@ static int kvm_handle_wfx(struct kvm_vcpu *vcpu, struct kvm_run *run)
return 1; return 1;
} }
static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
u32 hsr = kvm_vcpu_get_hsr(vcpu);
kvm_pr_unimpl("Unknown exception class: hsr: %#08x\n",
hsr);
kvm_inject_undefined(vcpu);
return 1;
}
static exit_handle_fn arm_exit_handlers[] = { static exit_handle_fn arm_exit_handlers[] = {
[0 ... HSR_EC_MAX] = kvm_handle_unknown_ec,
[HSR_EC_WFI] = kvm_handle_wfx, [HSR_EC_WFI] = kvm_handle_wfx,
[HSR_EC_CP15_32] = kvm_handle_cp15_32, [HSR_EC_CP15_32] = kvm_handle_cp15_32,
[HSR_EC_CP15_64] = kvm_handle_cp15_64, [HSR_EC_CP15_64] = kvm_handle_cp15_64,
@ -98,13 +110,6 @@ static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
{ {
u8 hsr_ec = kvm_vcpu_trap_get_class(vcpu); u8 hsr_ec = kvm_vcpu_trap_get_class(vcpu);
if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers) ||
!arm_exit_handlers[hsr_ec]) {
kvm_err("Unknown exception class: hsr: %#08x\n",
(unsigned int)kvm_vcpu_get_hsr(vcpu));
BUG();
}
return arm_exit_handlers[hsr_ec]; return arm_exit_handlers[hsr_ec];
} }

2
arch/arm/kvm/hyp/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for Kernel-based Virtual Machine module, HYP part # Makefile for Kernel-based Virtual Machine module, HYP part
# #
ccflags-y += -fno-stack-protector ccflags-y += -fno-stack-protector -DDISABLE_BRANCH_PROFILING
KVM=../../../../virt/kvm KVM=../../../../virt/kvm

16
arch/arm/mach-omap1/dma.c
View File

@ -32,7 +32,6 @@
#include "soc.h" #include "soc.h"
#define OMAP1_DMA_BASE (0xfffed800) #define OMAP1_DMA_BASE (0xfffed800)
#define OMAP1_LOGICAL_DMA_CH_COUNT 17
static u32 enable_1510_mode; static u32 enable_1510_mode;
@ -348,8 +347,6 @@ static int __init omap1_system_dma_init(void)
goto exit_iounmap; goto exit_iounmap;
} }
d->lch_count = OMAP1_LOGICAL_DMA_CH_COUNT;
/* Valid attributes for omap1 plus processors */ /* Valid attributes for omap1 plus processors */
if (cpu_is_omap15xx()) if (cpu_is_omap15xx())
d->dev_caps = ENABLE_1510_MODE; d->dev_caps = ENABLE_1510_MODE;
@ -366,13 +363,14 @@ static int __init omap1_system_dma_init(void)
d->dev_caps |= CLEAR_CSR_ON_READ; d->dev_caps |= CLEAR_CSR_ON_READ;
d->dev_caps |= IS_WORD_16; d->dev_caps |= IS_WORD_16;
if (cpu_is_omap15xx()) /* available logical channels */
d->chan_count = 9; if (cpu_is_omap15xx()) {
else if (cpu_is_omap16xx() || cpu_is_omap7xx()) { d->lch_count = 9;
if (!(d->dev_caps & ENABLE_1510_MODE)) } else {
d->chan_count = 16; if (d->dev_caps & ENABLE_1510_MODE)
d->lch_count = 9;
else else
d->chan_count = 9; d->lch_count = 16;
} }
p = dma_plat_info; p = dma_plat_info;

10
arch/arm/mach-omap2/gpmc-onenand.c
View File

@ -367,7 +367,7 @@ static int gpmc_onenand_setup(void __iomem *onenand_base, int *freq_ptr)
return ret; return ret;
} }
void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data) int gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
{ {
int err; int err;
struct device *dev = &gpmc_onenand_device.dev; struct device *dev = &gpmc_onenand_device.dev;
@ -393,15 +393,17 @@ void gpmc_onenand_init(struct omap_onenand_platform_data *_onenand_data)
if (err < 0) { if (err < 0) {
dev_err(dev, "Cannot request GPMC CS %d, error %d\n", dev_err(dev, "Cannot request GPMC CS %d, error %d\n",
gpmc_onenand_data->cs, err); gpmc_onenand_data->cs, err);
return; return err;
} }
gpmc_onenand_resource.end = gpmc_onenand_resource.start + gpmc_onenand_resource.end = gpmc_onenand_resource.start +
ONENAND_IO_SIZE - 1; ONENAND_IO_SIZE - 1;
if (platform_device_register(&gpmc_onenand_device) < 0) { err = platform_device_register(&gpmc_onenand_device);
if (err) {
dev_err(dev, "Unable to register OneNAND device\n"); dev_err(dev, "Unable to register OneNAND device\n");
gpmc_cs_free(gpmc_onenand_data->cs); gpmc_cs_free(gpmc_onenand_data->cs);
return;
} }
return err;
} }

25
arch/arm/mach-omap2/omap_hwmod_3xxx_data.c
View File

@ -3828,16 +3828,20 @@ static struct omap_hwmod_ocp_if *omap3xxx_dss_hwmod_ocp_ifs[] __initdata = {
* Return: 0 if device named @dev_name is not likely to be accessible, * Return: 0 if device named @dev_name is not likely to be accessible,
* or 1 if it is likely to be accessible. * or 1 if it is likely to be accessible.
*/ */
static int __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus, static bool __init omap3xxx_hwmod_is_hs_ip_block_usable(struct device_node *bus,
const char *dev_name) const char *dev_name)
{ {
struct device_node *node;
bool available;
if (!bus) if (!bus)
return (omap_type() == OMAP2_DEVICE_TYPE_GP) ? 1 : 0; return omap_type() == OMAP2_DEVICE_TYPE_GP;
if (of_device_is_available(of_find_node_by_name(bus, dev_name))) node = of_get_child_by_name(bus, dev_name);
return 1; available = of_device_is_available(node);
of_node_put(node);
return 0; return available;
} }
int __init omap3xxx_hwmod_init(void) int __init omap3xxx_hwmod_init(void)
@ -3906,15 +3910,20 @@ int __init omap3xxx_hwmod_init(void)
if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) { if (h_sham && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "sham")) {
r = omap_hwmod_register_links(h_sham); r = omap_hwmod_register_links(h_sham);
if (r < 0) if (r < 0) {
of_node_put(bus);
return r; return r;
}
} }
if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) { if (h_aes && omap3xxx_hwmod_is_hs_ip_block_usable(bus, "aes")) {
r = omap_hwmod_register_links(h_aes); r = omap_hwmod_register_links(h_aes);
if (r < 0) if (r < 0) {
of_node_put(bus);
return r; return r;
}
} }
of_node_put(bus);
/* /*
* Register hwmod links specific to certain ES levels of a * Register hwmod links specific to certain ES levels of a

5
arch/arm/mach-omap2/pdata-quirks.c
View File

@ -147,7 +147,7 @@ static struct ti_st_plat_data wilink_pdata = {
.nshutdown_gpio = 137, .nshutdown_gpio = 137,
.dev_name = "/dev/ttyO1", .dev_name = "/dev/ttyO1",
.flow_cntrl = 1, .flow_cntrl = 1,
.baud_rate = 300000, .baud_rate = 3000000,
}; };
static struct platform_device wl18xx_device = { static struct platform_device wl18xx_device = {
@ -162,7 +162,7 @@ static struct ti_st_plat_data wilink7_pdata = {
.nshutdown_gpio = 162, .nshutdown_gpio = 162,
.dev_name = "/dev/ttyO1", .dev_name = "/dev/ttyO1",
.flow_cntrl = 1, .flow_cntrl = 1,
.baud_rate = 300000, .baud_rate = 3000000,
}; };
static struct platform_device wl128x_device = { static struct platform_device wl128x_device = {
@ -600,7 +600,6 @@ static void pdata_quirks_check(struct pdata_init *quirks)
if (of_machine_is_compatible(quirks->compatible)) { if (of_machine_is_compatible(quirks->compatible)) {
if (quirks->fn) if (quirks->fn)
quirks->fn(); quirks->fn();
break;
} }
quirks++; quirks++;
} }

20
arch/arm/mm/dma-mapping.c
View File

@ -930,13 +930,31 @@ static void arm_coherent_dma_free(struct device *dev, size_t size, void *cpu_add
__arm_dma_free(dev, size, cpu_addr, handle, attrs, true); __arm_dma_free(dev, size, cpu_addr, handle, attrs, true);
} }
/*
* The whole dma_get_sgtable() idea is fundamentally unsafe - it seems
* that the intention is to allow exporting memory allocated via the
* coherent DMA APIs through the dma_buf API, which only accepts a
* scattertable. This presents a couple of problems:
* 1. Not all memory allocated via the coherent DMA APIs is backed by
* a struct page
* 2. Passing coherent DMA memory into the streaming APIs is not allowed
* as we will try to flush the memory through a different alias to that
* actually being used (and the flushes are redundant.)
*/
int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt, int arm_dma_get_sgtable(struct device *dev, struct sg_table *sgt,
void *cpu_addr, dma_addr_t handle, size_t size, void *cpu_addr, dma_addr_t handle, size_t size,
unsigned long attrs) unsigned long attrs)
{ {
struct page *page = pfn_to_page(dma_to_pfn(dev, handle)); unsigned long pfn = dma_to_pfn(dev, handle);
struct page *page;
int ret; int ret;
/* If the PFN is not valid, we do not have a struct page */
if (!pfn_valid(pfn))
return -ENXIO;
page = pfn_to_page(pfn);
ret = sg_alloc_table(sgt, 1, GFP_KERNEL); ret = sg_alloc_table(sgt, 1, GFP_KERNEL);
if (unlikely(ret)) if (unlikely(ret))
return ret; return ret;

4
arch/arm/mm/dump.c
View File

@ -126,8 +126,8 @@ static const struct prot_bits section_bits[] = {
.val = PMD_SECT_USER, .val = PMD_SECT_USER,
.set = "USR", .set = "USR",
}, { }, {
.mask = L_PMD_SECT_RDONLY, .mask = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
.val = L_PMD_SECT_RDONLY, .val = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
.set = "ro", .set = "ro",
.clear = "RW", .clear = "RW",
#elif __LINUX_ARM_ARCH__ >= 6 #elif __LINUX_ARM_ARCH__ >= 6

4
arch/arm/mm/init.c
View File

@ -619,8 +619,8 @@ static struct section_perm ro_perms[] = {
.start = (unsigned long)_stext, .start = (unsigned long)_stext,
.end = (unsigned long)__init_begin, .end = (unsigned long)__init_begin,
#ifdef CONFIG_ARM_LPAE #ifdef CONFIG_ARM_LPAE
.mask = ~L_PMD_SECT_RDONLY, .mask = ~(L_PMD_SECT_RDONLY | PMD_SECT_AP2),
.prot = L_PMD_SECT_RDONLY, .prot = L_PMD_SECT_RDONLY | PMD_SECT_AP2,
#else #else
.mask = ~(PMD_SECT_APX | PMD_SECT_AP_WRITE), .mask = ~(PMD_SECT_APX | PMD_SECT_AP_WRITE),
.prot = PMD_SECT_APX | PMD_SECT_AP_WRITE, .prot = PMD_SECT_APX | PMD_SECT_AP_WRITE,

36
arch/arm/probes/kprobes/core.c
View File

@ -433,6 +433,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
struct hlist_node *tmp; struct hlist_node *tmp;
unsigned long flags, orig_ret_address = 0; unsigned long flags, orig_ret_address = 0;
unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline; unsigned long trampoline_address = (unsigned long)&kretprobe_trampoline;
kprobe_opcode_t *correct_ret_addr = NULL;
INIT_HLIST_HEAD(&empty_rp); INIT_HLIST_HEAD(&empty_rp);
kretprobe_hash_lock(current, &head, &flags); kretprobe_hash_lock(current, &head, &flags);
@ -455,15 +456,7 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
/* another task is sharing our hash bucket */ /* another task is sharing our hash bucket */
continue; continue;
if (ri->rp && ri->rp->handler) {
__this_cpu_write(current_kprobe, &ri->rp->kp);
get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
ri->rp->handler(ri, regs);
__this_cpu_write(current_kprobe, NULL);
}
orig_ret_address = (unsigned long)ri->ret_addr; orig_ret_address = (unsigned long)ri->ret_addr;
recycle_rp_inst(ri, &empty_rp);
if (orig_ret_address != trampoline_address) if (orig_ret_address != trampoline_address)
/* /*
@ -475,6 +468,33 @@ static __used __kprobes void *trampoline_handler(struct pt_regs *regs)
} }
kretprobe_assert(ri, orig_ret_address, trampoline_address); kretprobe_assert(ri, orig_ret_address, trampoline_address);
correct_ret_addr = ri->ret_addr;
hlist_for_each_entry_safe(ri, tmp, head, hlist) {
if (ri->task != current)
/* another task is sharing our hash bucket */
continue;
orig_ret_address = (unsigned long)ri->ret_addr;
if (ri->rp && ri->rp->handler) {
__this_cpu_write(current_kprobe, &ri->rp->kp);
get_kprobe_ctlblk()->kprobe_status = KPROBE_HIT_ACTIVE;
ri->ret_addr = correct_ret_addr;
ri->rp->handler(ri, regs);
__this_cpu_write(current_kprobe, NULL);
}
recycle_rp_inst(ri, &empty_rp);
if (orig_ret_address != trampoline_address)
/*
* This is the real return address. Any other
* instances associated with this task are for
* other calls deeper on the call stack
*/
break;
}
kretprobe_hash_unlock(current, &flags); kretprobe_hash_unlock(current, &flags);
hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) { hlist_for_each_entry_safe(ri, tmp, &empty_rp, hlist) {

11
arch/arm/probes/kprobes/test-core.c
View File

@ -976,7 +976,10 @@ static void coverage_end(void)
void __naked __kprobes_test_case_start(void) void __naked __kprobes_test_case_start(void)
{ {
__asm__ __volatile__ ( __asm__ __volatile__ (
"stmdb sp!, {r4-r11} \n\t" "mov r2, sp \n\t"
"bic r3, r2, #7 \n\t"
"mov sp, r3 \n\t"
"stmdb sp!, {r2-r11} \n\t"
"sub sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t" "sub sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
"bic r0, lr, #1 @ r0 = inline data \n\t" "bic r0, lr, #1 @ r0 = inline data \n\t"
"mov r1, sp \n\t" "mov r1, sp \n\t"
@ -996,7 +999,8 @@ void __naked __kprobes_test_case_end_32(void)
"movne pc, r0 \n\t" "movne pc, r0 \n\t"
"mov r0, r4 \n\t" "mov r0, r4 \n\t"
"add sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t" "add sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
"ldmia sp!, {r4-r11} \n\t" "ldmia sp!, {r2-r11} \n\t"
"mov sp, r2 \n\t"
"mov pc, r0 \n\t" "mov pc, r0 \n\t"
); );
} }
@ -1012,7 +1016,8 @@ void __naked __kprobes_test_case_end_16(void)
"bxne r0 \n\t" "bxne r0 \n\t"
"mov r0, r4 \n\t" "mov r0, r4 \n\t"
"add sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t" "add sp, sp, #"__stringify(TEST_MEMORY_SIZE)"\n\t"
"ldmia sp!, {r4-r11} \n\t" "ldmia sp!, {r2-r11} \n\t"
"mov sp, r2 \n\t"
"bx r0 \n\t" "bx r0 \n\t"
); );
} }

8
arch/arm64/Makefile
View File

@ -14,8 +14,12 @@ LDFLAGS_vmlinux :=-p --no-undefined -X
CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET) CPPFLAGS_vmlinux.lds = -DTEXT_OFFSET=$(TEXT_OFFSET)
GZFLAGS :=-9 GZFLAGS :=-9
ifneq ($(CONFIG_RELOCATABLE),) ifeq ($(CONFIG_RELOCATABLE), y)
LDFLAGS_vmlinux += -pie -shared -Bsymbolic # Pass --no-apply-dynamic-relocs to restore pre-binutils-2.27 behaviour
# for relative relocs, since this leads to better Image compression
# with the relocation offsets always being zero.
LDFLAGS_vmlinux += -pie -shared -Bsymbolic \
$(call ld-option, --no-apply-dynamic-relocs)
endif endif
ifeq ($(CONFIG_ARM64_ERRATUM_843419),y) ifeq ($(CONFIG_ARM64_ERRATUM_843419),y)

2
arch/arm64/boot/dts/broadcom/ns2.dtsi
View File

@ -30,6 +30,8 @@
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/ */
/memreserve/ 0x81000000 0x00200000;
#include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/bcm-ns2.h> #include <dt-bindings/clock/bcm-ns2.h>

3
arch/arm64/include/asm/kvm_arm.h
View File

@ -170,8 +170,7 @@
#define VTCR_EL2_FLAGS (VTCR_EL2_COMMON_BITS | VTCR_EL2_TGRAN_FLAGS) #define VTCR_EL2_FLAGS (VTCR_EL2_COMMON_BITS | VTCR_EL2_TGRAN_FLAGS)
#define VTTBR_X (VTTBR_X_TGRAN_MAGIC - VTCR_EL2_T0SZ_IPA) #define VTTBR_X (VTTBR_X_TGRAN_MAGIC - VTCR_EL2_T0SZ_IPA)
#define VTTBR_BADDR_SHIFT (VTTBR_X - 1) #define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_X)
#define VTTBR_BADDR_MASK (((UL(1) << (PHYS_MASK_SHIFT - VTTBR_X)) - 1) << VTTBR_BADDR_SHIFT)
#define VTTBR_VMID_SHIFT (UL(48)) #define VTTBR_VMID_SHIFT (UL(48))
#define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT) #define VTTBR_VMID_MASK(size) (_AT(u64, (1 << size) - 1) << VTTBR_VMID_SHIFT)

14
arch/arm64/include/asm/pgtable.h
View File

@ -91,6 +91,8 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN)) ((pte_val(pte) & (PTE_VALID | PTE_USER | PTE_UXN)) == (PTE_VALID | PTE_UXN))
#define pte_valid_young(pte) \ #define pte_valid_young(pte) \
((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF)) ((pte_val(pte) & (PTE_VALID | PTE_AF)) == (PTE_VALID | PTE_AF))
#define pte_valid_user(pte) \
((pte_val(pte) & (PTE_VALID | PTE_USER)) == (PTE_VALID | PTE_USER))
/* /*
* Could the pte be present in the TLB? We must check mm_tlb_flush_pending * Could the pte be present in the TLB? We must check mm_tlb_flush_pending
@ -100,6 +102,18 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
#define pte_accessible(mm, pte) \ #define pte_accessible(mm, pte) \
(mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte)) (mm_tlb_flush_pending(mm) ? pte_present(pte) : pte_valid_young(pte))
/*
* p??_access_permitted() is true for valid user mappings (subject to the
* write permission check) other than user execute-only which do not have the
* PTE_USER bit set. PROT_NONE mappings do not have the PTE_VALID bit set.
*/
#define pte_access_permitted(pte, write) \
(pte_valid_user(pte) && (!(write) || pte_write(pte)))
#define pmd_access_permitted(pmd, write) \
(pte_access_permitted(pmd_pte(pmd), (write)))
#define pud_access_permitted(pud, write) \
(pte_access_permitted(pud_pte(pud), (write)))
static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot) static inline pte_t clear_pte_bit(pte_t pte, pgprot_t prot)
{ {
pte_val(pte) &= ~pgprot_val(prot); pte_val(pte) &= ~pgprot_val(prot);

9
arch/arm64/kernel/process.c
View File

@ -255,6 +255,15 @@ int copy_thread(unsigned long clone_flags, unsigned long stack_start,
memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context)); memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
/*
* In case p was allocated the same task_struct pointer as some
* other recently-exited task, make sure p is disassociated from
* any cpu that may have run that now-exited task recently.
* Otherwise we could erroneously skip reloading the FPSIMD
* registers for p.
*/
fpsimd_flush_task_state(p);
if (likely(!(p->flags & PF_KTHREAD))) { if (likely(!(p->flags & PF_KTHREAD))) {
*childregs = *current_pt_regs(); *childregs = *current_pt_regs();
childregs->regs[0] = 0; childregs->regs[0] = 0;

2
arch/arm64/kernel/traps.c
View File

@ -112,7 +112,7 @@ static void __dump_instr(const char *lvl, struct pt_regs *regs)
for (i = -4; i < 1; i++) { for (i = -4; i < 1; i++) {
unsigned int val, bad; unsigned int val, bad;
bad = __get_user(val, &((u32 *)addr)[i]); bad = get_user(val, &((u32 *)addr)[i]);
if (!bad) if (!bad)
p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val); p += sprintf(p, i == 0 ? "(%08x) " : "%08x ", val);

19
arch/arm64/kvm/handle_exit.c
View File

@ -125,7 +125,19 @@ static int kvm_handle_guest_debug(struct kvm_vcpu *vcpu, struct kvm_run *run)
return ret; return ret;
} }
static int kvm_handle_unknown_ec(struct kvm_vcpu *vcpu, struct kvm_run *run)
{
u32 hsr = kvm_vcpu_get_hsr(vcpu);
kvm_pr_unimpl("Unknown exception class: hsr: %#08x -- %s\n",
hsr, esr_get_class_string(hsr));
kvm_inject_undefined(vcpu);
return 1;
}
static exit_handle_fn arm_exit_handlers[] = { static exit_handle_fn arm_exit_handlers[] = {
[0 ... ESR_ELx_EC_MAX] = kvm_handle_unknown_ec,
[ESR_ELx_EC_WFx] = kvm_handle_wfx, [ESR_ELx_EC_WFx] = kvm_handle_wfx,
[ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32, [ESR_ELx_EC_CP15_32] = kvm_handle_cp15_32,
[ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64, [ESR_ELx_EC_CP15_64] = kvm_handle_cp15_64,
@ -151,13 +163,6 @@ static exit_handle_fn kvm_get_exit_handler(struct kvm_vcpu *vcpu)
u32 hsr = kvm_vcpu_get_hsr(vcpu); u32 hsr = kvm_vcpu_get_hsr(vcpu);
u8 hsr_ec = ESR_ELx_EC(hsr); u8 hsr_ec = ESR_ELx_EC(hsr);
if (hsr_ec >= ARRAY_SIZE(arm_exit_handlers) ||
!arm_exit_handlers[hsr_ec]) {
kvm_err("Unknown exception class: hsr: %#08x -- %s\n",
hsr, esr_get_class_string(hsr));
BUG();
}
return arm_exit_handlers[hsr_ec]; return arm_exit_handlers[hsr_ec];
} }

2
arch/arm64/kvm/hyp/Makefile
View File

@ -2,7 +2,7 @@
# Makefile for Kernel-based Virtual Machine module, HYP part # Makefile for Kernel-based Virtual Machine module, HYP part
# #
ccflags-y += -fno-stack-protector ccflags-y += -fno-stack-protector -DDISABLE_BRANCH_PROFILING
KVM=../../../../virt/kvm KVM=../../../../virt/kvm

16
arch/arm64/kvm/inject_fault.c
View File

@ -33,12 +33,26 @@
#define LOWER_EL_AArch64_VECTOR 0x400 #define LOWER_EL_AArch64_VECTOR 0x400
#define LOWER_EL_AArch32_VECTOR 0x600 #define LOWER_EL_AArch32_VECTOR 0x600
/*
* Table taken from ARMv8 ARM DDI0487B-B, table G1-10.
*/
static const u8 return_offsets[8][2] = {
[0] = { 0, 0 }, /* Reset, unused */
[1] = { 4, 2 }, /* Undefined */
[2] = { 0, 0 }, /* SVC, unused */
[3] = { 4, 4 }, /* Prefetch abort */
[4] = { 8, 8 }, /* Data abort */
[5] = { 0, 0 }, /* HVC, unused */
[6] = { 4, 4 }, /* IRQ, unused */
[7] = { 4, 4 }, /* FIQ, unused */
};
static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset) static void prepare_fault32(struct kvm_vcpu *vcpu, u32 mode, u32 vect_offset)
{ {
unsigned long cpsr; unsigned long cpsr;
unsigned long new_spsr_value = *vcpu_cpsr(vcpu); unsigned long new_spsr_value = *vcpu_cpsr(vcpu);
bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT); bool is_thumb = (new_spsr_value & COMPAT_PSR_T_BIT);
u32 return_offset = (is_thumb) ? 4 : 0; u32 return_offset = return_offsets[vect_offset >> 2][is_thumb];
u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR); u32 sctlr = vcpu_cp15(vcpu, c1_SCTLR);
cpsr = mode | COMPAT_PSR_I_BIT; cpsr = mode | COMPAT_PSR_I_BIT;

17
arch/arm64/mm/dma-mapping.c
View File

@ -836,14 +836,21 @@ static bool do_iommu_attach(struct device *dev, const struct iommu_ops *ops,
* then the IOMMU core will have already configured a group for this * then the IOMMU core will have already configured a group for this
* device, and allocated the default domain for that group. * device, and allocated the default domain for that group.
*/ */
if (!domain || iommu_dma_init_domain(domain, dma_base, size, dev)) { if (!domain)
pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n", goto out_err;
dev_name(dev));
return false; if (domain->type == IOMMU_DOMAIN_DMA) {
if (iommu_dma_init_domain(domain, dma_base, size, dev))
goto out_err;
dev->archdata.dma_ops = &iommu_dma_ops;
} }
dev->archdata.dma_ops = &iommu_dma_ops;
return true; return true;
out_err:
pr_warn("Failed to set up IOMMU for device %s; retaining platform DMA ops\n",
dev_name(dev));
return false;
} }
static void queue_iommu_attach(struct device *dev, const struct iommu_ops *ops, static void queue_iommu_attach(struct device *dev, const struct iommu_ops *ops,

2
arch/arm64/mm/init.c
View File

@ -296,6 +296,7 @@ void __init arm64_memblock_init(void)
arm64_dma_phys_limit = max_zone_dma_phys(); arm64_dma_phys_limit = max_zone_dma_phys();
else else
arm64_dma_phys_limit = PHYS_MASK + 1; arm64_dma_phys_limit = PHYS_MASK + 1;
high_memory = __va(memblock_end_of_DRAM() - 1) + 1;
dma_contiguous_reserve(arm64_dma_phys_limit); dma_contiguous_reserve(arm64_dma_phys_limit);
memblock_allow_resize(); memblock_allow_resize();
@ -322,7 +323,6 @@ void __init bootmem_init(void)
sparse_init(); sparse_init();
zone_sizes_init(min, max); zone_sizes_init(min, max);
high_memory = __va((max << PAGE_SHIFT) - 1) + 1;
memblock_dump_all(); memblock_dump_all();
} }

7
arch/blackfin/Kconfig
View File

@ -319,11 +319,14 @@ config BF53x
config GPIO_ADI config GPIO_ADI
def_bool y def_bool y
depends on !PINCTRL
depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561) depends on (BF51x || BF52x || BF53x || BF538 || BF539 || BF561)
config PINCTRL config PINCTRL_BLACKFIN_ADI2
def_bool y def_bool y
depends on BF54x || BF60x depends on (BF54x || BF60x)
select PINCTRL
select PINCTRL_ADI2
config MEM_MT48LC64M4A2FB_7E config MEM_MT48LC64M4A2FB_7E
bool bool

1
arch/blackfin/Kconfig.debug
View File

@ -17,6 +17,7 @@ config DEBUG_VERBOSE
config DEBUG_MMRS config DEBUG_MMRS
tristate "Generate Blackfin MMR tree" tristate "Generate Blackfin MMR tree"
depends on !PINCTRL
select DEBUG_FS select DEBUG_FS
help help
Create a tree of Blackfin MMRs via the debugfs tree. If Create a tree of Blackfin MMRs via the debugfs tree. If

2
arch/m68k/mm/mcfmmu.c
View File

@ -169,7 +169,7 @@ void __init cf_bootmem_alloc(void)
max_pfn = max_low_pfn = PFN_DOWN(_ramend); max_pfn = max_low_pfn = PFN_DOWN(_ramend);
high_memory = (void *)_ramend; high_memory = (void *)_ramend;
m68k_virt_to_node_shift = fls(_ramend - _rambase - 1) - 6; m68k_virt_to_node_shift = fls(_ramend - 1) - 6;
module_fixup(NULL, __start_fixup, __stop_fixup); module_fixup(NULL, __start_fixup, __stop_fixup);
/* setup bootmem data */ /* setup bootmem data */

5
arch/mips/ar7/platform.c
View File

@ -576,6 +576,7 @@ static int __init ar7_register_uarts(void)
uart_port.type = PORT_AR7; uart_port.type = PORT_AR7;
uart_port.uartclk = clk_get_rate(bus_clk) / 2; uart_port.uartclk = clk_get_rate(bus_clk) / 2;
uart_port.iotype = UPIO_MEM32; uart_port.iotype = UPIO_MEM32;
uart_port.flags = UPF_FIXED_TYPE;
uart_port.regshift = 2; uart_port.regshift = 2;
uart_port.line = 0; uart_port.line = 0;
@ -654,6 +655,10 @@ static int __init ar7_register_devices(void)
u32 val; u32 val;
int res; int res;
res = ar7_gpio_init();
if (res)
pr_warn("unable to register gpios: %d\n", res);
res = ar7_register_uarts(); res = ar7_register_uarts();
if (res) if (res)
pr_err("unable to setup uart(s): %d\n", res); pr_err("unable to setup uart(s): %d\n", res);

2
arch/mips/ar7/prom.c
View File

@ -246,8 +246,6 @@ void __init prom_init(void)
ar7_init_cmdline(fw_arg0, (char **)fw_arg1); ar7_init_cmdline(fw_arg0, (char **)fw_arg1);
ar7_init_env((struct env_var *)fw_arg2); ar7_init_env((struct env_var *)fw_arg2);
console_config(); console_config();
ar7_gpio_init();
} }
#define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4)))

2
arch/mips/bcm47xx/leds.c
View File

@ -330,7 +330,7 @@ bcm47xx_leds_linksys_wrt54g3gv2[] __initconst = {
/* Verified on: WRT54GS V1.0 */ /* Verified on: WRT54GS V1.0 */
static const struct gpio_led static const struct gpio_led
bcm47xx_leds_linksys_wrt54g_type_0101[] __initconst = { bcm47xx_leds_linksys_wrt54g_type_0101[] __initconst = {
BCM47XX_GPIO_LED(0, "green", "wlan", 0, LEDS_GPIO_DEFSTATE_OFF), BCM47XX_GPIO_LED(0, "green", "wlan", 1, LEDS_GPIO_DEFSTATE_OFF),
BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON), BCM47XX_GPIO_LED(1, "green", "power", 0, LEDS_GPIO_DEFSTATE_ON),
BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF), BCM47XX_GPIO_LED(7, "green", "dmz", 1, LEDS_GPIO_DEFSTATE_OFF),
}; };

1
arch/mips/boot/dts/brcm/Makefile
View File

@ -22,7 +22,6 @@ dtb-$(CONFIG_DT_NONE) += \
bcm63268-comtrend-vr-3032u.dtb \ bcm63268-comtrend-vr-3032u.dtb \
bcm93384wvg.dtb \ bcm93384wvg.dtb \
bcm93384wvg_viper.dtb \ bcm93384wvg_viper.dtb \
bcm96358nb4ser.dtb \
bcm96368mvwg.dtb \ bcm96368mvwg.dtb \
bcm9ejtagprb.dtb \ bcm9ejtagprb.dtb \
bcm97125cbmb.dtb \ bcm97125cbmb.dtb \

10
arch/mips/include/asm/asm.h
View File

@ -54,7 +54,8 @@
.align 2; \ .align 2; \
.type symbol, @function; \ .type symbol, @function; \
.ent symbol, 0; \ .ent symbol, 0; \
symbol: .frame sp, 0, ra symbol: .frame sp, 0, ra; \
.insn
/* /*
* NESTED - declare nested routine entry point * NESTED - declare nested routine entry point
@ -63,8 +64,9 @@ symbol: .frame sp, 0, ra
.globl symbol; \ .globl symbol; \
.align 2; \ .align 2; \
.type symbol, @function; \ .type symbol, @function; \
.ent symbol, 0; \ .ent symbol, 0; \
symbol: .frame sp, framesize, rpc symbol: .frame sp, framesize, rpc; \
.insn
/* /*
* END - mark end of function * END - mark end of function
@ -86,7 +88,7 @@ symbol:
#define FEXPORT(symbol) \ #define FEXPORT(symbol) \
.globl symbol; \ .globl symbol; \
.type symbol, @function; \ .type symbol, @function; \
symbol: symbol: .insn
/* /*
* ABS - export absolute symbol * ABS - export absolute symbol

8
arch/mips/include/asm/asmmacro.h
View File

@ -19,6 +19,9 @@
#include <asm/asmmacro-64.h> #include <asm/asmmacro-64.h>
#endif #endif
/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
#undef fp
/* /*
* Helper macros for generating raw instruction encodings. * Helper macros for generating raw instruction encodings.
*/ */
@ -105,6 +108,7 @@
.macro fpu_save_16odd thread .macro fpu_save_16odd thread
.set push .set push
.set mips64r2 .set mips64r2
.set fp=64
SET_HARDFLOAT SET_HARDFLOAT
sdc1 $f1, THREAD_FPR1(\thread) sdc1 $f1, THREAD_FPR1(\thread)
sdc1 $f3, THREAD_FPR3(\thread) sdc1 $f3, THREAD_FPR3(\thread)
@ -163,6 +167,7 @@
.macro fpu_restore_16odd thread .macro fpu_restore_16odd thread
.set push .set push
.set mips64r2 .set mips64r2
.set fp=64
SET_HARDFLOAT SET_HARDFLOAT
ldc1 $f1, THREAD_FPR1(\thread) ldc1 $f1, THREAD_FPR1(\thread)
ldc1 $f3, THREAD_FPR3(\thread) ldc1 $f3, THREAD_FPR3(\thread)
@ -234,9 +239,6 @@
.endm .endm
#ifdef TOOLCHAIN_SUPPORTS_MSA #ifdef TOOLCHAIN_SUPPORTS_MSA
/* preprocessor replaces the fp in ".set fp=64" with $30 otherwise */
#undef fp
.macro _cfcmsa rd, cs .macro _cfcmsa rd, cs
.set push .set push
.set mips32r2 .set mips32r2

2
arch/mips/include/asm/irq.h
View File

@ -18,7 +18,7 @@
#include <irq.h> #include <irq.h>
#define IRQ_STACK_SIZE THREAD_SIZE #define IRQ_STACK_SIZE THREAD_SIZE
#define IRQ_STACK_START (IRQ_STACK_SIZE - sizeof(unsigned long)) #define IRQ_STACK_START (IRQ_STACK_SIZE - 16)
extern void *irq_stack[NR_CPUS]; extern void *irq_stack[NR_CPUS];

11
arch/mips/include/asm/mips-cm.h
View File

@ -187,6 +187,7 @@ BUILD_CM_R_(config, MIPS_CM_GCB_OFS + 0x00)
BUILD_CM_RW(base, MIPS_CM_GCB_OFS + 0x08) BUILD_CM_RW(base, MIPS_CM_GCB_OFS + 0x08)
BUILD_CM_RW(access, MIPS_CM_GCB_OFS + 0x20) BUILD_CM_RW(access, MIPS_CM_GCB_OFS + 0x20)
BUILD_CM_R_(rev, MIPS_CM_GCB_OFS + 0x30) BUILD_CM_R_(rev, MIPS_CM_GCB_OFS + 0x30)
BUILD_CM_RW(err_control, MIPS_CM_GCB_OFS + 0x38)
BUILD_CM_RW(error_mask, MIPS_CM_GCB_OFS + 0x40) BUILD_CM_RW(error_mask, MIPS_CM_GCB_OFS + 0x40)
BUILD_CM_RW(error_cause, MIPS_CM_GCB_OFS + 0x48) BUILD_CM_RW(error_cause, MIPS_CM_GCB_OFS + 0x48)
BUILD_CM_RW(error_addr, MIPS_CM_GCB_OFS + 0x50) BUILD_CM_RW(error_addr, MIPS_CM_GCB_OFS + 0x50)
@ -239,8 +240,8 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
#define CM_GCR_BASE_GCRBASE_MSK (_ULCAST_(0x1ffff) << 15) #define CM_GCR_BASE_GCRBASE_MSK (_ULCAST_(0x1ffff) << 15)
#define CM_GCR_BASE_CMDEFTGT_SHF 0 #define CM_GCR_BASE_CMDEFTGT_SHF 0
#define CM_GCR_BASE_CMDEFTGT_MSK (_ULCAST_(0x3) << 0) #define CM_GCR_BASE_CMDEFTGT_MSK (_ULCAST_(0x3) << 0)
#define CM_GCR_BASE_CMDEFTGT_DISABLED 0 #define CM_GCR_BASE_CMDEFTGT_MEM 0
#define CM_GCR_BASE_CMDEFTGT_MEM 1 #define CM_GCR_BASE_CMDEFTGT_RESERVED 1
#define CM_GCR_BASE_CMDEFTGT_IOCU0 2 #define CM_GCR_BASE_CMDEFTGT_IOCU0 2
#define CM_GCR_BASE_CMDEFTGT_IOCU1 3 #define CM_GCR_BASE_CMDEFTGT_IOCU1 3
@ -266,6 +267,12 @@ BUILD_CM_Cx_R_(tcid_8_priority, 0x80)
#define CM_REV_CM2_5 CM_ENCODE_REV(7, 0) #define CM_REV_CM2_5 CM_ENCODE_REV(7, 0)
#define CM_REV_CM3 CM_ENCODE_REV(8, 0) #define CM_REV_CM3 CM_ENCODE_REV(8, 0)
/* GCR_ERR_CONTROL register fields */
#define CM_GCR_ERR_CONTROL_L2_ECC_EN_SHF 1
#define CM_GCR_ERR_CONTROL_L2_ECC_EN_MSK (_ULCAST_(0x1) << 1)
#define CM_GCR_ERR_CONTROL_L2_ECC_SUPPORT_SHF 0
#define CM_GCR_ERR_CONTROL_L2_ECC_SUPPORT_MSK (_ULCAST_(0x1) << 0)
/* GCR_ERROR_CAUSE register fields */ /* GCR_ERROR_CAUSE register fields */
#define CM_GCR_ERROR_CAUSE_ERRTYPE_SHF 27 #define CM_GCR_ERROR_CAUSE_ERRTYPE_SHF 27
#define CM_GCR_ERROR_CAUSE_ERRTYPE_MSK (_ULCAST_(0x1f) << 27) #define CM_GCR_ERROR_CAUSE_ERRTYPE_MSK (_ULCAST_(0x1f) << 27)

4
arch/mips/kernel/process.c
View File

@ -50,9 +50,7 @@
#ifdef CONFIG_HOTPLUG_CPU #ifdef CONFIG_HOTPLUG_CPU
void arch_cpu_idle_dead(void) void arch_cpu_idle_dead(void)
{ {
/* What the heck is this check doing ? */ play_dead();
if (!cpumask_test_cpu(smp_processor_id(), &cpu_callin_map))
play_dead();
} }
#endif #endif

17
arch/mips/kernel/ptrace.c
View File

@ -647,6 +647,19 @@ static const struct user_regset_view user_mips64_view = {
.n = ARRAY_SIZE(mips64_regsets), .n = ARRAY_SIZE(mips64_regsets),
}; };
#ifdef CONFIG_MIPS32_N32
static const struct user_regset_view user_mipsn32_view = {
.name = "mipsn32",
.e_flags = EF_MIPS_ABI2,
.e_machine = ELF_ARCH,
.ei_osabi = ELF_OSABI,
.regsets = mips64_regsets,
.n = ARRAY_SIZE(mips64_regsets),
};
#endif /* CONFIG_MIPS32_N32 */
#endif /* CONFIG_64BIT */ #endif /* CONFIG_64BIT */
const struct user_regset_view *task_user_regset_view(struct task_struct *task) const struct user_regset_view *task_user_regset_view(struct task_struct *task)
@ -657,6 +670,10 @@ const struct user_regset_view *task_user_regset_view(struct task_struct *task)
#ifdef CONFIG_MIPS32_O32 #ifdef CONFIG_MIPS32_O32
if (test_tsk_thread_flag(task, TIF_32BIT_REGS)) if (test_tsk_thread_flag(task, TIF_32BIT_REGS))
return &user_mips_view; return &user_mips_view;
#endif
#ifdef CONFIG_MIPS32_N32
if (test_tsk_thread_flag(task, TIF_32BIT_ADDR))
return &user_mipsn32_view;
#endif #endif
return &user_mips64_view; return &user_mips64_view;
#endif #endif

78
arch/mips/kernel/setup.c
View File

@ -153,6 +153,35 @@ void __init detect_memory_region(phys_addr_t start, phys_addr_t sz_min, phys_add
add_memory_region(start, size, BOOT_MEM_RAM); add_memory_region(start, size, BOOT_MEM_RAM);
} }
bool __init memory_region_available(phys_addr_t start, phys_addr_t size)
{
int i;
bool in_ram = false, free = true;
for (i = 0; i < boot_mem_map.nr_map; i++) {
phys_addr_t start_, end_;
start_ = boot_mem_map.map[i].addr;
end_ = boot_mem_map.map[i].addr + boot_mem_map.map[i].size;
switch (boot_mem_map.map[i].type) {
case BOOT_MEM_RAM:
if (start >= start_ && start + size <= end_)
in_ram = true;
break;
case BOOT_MEM_RESERVED:
if ((start >= start_ && start < end_) ||
(start < start_ && start + size >= start_))
free = false;
break;
default:
continue;
}
}
return in_ram && free;
}
static void __init print_memory_map(void) static void __init print_memory_map(void)
{ {
int i; int i;
@ -332,11 +361,19 @@ static void __init bootmem_init(void)
#else /* !CONFIG_SGI_IP27 */ #else /* !CONFIG_SGI_IP27 */
static unsigned long __init bootmap_bytes(unsigned long pages)
{
unsigned long bytes = DIV_ROUND_UP(pages, 8);
return ALIGN(bytes, sizeof(long));
}
static void __init bootmem_init(void) static void __init bootmem_init(void)
{ {
unsigned long reserved_end; unsigned long reserved_end;
unsigned long mapstart = ~0UL; unsigned long mapstart = ~0UL;
unsigned long bootmap_size; unsigned long bootmap_size;
bool bootmap_valid = false;
int i; int i;
/* /*
@ -429,12 +466,43 @@ static void __init bootmem_init(void)
mapstart = max(mapstart, (unsigned long)PFN_UP(__pa(initrd_end))); mapstart = max(mapstart, (unsigned long)PFN_UP(__pa(initrd_end)));
#endif #endif
/*
* check that mapstart doesn't overlap with any of
* memory regions that have been reserved through eg. DTB
*/
bootmap_size = bootmap_bytes(max_low_pfn - min_low_pfn);
bootmap_valid = memory_region_available(PFN_PHYS(mapstart),
bootmap_size);
for (i = 0; i < boot_mem_map.nr_map && !bootmap_valid; i++) {
unsigned long mapstart_addr;
switch (boot_mem_map.map[i].type) {
case BOOT_MEM_RESERVED:
mapstart_addr = PFN_ALIGN(boot_mem_map.map[i].addr +
boot_mem_map.map[i].size);
if (PHYS_PFN(mapstart_addr) < mapstart)
break;
bootmap_valid = memory_region_available(mapstart_addr,
bootmap_size);
if (bootmap_valid)
mapstart = PHYS_PFN(mapstart_addr);
break;
default:
break;
}
}
if (!bootmap_valid)
panic("No memory area to place a bootmap bitmap");
/* /*
* Initialize the boot-time allocator with low memory only. * Initialize the boot-time allocator with low memory only.
*/ */
bootmap_size = init_bootmem_node(NODE_DATA(0), mapstart, if (bootmap_size != init_bootmem_node(NODE_DATA(0), mapstart,
min_low_pfn, max_low_pfn); min_low_pfn, max_low_pfn))
panic("Unexpected memory size required for bootmap");
for (i = 0; i < boot_mem_map.nr_map; i++) { for (i = 0; i < boot_mem_map.nr_map; i++) {
unsigned long start, end; unsigned long start, end;
@ -483,6 +551,10 @@ static void __init bootmem_init(void)
continue; continue;
default: default:
/* Not usable memory */ /* Not usable memory */
if (start > min_low_pfn && end < max_low_pfn)
reserve_bootmem(boot_mem_map.map[i].addr,
boot_mem_map.map[i].size,
BOOTMEM_DEFAULT);
continue; continue;
} }

4
arch/mips/kernel/smp-bmips.c
View File

@ -587,11 +587,11 @@ void __init bmips_cpu_setup(void)
/* Flush and enable RAC */ /* Flush and enable RAC */
cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
__raw_writel(cfg | 0x100, BMIPS_RAC_CONFIG); __raw_writel(cfg | 0x100, cbr + BMIPS_RAC_CONFIG);
__raw_readl(cbr + BMIPS_RAC_CONFIG); __raw_readl(cbr + BMIPS_RAC_CONFIG);
cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG); cfg = __raw_readl(cbr + BMIPS_RAC_CONFIG);
__raw_writel(cfg | 0xf, BMIPS_RAC_CONFIG); __raw_writel(cfg | 0xf, cbr + BMIPS_RAC_CONFIG);
__raw_readl(cbr + BMIPS_RAC_CONFIG); __raw_readl(cbr + BMIPS_RAC_CONFIG);
cfg = __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE); cfg = __raw_readl(cbr + BMIPS_RAC_ADDRESS_RANGE);

29
arch/mips/kernel/smp.c
View File

@ -68,6 +68,9 @@ EXPORT_SYMBOL(cpu_sibling_map);
cpumask_t cpu_core_map[NR_CPUS] __read_mostly; cpumask_t cpu_core_map[NR_CPUS] __read_mostly;
EXPORT_SYMBOL(cpu_core_map); EXPORT_SYMBOL(cpu_core_map);
static DECLARE_COMPLETION(cpu_starting);
static DECLARE_COMPLETION(cpu_running);
/* /*
* A logcal cpu mask containing only one VPE per core to * A logcal cpu mask containing only one VPE per core to
* reduce the number of IPIs on large MT systems. * reduce the number of IPIs on large MT systems.
@ -369,9 +372,12 @@ asmlinkage void start_secondary(void)
cpumask_set_cpu(cpu, &cpu_coherent_mask); cpumask_set_cpu(cpu, &cpu_coherent_mask);
notify_cpu_starting(cpu); notify_cpu_starting(cpu);
cpumask_set_cpu(cpu, &cpu_callin_map); /* Notify boot CPU that we're starting & ready to sync counters */
complete(&cpu_starting);
synchronise_count_slave(cpu); synchronise_count_slave(cpu);
/* The CPU is running and counters synchronised, now mark it online */
set_cpu_online(cpu, true); set_cpu_online(cpu, true);
set_cpu_sibling_map(cpu); set_cpu_sibling_map(cpu);
@ -379,6 +385,12 @@ asmlinkage void start_secondary(void)
calculate_cpu_foreign_map(); calculate_cpu_foreign_map();
/*
* Notify boot CPU that we're up & online and it can safely return
* from __cpu_up
*/
complete(&cpu_running);
/* /*
* irq will be enabled in ->smp_finish(), enabling it too early * irq will be enabled in ->smp_finish(), enabling it too early
* is dangerous. * is dangerous.
@ -430,22 +442,23 @@ void smp_prepare_boot_cpu(void)
{ {
set_cpu_possible(0, true); set_cpu_possible(0, true);
set_cpu_online(0, true); set_cpu_online(0, true);
cpumask_set_cpu(0, &cpu_callin_map);
} }
int __cpu_up(unsigned int cpu, struct task_struct *tidle) int __cpu_up(unsigned int cpu, struct task_struct *tidle)
{ {
mp_ops->boot_secondary(cpu, tidle); mp_ops->boot_secondary(cpu, tidle);
/* /* Wait for CPU to start and be ready to sync counters */
* Trust is futile. We should really have timeouts ... if (!wait_for_completion_timeout(&cpu_starting,
*/ msecs_to_jiffies(1000))) {
while (!cpumask_test_cpu(cpu, &cpu_callin_map)) { pr_crit("CPU%u: failed to start\n", cpu);
udelay(100); return -EIO;
schedule();
} }
synchronise_count_master(cpu); synchronise_count_master(cpu);
/* Wait for CPU to finish startup & mark itself online before return */
wait_for_completion(&cpu_running);
return 0; return 0;
} }

63
arch/mips/kernel/traps.c
View File

@ -51,6 +51,7 @@
#include <asm/idle.h> #include <asm/idle.h>
#include <asm/mips-cm.h> #include <asm/mips-cm.h>
#include <asm/mips-r2-to-r6-emul.h> #include <asm/mips-r2-to-r6-emul.h>
#include <asm/mips-cm.h>
#include <asm/mipsregs.h> #include <asm/mipsregs.h>
#include <asm/mipsmtregs.h> #include <asm/mipsmtregs.h>
#include <asm/module.h> #include <asm/module.h>
@ -1646,6 +1647,65 @@ __setup("nol2par", nol2parity);
*/ */
static inline void parity_protection_init(void) static inline void parity_protection_init(void)
{ {
#define ERRCTL_PE 0x80000000
#define ERRCTL_L2P 0x00800000
if (mips_cm_revision() >= CM_REV_CM3) {
ulong gcr_ectl, cp0_ectl;
/*
* With CM3 systems we need to ensure that the L1 & L2
* parity enables are set to the same value, since this
* is presumed by the hardware engineers.
*
* If the user disabled either of L1 or L2 ECC checking,
* disable both.
*/
l1parity &= l2parity;
l2parity &= l1parity;
/* Probe L1 ECC support */
cp0_ectl = read_c0_ecc();
write_c0_ecc(cp0_ectl | ERRCTL_PE);
back_to_back_c0_hazard();
cp0_ectl = read_c0_ecc();
/* Probe L2 ECC support */
gcr_ectl = read_gcr_err_control();
if (!(gcr_ectl & CM_GCR_ERR_CONTROL_L2_ECC_SUPPORT_MSK) ||
!(cp0_ectl & ERRCTL_PE)) {
/*
* One of L1 or L2 ECC checking isn't supported,
* so we cannot enable either.
*/
l1parity = l2parity = 0;
}
/* Configure L1 ECC checking */
if (l1parity)
cp0_ectl |= ERRCTL_PE;
else
cp0_ectl &= ~ERRCTL_PE;
write_c0_ecc(cp0_ectl);
back_to_back_c0_hazard();
WARN_ON(!!(read_c0_ecc() & ERRCTL_PE) != l1parity);
/* Configure L2 ECC checking */
if (l2parity)
gcr_ectl |= CM_GCR_ERR_CONTROL_L2_ECC_EN_MSK;
else
gcr_ectl &= ~CM_GCR_ERR_CONTROL_L2_ECC_EN_MSK;
write_gcr_err_control(gcr_ectl);
gcr_ectl = read_gcr_err_control();
gcr_ectl &= CM_GCR_ERR_CONTROL_L2_ECC_EN_MSK;
WARN_ON(!!gcr_ectl != l2parity);
pr_info("Cache parity protection %sabled\n",
l1parity ? "en" : "dis");
return;
}
switch (current_cpu_type()) { switch (current_cpu_type()) {
case CPU_24K: case CPU_24K:
case CPU_34K: case CPU_34K:
@ -1656,11 +1716,8 @@ static inline void parity_protection_init(void)
case CPU_PROAPTIV: case CPU_PROAPTIV:
case CPU_P5600: case CPU_P5600:
case CPU_QEMU_GENERIC: case CPU_QEMU_GENERIC:
case CPU_I6400:
case CPU_P6600: case CPU_P6600:
{ {
#define ERRCTL_PE 0x80000000
#define ERRCTL_L2P 0x00800000
unsigned long errctl; unsigned long errctl;
unsigned int l1parity_present, l2parity_present; unsigned int l1parity_present, l2parity_present;

30
arch/mips/math-emu/cp1emu.c
View File

@ -1781,7 +1781,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
SPFROMREG(fd, MIPSInst_FD(ir)); SPFROMREG(fd, MIPSInst_FD(ir));
rv.s = ieee754sp_maddf(fd, fs, ft); rv.s = ieee754sp_maddf(fd, fs, ft);
break; goto copcsr;
} }
case fmsubf_op: { case fmsubf_op: {
@ -1794,7 +1794,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
SPFROMREG(fd, MIPSInst_FD(ir)); SPFROMREG(fd, MIPSInst_FD(ir));
rv.s = ieee754sp_msubf(fd, fs, ft); rv.s = ieee754sp_msubf(fd, fs, ft);
break; goto copcsr;
} }
case frint_op: { case frint_op: {
@ -1818,7 +1818,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
rv.w = ieee754sp_2008class(fs); rv.w = ieee754sp_2008class(fs);
rfmt = w_fmt; rfmt = w_fmt;
break; goto copcsr;
} }
case fmin_op: { case fmin_op: {
@ -1830,7 +1830,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(ft, MIPSInst_FT(ir));
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
rv.s = ieee754sp_fmin(fs, ft); rv.s = ieee754sp_fmin(fs, ft);
break; goto copcsr;
} }
case fmina_op: { case fmina_op: {
@ -1842,7 +1842,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(ft, MIPSInst_FT(ir));
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
rv.s = ieee754sp_fmina(fs, ft); rv.s = ieee754sp_fmina(fs, ft);
break; goto copcsr;
} }
case fmax_op: { case fmax_op: {
@ -1854,7 +1854,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(ft, MIPSInst_FT(ir));
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
rv.s = ieee754sp_fmax(fs, ft); rv.s = ieee754sp_fmax(fs, ft);
break; goto copcsr;
} }
case fmaxa_op: { case fmaxa_op: {
@ -1866,7 +1866,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
SPFROMREG(ft, MIPSInst_FT(ir)); SPFROMREG(ft, MIPSInst_FT(ir));
SPFROMREG(fs, MIPSInst_FS(ir)); SPFROMREG(fs, MIPSInst_FS(ir));
rv.s = ieee754sp_fmaxa(fs, ft); rv.s = ieee754sp_fmaxa(fs, ft);
break; goto copcsr;
} }
case fabs_op: case fabs_op:
@ -2110,7 +2110,7 @@ copcsr:
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
DPFROMREG(fd, MIPSInst_FD(ir)); DPFROMREG(fd, MIPSInst_FD(ir));
rv.d = ieee754dp_maddf(fd, fs, ft); rv.d = ieee754dp_maddf(fd, fs, ft);
break; goto copcsr;
} }
case fmsubf_op: { case fmsubf_op: {
@ -2123,7 +2123,7 @@ copcsr:
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
DPFROMREG(fd, MIPSInst_FD(ir)); DPFROMREG(fd, MIPSInst_FD(ir));
rv.d = ieee754dp_msubf(fd, fs, ft); rv.d = ieee754dp_msubf(fd, fs, ft);
break; goto copcsr;
} }
case frint_op: { case frint_op: {
@ -2147,7 +2147,7 @@ copcsr:
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
rv.w = ieee754dp_2008class(fs); rv.w = ieee754dp_2008class(fs);
rfmt = w_fmt; rfmt = w_fmt;
break; goto copcsr;
} }
case fmin_op: { case fmin_op: {
@ -2159,7 +2159,7 @@ copcsr:
DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(ft, MIPSInst_FT(ir));
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
rv.d = ieee754dp_fmin(fs, ft); rv.d = ieee754dp_fmin(fs, ft);
break; goto copcsr;
} }
case fmina_op: { case fmina_op: {
@ -2171,7 +2171,7 @@ copcsr:
DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(ft, MIPSInst_FT(ir));
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
rv.d = ieee754dp_fmina(fs, ft); rv.d = ieee754dp_fmina(fs, ft);
break; goto copcsr;
} }
case fmax_op: { case fmax_op: {
@ -2183,7 +2183,7 @@ copcsr:
DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(ft, MIPSInst_FT(ir));
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
rv.d = ieee754dp_fmax(fs, ft); rv.d = ieee754dp_fmax(fs, ft);
break; goto copcsr;
} }
case fmaxa_op: { case fmaxa_op: {
@ -2195,7 +2195,7 @@ copcsr:
DPFROMREG(ft, MIPSInst_FT(ir)); DPFROMREG(ft, MIPSInst_FT(ir));
DPFROMREG(fs, MIPSInst_FS(ir)); DPFROMREG(fs, MIPSInst_FS(ir));
rv.d = ieee754dp_fmaxa(fs, ft); rv.d = ieee754dp_fmaxa(fs, ft);
break; goto copcsr;
} }
case fabs_op: case fabs_op:
@ -2386,7 +2386,6 @@ dcopuop:
break; break;
default: default:
/* Reserved R6 ops */ /* Reserved R6 ops */
pr_err("Reserved MIPS R6 CMP.condn.S operation\n");
return SIGILL; return SIGILL;
} }
} }
@ -2460,7 +2459,6 @@ dcopuop:
break; break;
default: default:
/* Reserved R6 ops */ /* Reserved R6 ops */
pr_err("Reserved MIPS R6 CMP.condn.D operation\n");
return SIGILL; return SIGILL;
} }
} }

2
arch/mips/mm/uasm-micromips.c
View File

@ -80,7 +80,7 @@ static struct insn insn_table_MM[] = {
{ insn_jr, M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS }, { insn_jr, M(mm_pool32a_op, 0, 0, 0, mm_jalr_op, mm_pool32axf_op), RS },
{ insn_lb, M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM }, { insn_lb, M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
{ insn_ld, 0, 0 }, { insn_ld, 0, 0 },
{ insn_lh, M(mm_lh32_op, 0, 0, 0, 0, 0), RS | RS | SIMM }, { insn_lh, M(mm_lh32_op, 0, 0, 0, 0, 0), RT | RS | SIMM },
{ insn_ll, M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM }, { insn_ll, M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM },
{ insn_lld, 0, 0 }, { insn_lld, 0, 0 },
{ insn_lui, M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM }, { insn_lui, M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM },

4
arch/mips/netlogic/common/irq.c
View File

@ -275,7 +275,7 @@ asmlinkage void plat_irq_dispatch(void)
do_IRQ(nlm_irq_to_xirq(node, i)); do_IRQ(nlm_irq_to_xirq(node, i));
} }
#ifdef CONFIG_OF #ifdef CONFIG_CPU_XLP
static const struct irq_domain_ops xlp_pic_irq_domain_ops = { static const struct irq_domain_ops xlp_pic_irq_domain_ops = {
.xlate = irq_domain_xlate_onetwocell, .xlate = irq_domain_xlate_onetwocell,
}; };
@ -348,7 +348,7 @@ void __init arch_init_irq(void)
#if defined(CONFIG_CPU_XLR) #if defined(CONFIG_CPU_XLR)
nlm_setup_fmn_irq(); nlm_setup_fmn_irq();
#endif #endif
#if defined(CONFIG_OF) #ifdef CONFIG_CPU_XLP
of_irq_init(xlp_pic_irq_ids); of_irq_init(xlp_pic_irq_ids);
#endif #endif
} }

2
arch/mips/pci/pci-mt7620.c
View File

@ -121,7 +121,7 @@ static int wait_pciephy_busy(void)
else else
break; break;
if (retry++ > WAITRETRY_MAX) { if (retry++ > WAITRETRY_MAX) {
printk(KERN_WARN "PCIE-PHY retry failed.\n"); pr_warn("PCIE-PHY retry failed.\n");
return -1; return -1;
} }
} }

4
arch/mips/ralink/mt7620.c
View File

@ -141,8 +141,8 @@ static struct rt2880_pmx_func i2c_grp_mt7628[] = {
FUNC("i2c", 0, 4, 2), FUNC("i2c", 0, 4, 2),
}; };
static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 36, 1) }; static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("refclk", 0, 37, 1) };
static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 37, 1) }; static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 36, 1) };
static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) }; static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) };
static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) }; static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) };

2
arch/openrisc/include/asm/uaccess.h
View File

@ -211,7 +211,7 @@ do { \
case 1: __get_user_asm(x, ptr, retval, "l.lbz"); break; \ case 1: __get_user_asm(x, ptr, retval, "l.lbz"); break; \
case 2: __get_user_asm(x, ptr, retval, "l.lhz"); break; \ case 2: __get_user_asm(x, ptr, retval, "l.lhz"); break; \
case 4: __get_user_asm(x, ptr, retval, "l.lwz"); break; \ case 4: __get_user_asm(x, ptr, retval, "l.lwz"); break; \
case 8: __get_user_asm2(x, ptr, retval); \ case 8: __get_user_asm2(x, ptr, retval); break; \
default: (x) = __get_user_bad(); \ default: (x) = __get_user_bad(); \
} \ } \
} while (0) } while (0)

12
arch/parisc/kernel/syscall.S
View File

@ -690,15 +690,15 @@ cas_action:
/* ELF32 Process entry path */ /* ELF32 Process entry path */
lws_compare_and_swap_2: lws_compare_and_swap_2:
#ifdef CONFIG_64BIT #ifdef CONFIG_64BIT
/* Clip the input registers */ /* Clip the input registers. We don't need to clip %r23 as we
only use it for word operations */
depdi 0, 31, 32, %r26 depdi 0, 31, 32, %r26
depdi 0, 31, 32, %r25 depdi 0, 31, 32, %r25
depdi 0, 31, 32, %r24 depdi 0, 31, 32, %r24
depdi 0, 31, 32, %r23
#endif #endif
/* Check the validity of the size pointer */ /* Check the validity of the size pointer */
subi,>>= 4, %r23, %r0 subi,>>= 3, %r23, %r0
b,n lws_exit_nosys b,n lws_exit_nosys
/* Jump to the functions which will load the old and new values into /* Jump to the functions which will load the old and new values into
@ -742,7 +742,7 @@ lws_compare_and_swap_2:
10: ldd 0(%r25), %r25 10: ldd 0(%r25), %r25
11: ldd 0(%r24), %r24 11: ldd 0(%r24), %r24
#else #else
/* Load new value into r22/r23 - high/low */ /* Load old value into r22/r23 - high/low */
10: ldw 0(%r25), %r22 10: ldw 0(%r25), %r22
11: ldw 4(%r25), %r23 11: ldw 4(%r25), %r23
/* Load new value into fr4 for atomic store later */ /* Load new value into fr4 for atomic store later */
@ -834,11 +834,11 @@ cas2_action:
copy %r0, %r28 copy %r0, %r28
#else #else
/* Compare first word */ /* Compare first word */
19: ldw,ma 0(%r26), %r29 19: ldw 0(%r26), %r29
sub,= %r29, %r22, %r0 sub,= %r29, %r22, %r0
b,n cas2_end b,n cas2_end
/* Compare second word */ /* Compare second word */
20: ldw,ma 4(%r26), %r29 20: ldw 4(%r26), %r29
sub,= %r29, %r23, %r0 sub,= %r29, %r23, %r0
b,n cas2_end b,n cas2_end
/* Perform the store */ /* Perform the store */

5
arch/powerpc/Kconfig
View File

@ -1087,11 +1087,6 @@ source "arch/powerpc/Kconfig.debug"
source "security/Kconfig" source "security/Kconfig"
config KEYS_COMPAT
bool
depends on COMPAT && KEYS
default y
source "crypto/Kconfig" source "crypto/Kconfig"
config PPC_LIB_RHEAP config PPC_LIB_RHEAP

11
arch/powerpc/Makefile
View File

@ -72,8 +72,15 @@ GNUTARGET := powerpc
MULTIPLEWORD := -mmultiple MULTIPLEWORD := -mmultiple
endif endif
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mbig-endian) ifdef CONFIG_PPC64
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mabi=elfv1)
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mcall-aixdesc)
aflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mabi=elfv1)
aflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mabi=elfv2
endif
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mlittle-endian cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mlittle-endian
cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(call cc-option,-mbig-endian)
ifneq ($(cc-name),clang) ifneq ($(cc-name),clang)
cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mno-strict-align cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -mno-strict-align
endif endif
@ -113,7 +120,9 @@ ifeq ($(CONFIG_CPU_LITTLE_ENDIAN),y)
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv2,$(call cc-option,-mcall-aixdesc)) CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv2,$(call cc-option,-mcall-aixdesc))
AFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv2) AFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv2)
else else
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv1)
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcall-aixdesc) CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcall-aixdesc)
AFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mabi=elfv1)
endif endif
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc)) CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mcmodel=medium,$(call cc-option,-mminimal-toc))
CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions) CFLAGS-$(CONFIG_PPC64) += $(call cc-option,-mno-pointers-to-nested-functions)

4
arch/powerpc/boot/dts/fsl/kmcoge4.dts
View File

@ -83,6 +83,10 @@
}; };
}; };
sdhc@114000 {
status = "disabled";
};
i2c@119000 { i2c@119000 {
status = "disabled"; status = "disabled";
}; };

4
arch/powerpc/include/asm/book3s/64/hash.h
View File

@ -201,6 +201,10 @@ extern int __meminit hash__vmemmap_create_mapping(unsigned long start,
unsigned long phys); unsigned long phys);
extern void hash__vmemmap_remove_mapping(unsigned long start, extern void hash__vmemmap_remove_mapping(unsigned long start,
unsigned long page_size); unsigned long page_size);
int hash__create_section_mapping(unsigned long start, unsigned long end);
int hash__remove_section_mapping(unsigned long start, unsigned long end);
#endif /* !__ASSEMBLY__ */ #endif /* !__ASSEMBLY__ */
#endif /* __KERNEL__ */ #endif /* __KERNEL__ */
#endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */ #endif /* _ASM_POWERPC_BOOK3S_64_HASH_H */

19
arch/powerpc/include/asm/checksum.h
View File

@ -53,17 +53,25 @@ static inline __sum16 csum_fold(__wsum sum)
return (__force __sum16)(~((__force u32)sum + tmp) >> 16); return (__force __sum16)(~((__force u32)sum + tmp) >> 16);
} }
static inline u32 from64to32(u64 x)
{
/* add up 32-bit and 32-bit for 32+c bit */
x = (x & 0xffffffff) + (x >> 32);
/* add up carry.. */
x = (x & 0xffffffff) + (x >> 32);
return (u32)x;
}
static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len, static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr, __u32 len,
__u8 proto, __wsum sum) __u8 proto, __wsum sum)
{ {
#ifdef __powerpc64__ #ifdef __powerpc64__
unsigned long s = (__force u32)sum; u64 s = (__force u32)sum;
s += (__force u32)saddr; s += (__force u32)saddr;
s += (__force u32)daddr; s += (__force u32)daddr;
s += proto + len; s += proto + len;
s += (s >> 32); return (__force __wsum) from64to32(s);
return (__force __wsum) s;
#else #else
__asm__("\n\ __asm__("\n\
addc %0,%0,%1 \n\ addc %0,%0,%1 \n\
@ -100,7 +108,7 @@ static inline __wsum csum_add(__wsum csum, __wsum addend)
#ifdef __powerpc64__ #ifdef __powerpc64__
res += (__force u64)addend; res += (__force u64)addend;
return (__force __wsum)((u32)res + (res >> 32)); return (__force __wsum) from64to32(res);
#else #else
asm("addc %0,%0,%1;" asm("addc %0,%0,%1;"
"addze %0,%0;" "addze %0,%0;"
@ -123,8 +131,7 @@ static inline __wsum ip_fast_csum_nofold(const void *iph, unsigned int ihl)
for (i = 0; i < ihl - 1; i++, ptr++) for (i = 0; i < ihl - 1; i++, ptr++)
s += *ptr; s += *ptr;
s += (s >> 32); return (__force __wsum)from64to32(s);
return (__force __wsum)s;
#else #else
__wsum sum, tmp; __wsum sum, tmp;

2
arch/powerpc/kernel/cpu_setup_power.S
View File

@ -97,6 +97,7 @@ _GLOBAL(__setup_cpu_power9)
beqlr beqlr
li r0,0 li r0,0
mtspr SPRN_LPID,r0 mtspr SPRN_LPID,r0
mtspr SPRN_PID,r0
mfspr r3,SPRN_LPCR mfspr r3,SPRN_LPCR
LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)
or r3, r3, r4 or r3, r3, r4
@ -119,6 +120,7 @@ _GLOBAL(__restore_cpu_power9)
beqlr beqlr
li r0,0 li r0,0
mtspr SPRN_LPID,r0 mtspr SPRN_LPID,r0
mtspr SPRN_PID,r0
mfspr r3,SPRN_LPCR mfspr r3,SPRN_LPCR
LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE) LOAD_REG_IMMEDIATE(r4, LPCR_PECEDH | LPCR_PECE_HVEE | LPCR_HVICE)
or r3, r3, r4 or r3, r3, r4

2
arch/powerpc/kernel/signal.c
View File

@ -102,7 +102,7 @@ static void check_syscall_restart(struct pt_regs *regs, struct k_sigaction *ka,
static void do_signal(struct task_struct *tsk) static void do_signal(struct task_struct *tsk)
{ {
sigset_t *oldset = sigmask_to_save(); sigset_t *oldset = sigmask_to_save();
struct ksignal ksig; struct ksignal ksig = { .sig = 0 };
int ret; int ret;
int is32 = is_32bit_task(); int is32 = is_32bit_task();

1
arch/powerpc/kernel/time.c
View File

@ -407,6 +407,7 @@ void arch_vtime_task_switch(struct task_struct *prev)
struct cpu_accounting_data *acct = get_accounting(current); struct cpu_accounting_data *acct = get_accounting(current);
acct->starttime = get_accounting(prev)->starttime; acct->starttime = get_accounting(prev)->starttime;
acct->startspurr = get_accounting(prev)->startspurr;
acct->system_time = 0; acct->system_time = 0;
acct->user_time = 0; acct->user_time = 0;
} }

5
arch/powerpc/kvm/book3s_hv_rm_xics.c
View File

@ -376,6 +376,7 @@ static void icp_rm_deliver_irq(struct kvmppc_xics *xics, struct kvmppc_icp *icp,
*/ */
if (reject && reject != XICS_IPI) { if (reject && reject != XICS_IPI) {
arch_spin_unlock(&ics->lock); arch_spin_unlock(&ics->lock);
icp->n_reject++;
new_irq = reject; new_irq = reject;
goto again; goto again;
} }
@ -707,10 +708,8 @@ int kvmppc_rm_h_eoi(struct kvm_vcpu *vcpu, unsigned long xirr)
state = &ics->irq_state[src]; state = &ics->irq_state[src];
/* Still asserted, resend it */ /* Still asserted, resend it */
if (state->asserted) { if (state->asserted)
icp->n_reject++;
icp_rm_deliver_irq(xics, icp, irq); icp_rm_deliver_irq(xics, icp, irq);
}
if (!hlist_empty(&vcpu->kvm->irq_ack_notifier_list)) { if (!hlist_empty(&vcpu->kvm->irq_ack_notifier_list)) {
icp->rm_action |= XICS_RM_NOTIFY_EOI; icp->rm_action |= XICS_RM_NOTIFY_EOI;

3
arch/powerpc/kvm/powerpc.c
View File

@ -601,8 +601,7 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
break; break;
#endif #endif
case KVM_CAP_PPC_HTM: case KVM_CAP_PPC_HTM:
r = cpu_has_feature(CPU_FTR_TM_COMP) && r = cpu_has_feature(CPU_FTR_TM_COMP) && hv_enabled;
is_kvmppc_hv_enabled(kvm);
break; break;
default: default:
r = 0; r = 0;

4
arch/powerpc/mm/hash_utils_64.c
View File

@ -747,7 +747,7 @@ static unsigned long __init htab_get_table_size(void)
} }
#ifdef CONFIG_MEMORY_HOTPLUG #ifdef CONFIG_MEMORY_HOTPLUG
int create_section_mapping(unsigned long start, unsigned long end) int hash__create_section_mapping(unsigned long start, unsigned long end)
{ {
int rc = htab_bolt_mapping(start, end, __pa(start), int rc = htab_bolt_mapping(start, end, __pa(start),
pgprot_val(PAGE_KERNEL), mmu_linear_psize, pgprot_val(PAGE_KERNEL), mmu_linear_psize,
@ -761,7 +761,7 @@ int create_section_mapping(unsigned long start, unsigned long end)
return rc; return rc;
} }
int remove_section_mapping(unsigned long start, unsigned long end) int hash__remove_section_mapping(unsigned long start, unsigned long end)
{ {
int rc = htab_remove_mapping(start, end, mmu_linear_psize, int rc = htab_remove_mapping(start, end, mmu_linear_psize,
mmu_kernel_ssize); mmu_kernel_ssize);

33
arch/powerpc/mm/init_64.c
View File

@ -42,6 +42,8 @@
#include <linux/memblock.h> #include <linux/memblock.h>
#include <linux/hugetlb.h> #include <linux/hugetlb.h>
#include <linux/slab.h> #include <linux/slab.h>
#include <linux/of_fdt.h>
#include <linux/libfdt.h>
#include <asm/pgalloc.h> #include <asm/pgalloc.h>
#include <asm/page.h> #include <asm/page.h>
@ -421,6 +423,28 @@ static int __init parse_disable_radix(char *p)
} }
early_param("disable_radix", parse_disable_radix); early_param("disable_radix", parse_disable_radix);
/*
* If we're running under a hypervisor, we currently can't do radix
* since we don't have the code to do the H_REGISTER_PROC_TBL hcall.
* We tell that we're running under a hypervisor by looking for the
* /chosen/ibm,architecture-vec-5 property.
*/
static void early_check_vec5(void)
{
unsigned long root, chosen;
int size;
const u8 *vec5;
root = of_get_flat_dt_root();
chosen = of_get_flat_dt_subnode_by_name(root, "chosen");
if (chosen == -FDT_ERR_NOTFOUND)
return;
vec5 = of_get_flat_dt_prop(chosen, "ibm,architecture-vec-5", &size);
if (!vec5)
return;
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
}
void __init mmu_early_init_devtree(void) void __init mmu_early_init_devtree(void)
{ {
/* Disable radix mode based on kernel command line. */ /* Disable radix mode based on kernel command line. */
@ -428,6 +452,15 @@ void __init mmu_early_init_devtree(void)
if (disable_radix || !(mfmsr() & MSR_HV)) if (disable_radix || !(mfmsr() & MSR_HV))
cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX; cur_cpu_spec->mmu_features &= ~MMU_FTR_TYPE_RADIX;
/*
* Check /chosen/ibm,architecture-vec-5 if running as a guest.
* When running bare-metal, we can use radix if we like
* even though the ibm,architecture-vec-5 property created by
* skiboot doesn't have the necessary bits set.
*/
if (early_radix_enabled() && !(mfmsr() & MSR_HV))
early_check_vec5();
if (early_radix_enabled()) if (early_radix_enabled())
radix__early_init_devtree(); radix__early_init_devtree();
else else

18
arch/powerpc/mm/pgtable-book3s64.c
View File

@ -125,3 +125,21 @@ void mmu_cleanup_all(void)
else if (mmu_hash_ops.hpte_clear_all) else if (mmu_hash_ops.hpte_clear_all)
mmu_hash_ops.hpte_clear_all(); mmu_hash_ops.hpte_clear_all();
} }
#ifdef CONFIG_MEMORY_HOTPLUG
int create_section_mapping(unsigned long start, unsigned long end)
{
if (radix_enabled())
return -ENODEV;
return hash__create_section_mapping(start, end);
}
int remove_section_mapping(unsigned long start, unsigned long end)
{
if (radix_enabled())
return -ENODEV;
return hash__remove_section_mapping(start, end);
}
#endif /* CONFIG_MEMORY_HOTPLUG */

4
arch/powerpc/mm/pgtable-radix.c
View File

@ -173,6 +173,10 @@ redo:
*/ */
register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12); register_process_table(__pa(process_tb), 0, PRTB_SIZE_SHIFT - 12);
pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd); pr_info("Process table %p and radix root for kernel: %p\n", process_tb, init_mm.pgd);
asm volatile("ptesync" : : : "memory");
asm volatile(PPC_TLBIE_5(%0,%1,2,1,1) : :
"r" (TLBIEL_INVAL_SET_LPID), "r" (0));
asm volatile("eieio; tlbsync; ptesync" : : : "memory");
} }
static void __init radix_init_partition_table(void) static void __init radix_init_partition_table(void)

8
arch/powerpc/perf/core-book3s.c
View File

@ -401,8 +401,12 @@ static __u64 power_pmu_bhrb_to(u64 addr)
int ret; int ret;
__u64 target; __u64 target;
if (is_kernel_addr(addr)) if (is_kernel_addr(addr)) {
return branch_target((unsigned int *)addr); if (probe_kernel_read(&instr, (void *)addr, sizeof(instr)))
return 0;
return branch_target(&instr);
}
/* Userspace: need copy instruction here then translate it */ /* Userspace: need copy instruction here then translate it */
pagefault_disable(); pagefault_disable();

2
arch/powerpc/perf/hv-24x7.c
View File

@ -516,7 +516,7 @@ static int memord(const void *d1, size_t s1, const void *d2, size_t s2)
{ {
if (s1 < s2) if (s1 < s2)
return 1; return 1;
if (s2 > s1) if (s1 > s2)
return -1; return -1;
return memcmp(d1, d2, s1); return memcmp(d1, d2, s1);

4
arch/powerpc/perf/isa207-common.h
View File

@ -201,6 +201,10 @@
CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \ CNST_PMC_VAL(1) | CNST_PMC_VAL(2) | CNST_PMC_VAL(3) | \
CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL CNST_PMC_VAL(4) | CNST_PMC_VAL(5) | CNST_PMC_VAL(6) | CNST_NC_VAL
/*
* Lets restrict use of PMC5 for instruction counting.
*/
#define P9_DD1_TEST_ADDER (ISA207_TEST_ADDER | CNST_PMC_VAL(5))
/* Bits in MMCR1 for PowerISA v2.07 */ /* Bits in MMCR1 for PowerISA v2.07 */
#define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1))) #define MMCR1_UNIT_SHIFT(pmc) (60 - (4 * ((pmc) - 1)))

2
arch/powerpc/perf/power9-pmu.c
View File

@ -295,7 +295,7 @@ static struct power_pmu power9_pmu = {
.name = "POWER9", .name = "POWER9",
.n_counter = MAX_PMU_COUNTERS, .n_counter = MAX_PMU_COUNTERS,
.add_fields = ISA207_ADD_FIELDS, .add_fields = ISA207_ADD_FIELDS,
.test_adder = ISA207_TEST_ADDER, .test_adder = P9_DD1_TEST_ADDER,
.compute_mmcr = isa207_compute_mmcr, .compute_mmcr = isa207_compute_mmcr,
.config_bhrb = power9_config_bhrb, .config_bhrb = power9_config_bhrb,
.bhrb_filter_map = power9_bhrb_filter_map, .bhrb_filter_map = power9_bhrb_filter_map,

6
arch/powerpc/platforms/powernv/opal-async.c
View File

@ -39,18 +39,18 @@ int __opal_async_get_token(void)
int token; int token;
spin_lock_irqsave(&opal_async_comp_lock, flags); spin_lock_irqsave(&opal_async_comp_lock, flags);
token = find_first_bit(opal_async_complete_map, opal_max_async_tokens); token = find_first_zero_bit(opal_async_token_map, opal_max_async_tokens);
if (token >= opal_max_async_tokens) { if (token >= opal_max_async_tokens) {
token = -EBUSY; token = -EBUSY;
goto out; goto out;
} }
if (__test_and_set_bit(token, opal_async_token_map)) { if (!__test_and_clear_bit(token, opal_async_complete_map)) {
token = -EBUSY; token = -EBUSY;
goto out; goto out;
} }
__clear_bit(token, opal_async_complete_map); __set_bit(token, opal_async_token_map);
out: out:
spin_unlock_irqrestore(&opal_async_comp_lock, flags); spin_unlock_irqrestore(&opal_async_comp_lock, flags);

3
arch/powerpc/platforms/powernv/pci-ioda.c
View File

@ -2623,6 +2623,9 @@ static long pnv_pci_ioda2_table_alloc_pages(int nid, __u64 bus_offset,
level_shift = entries_shift + 3; level_shift = entries_shift + 3;
level_shift = max_t(unsigned, level_shift, PAGE_SHIFT); level_shift = max_t(unsigned, level_shift, PAGE_SHIFT);
if ((level_shift - 3) * levels + page_shift >= 60)
return -EINVAL;
/* Allocate TCE table */ /* Allocate TCE table */
addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift, addr = pnv_pci_ioda2_table_do_alloc_pages(nid, level_shift,
levels, tce_table_size, &offset, &total_allocated); levels, tce_table_size, &offset, &total_allocated);

2
arch/powerpc/platforms/powernv/setup.c
View File

@ -289,7 +289,7 @@ static unsigned long pnv_get_proc_freq(unsigned int cpu)
{ {
unsigned long ret_freq; unsigned long ret_freq;
ret_freq = cpufreq_quick_get(cpu) * 1000ul; ret_freq = cpufreq_get(cpu) * 1000ul;
/* /*
* If the backend cpufreq driver does not exist, * If the backend cpufreq driver does not exist,

5
arch/powerpc/sysdev/axonram.c
View File

@ -274,7 +274,9 @@ failed:
if (bank->disk->major > 0) if (bank->disk->major > 0)
unregister_blkdev(bank->disk->major, unregister_blkdev(bank->disk->major,
bank->disk->disk_name); bank->disk->disk_name);
del_gendisk(bank->disk); if (bank->disk->flags & GENHD_FL_UP)
del_gendisk(bank->disk);
put_disk(bank->disk);
} }
device->dev.platform_data = NULL; device->dev.platform_data = NULL;
if (bank->io_addr != 0) if (bank->io_addr != 0)
@ -299,6 +301,7 @@ axon_ram_remove(struct platform_device *device)
device_remove_file(&device->dev, &dev_attr_ecc); device_remove_file(&device->dev, &dev_attr_ecc);
free_irq(bank->irq_id, device); free_irq(bank->irq_id, device);
del_gendisk(bank->disk); del_gendisk(bank->disk);
put_disk(bank->disk);
iounmap((void __iomem *) bank->io_addr); iounmap((void __iomem *) bank->io_addr);
kfree(bank); kfree(bank);

4
arch/powerpc/sysdev/ipic.c
View File

@ -845,12 +845,12 @@ void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq)
u32 ipic_get_mcp_status(void) u32 ipic_get_mcp_status(void)
{ {
return ipic_read(primary_ipic->regs, IPIC_SERMR); return ipic_read(primary_ipic->regs, IPIC_SERSR);
} }
void ipic_clear_mcp_status(u32 mask) void ipic_clear_mcp_status(u32 mask)
{ {
ipic_write(primary_ipic->regs, IPIC_SERMR, mask); ipic_write(primary_ipic->regs, IPIC_SERSR, mask);
} }
/* Return an interrupt vector or 0 if no interrupt is pending. */ /* Return an interrupt vector or 0 if no interrupt is pending. */

3
arch/s390/Kconfig
View File

@ -359,9 +359,6 @@ config COMPAT
config SYSVIPC_COMPAT config SYSVIPC_COMPAT
def_bool y if COMPAT && SYSVIPC def_bool y if COMPAT && SYSVIPC
config KEYS_COMPAT
def_bool y if COMPAT && KEYS
config SMP config SMP
def_bool y def_bool y
prompt "Symmetric multi-processing support" prompt "Symmetric multi-processing support"

7
arch/s390/crypto/aes_s390.c
View File

@ -28,6 +28,7 @@
#include <linux/cpufeature.h> #include <linux/cpufeature.h>
#include <linux/init.h> #include <linux/init.h>
#include <linux/spinlock.h> #include <linux/spinlock.h>
#include <linux/fips.h>
#include <crypto/xts.h> #include <crypto/xts.h>
#include <asm/cpacf.h> #include <asm/cpacf.h>
@ -501,6 +502,12 @@ static int xts_aes_set_key(struct crypto_tfm *tfm, const u8 *in_key,
if (err) if (err)
return err; return err;
/* In fips mode only 128 bit or 256 bit keys are valid */
if (fips_enabled && key_len != 32 && key_len != 64) {
tfm->crt_flags |= CRYPTO_TFM_RES_BAD_KEY_LEN;
return -EINVAL;
}
/* Pick the correct function code based on the key length */ /* Pick the correct function code based on the key length */
fc = (key_len == 32) ? CPACF_KM_XTS_128 : fc = (key_len == 32) ? CPACF_KM_XTS_128 :
(key_len == 64) ? CPACF_KM_XTS_256 : 0; (key_len == 64) ? CPACF_KM_XTS_256 : 0;

40
arch/s390/crypto/prng.c
View File

@ -110,22 +110,30 @@ static const u8 initial_parm_block[32] __initconst = {
/*** helper functions ***/ /*** helper functions ***/
/*
* generate_entropy:
* This algorithm produces 64 bytes of entropy data based on 1024
* individual stckf() invocations assuming that each stckf() value
* contributes 0.25 bits of entropy. So the caller gets 256 bit
* entropy per 64 byte or 4 bits entropy per byte.
*/
static int generate_entropy(u8 *ebuf, size_t nbytes) static int generate_entropy(u8 *ebuf, size_t nbytes)
{ {
int n, ret = 0; int n, ret = 0;
u8 *pg, *h, hash[32]; u8 *pg, *h, hash[64];
pg = (u8 *) __get_free_page(GFP_KERNEL); /* allocate 2 pages */
pg = (u8 *) __get_free_pages(GFP_KERNEL, 1);
if (!pg) { if (!pg) {
prng_errorflag = PRNG_GEN_ENTROPY_FAILED; prng_errorflag = PRNG_GEN_ENTROPY_FAILED;
return -ENOMEM; return -ENOMEM;
} }
while (nbytes) { while (nbytes) {
/* fill page with urandom bytes */ /* fill pages with urandom bytes */
get_random_bytes(pg, PAGE_SIZE); get_random_bytes(pg, 2*PAGE_SIZE);
/* exor page with stckf values */ /* exor pages with 1024 stckf values */
for (n = 0; n < PAGE_SIZE / sizeof(u64); n++) { for (n = 0; n < 2 * PAGE_SIZE / sizeof(u64); n++) {
u64 *p = ((u64 *)pg) + n; u64 *p = ((u64 *)pg) + n;
*p ^= get_tod_clock_fast(); *p ^= get_tod_clock_fast();
} }
@ -134,8 +142,8 @@ static int generate_entropy(u8 *ebuf, size_t nbytes)
h = hash; h = hash;
else else
h = ebuf; h = ebuf;
/* generate sha256 from this page */ /* hash over the filled pages */
cpacf_kimd(CPACF_KIMD_SHA_256, h, pg, PAGE_SIZE); cpacf_kimd(CPACF_KIMD_SHA_512, h, pg, 2*PAGE_SIZE);
if (n < sizeof(hash)) if (n < sizeof(hash))
memcpy(ebuf, hash, n); memcpy(ebuf, hash, n);
ret += n; ret += n;
@ -143,7 +151,7 @@ static int generate_entropy(u8 *ebuf, size_t nbytes)
nbytes -= n; nbytes -= n;
} }
free_page((unsigned long)pg); free_pages((unsigned long)pg, 1);
return ret; return ret;
} }
@ -334,7 +342,7 @@ static int __init prng_sha512_selftest(void)
static int __init prng_sha512_instantiate(void) static int __init prng_sha512_instantiate(void)
{ {
int ret, datalen; int ret, datalen;
u8 seed[64]; u8 seed[64 + 32 + 16];
pr_debug("prng runs in SHA-512 mode " pr_debug("prng runs in SHA-512 mode "
"with chunksize=%d and reseed_limit=%u\n", "with chunksize=%d and reseed_limit=%u\n",
@ -357,12 +365,12 @@ static int __init prng_sha512_instantiate(void)
if (ret) if (ret)
goto outfree; goto outfree;
/* generate initial seed bytestring, first 48 bytes of entropy */ /* generate initial seed bytestring, with 256 + 128 bits entropy */
ret = generate_entropy(seed, 48); ret = generate_entropy(seed, 64 + 32);
if (ret != 48) if (ret != 64 + 32)
goto outfree; goto outfree;
/* followed by 16 bytes of unique nonce */ /* followed by 16 bytes of unique nonce */
get_tod_clock_ext(seed + 48); get_tod_clock_ext(seed + 64 + 32);
/* initial seed of the ppno drng */ /* initial seed of the ppno drng */
cpacf_ppno(CPACF_PPNO_SHA512_DRNG_SEED, cpacf_ppno(CPACF_PPNO_SHA512_DRNG_SEED,
@ -395,9 +403,9 @@ static void prng_sha512_deinstantiate(void)
static int prng_sha512_reseed(void) static int prng_sha512_reseed(void)
{ {
int ret; int ret;
u8 seed[32]; u8 seed[64];
/* generate 32 bytes of fresh entropy */ /* fetch 256 bits of fresh entropy */
ret = generate_entropy(seed, sizeof(seed)); ret = generate_entropy(seed, sizeof(seed));
if (ret != sizeof(seed)) if (ret != sizeof(seed))
return ret; return ret;

8
arch/s390/include/asm/asm-prototypes.h Normal file
View File

@ -0,0 +1,8 @@
#ifndef _ASM_S390_PROTOTYPES_H
#include <linux/kvm_host.h>
#include <linux/ftrace.h>
#include <asm/fpu/api.h>
#include <asm-generic/asm-prototypes.h>
#endif /* _ASM_S390_PROTOTYPES_H */

Some files were not shown because too many files have changed in this diff Show More