Add framebuffer address change

U-boot size calculation fix

Makefile

@@ -4,7 +4,7 @@ CC:=$(CROSS_COMPILE)gcc
 STRIP:=$(CROSS_COMPILE)strip
 
 .PHONY:
-all: AppMain.bin
+all: AppMain.bin m4_loader.bin
 
 .PHONY:
 clean:
@@ -13,3 +13,7 @@ clean:
 AppMain.bin:
 	@$(AS) main.S -o main.elf
 	@./extract.py -p main.elf AppMain.bin
+
+m4_loader.bin:
+	@$(AS) m4_loader.S -mcpu=cortex-m4 -o m4_loader.elf
+	@./extract.py -p m4_loader.elf m4_loader.bin

m4_loader.S

@@ -0,0 +1,40 @@
+.text
+    .thumb
+    .syntax unified
+    .align 2
+    .global _start
+
+_start:
+    cpsid i
+//LPTMR0 interrupt stop
+    ldr r0, =0x4102e000
+    eor r1, r1, r1
+    str r1, [r0]
+//M4 RTOS loader
+    ldr r0, =0x1FFD2000 //M4 SRAM start addr
+    ldr r1, =0x67400000 //M4 RTOS preload addr
+    ldr r2, =0 //increment register
+    ldr r4, [r1, #-4] //M4 RTOS size
+loop:
+    ldr r3, [r1, r2] //load from dram
+    str r3, [r0, r2] //store to sram
+    add r2, #4 //increment
+    cmp r2, r4 //does copy end?
+    ble loop
+//return address override
+    mrs r4, psp
+    adr r5, jumper
+    orr r5, r5, #1
+    str r5, [r4,#24]
+    bx lr //exit interrupt handler
+
+jumper: //M4 RTOS image jumper
+    mrs r0, control
+    bic r0, #2
+    msr control, r0
+    isb
+    ldr r0, =0x1ffd2000 //M4 RTOS image head addr
+    ldr r1, [r0] //initial stack addr
+    mov sp, r1
+    ldr r2, [r0,#4] //reset vector
+    bx r2

main.S

@@ -3,6 +3,54 @@
     .global _start
 
 _start:
+//M4 RTOS loader snipet prep
+    ldr r4, =0x60006400 //fopen addr
+    adr r0, [.LC2] //file name
+    adr r1, [.LC1] //open mode
+    blx r4
+    add r5, r4, #0xc //fread addr
+    mov r3, r0 //file descriptor
+    ldr r0, =0x1ffe4000 //fread destination
+    mov r1, #1 //read unit size
+    mov r2, r0 //read unit count(over size)
+    blx r5
+
+//M4 RTOS preload
+    ldr r4, =0x60006400 //fopen addr
+    adr r0, [.LC3] //file name
+    adr r1, [.LC1] //open mode
+    blx r4
+    add r5, r4, #0xc //fread addr
+    mov r3, r0 //file descriptor
+    ldr r0, =0x37400000 //fread destination
+    mov r1, #1 //read unit size
+    mov r2, r0 //read unit count(over size)
+    blx r5
+
+//M4 RTOS size get
+    ldr r4, =0x60006444 //stat addr
+    adr r0, [.LC3] //file name
+    sub sp, sp, #0x14
+    mov r1, sp
+    blx r4
+    ldr r0, =0x373ffffc //store size before data
+    ldr r1, [sp,#0x10]
+    str r1, [r0]
+
+//M4 interrupt prep
+    ldr r4, =0x1ffd20d0 //NVIC MCM vector
+    ldr r5, =0x1ffe4001 //loader addr | 0x1(thumb)
+    str r5, [r4] //override interrupt handler
+    
+//wait until M4 RTOS copied
+    ldr r4, =0x1ffd2000 //get sram img start addr
+    add r0, r0, #4 //get dram rtos addr
+    ldr r3, [r0, r1] //get last word of rtos on dram
+rtos_loop:
+    ldr r2, [r4,r1] //get last word of rtos on sram
+    cmp r2,r3
+    bne rtos_loop
+
 //preload U-Boot from sd
     ldr r4, =0x60006400 //fopen addr
     adr r0, [.LC0] //file name
@@ -20,13 +68,17 @@ _start:
     .ascii  "SD0:\\u-boot.bin\000"
     .LC1:
     .ascii  "r\000"
+    .LC2:
+    .ascii  "SD0:\\m4_loader.bin\000"
+    .LC3:
+    .ascii  "SD0:\\m4_rtos.bin\000"
 .align 4
     continue:
     cpsid if //disable interrupt
 
 //copy U-Boot to head of RAM 
     ldr r3, =0x37500000 //copy start
-    ldr r1, =0x37540000 //copy end
+    add r1, r3, r0 //copy end
     copy_loop:
     mov r2, r3
     sub r3, r3, #0x7500000 //copy distination
@@ -34,7 +86,7 @@ _start:
     cmp r2, r1
     str r0, [r3]
     mov r3, r2
-    bne copy_loop
+    blt copy_loop
 
 //RAM clear
     ldr r2,=0x60200000 //clear start
@@ -46,6 +98,13 @@ _start:
     str r1,[r2],#4
     beq clear_loop
 
+
+//LCDIF CUR_BUF change
+    ldr r1,=0x40aa0000 //LCDIF_CTRL
+    ldr r3,=0x62000000 //new framebuffer addr
+    str r3,[r1,#0x50]
+
+
     ldr r0, =0x60000000
 
     mrc p15, 0, r8, c14, c2, 1