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https://github.com/brain-hackers/u-boot-brain
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ffd4c7c2ec
There is no reason not to use the Linux "jedec,spi-nor" binding in U-Boot dts files. This compatible has been added in sf_probe, let use it. This patch switches to jedec,spi-nor when spi-flash is used in the DTS and DTSI files, and removed spi-flash when jedec,spi-nor is already present. The x86 dts are switched in a separate commit since it depends on a change in fdtdec. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com> Reviewed-by: Evgeniy Paltsev <paltsev@synopsys.com> Reviewed-by: Rick Chen <rick@andestech.com> Reviewed-by: Patrick Delaunay <Patrick.delaunay@st.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
114 lines
1.6 KiB
Plaintext
114 lines
1.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+
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/*
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* Copyright (C) 2015 Stefan Roese <sr@denx.de>
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*/
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#include "socfpga_cyclone5.dtsi"
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/ {
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model = "SoCFPGA Cyclone V SR1500";
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compatible = "anonymous,socfpga-sr1500", "altr,socfpga-cyclone5", "altr,socfpga";
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chosen {
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bootargs = "console=ttyS0,115200";
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stdout-path = "serial0:115200n8";
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};
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aliases {
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/*
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* This allows the ethaddr uboot environment variable
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* contents to be added to the gmac1 device tree blob.
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*/
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ethernet0 = &gmac1;
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};
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memory@0 {
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name = "memory";
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device_type = "memory";
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reg = <0x0 0x40000000>; /* 1GB */
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};
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soc {
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u-boot,dm-pre-reloc;
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};
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};
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&gmac1 {
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status = "okay";
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phy-mode = "rgmii";
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&porta {
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bank-name = "porta";
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};
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&portb {
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bank-name = "portb";
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};
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&portc {
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bank-name = "portc";
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};
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&i2c0 {
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status = "okay";
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speed-mode = <0>;
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};
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&i2c1 {
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status = "okay";
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speed-mode = <0>;
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};
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&mmc0 {
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status = "okay";
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bus-width = <8>;
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u-boot,dm-pre-reloc;
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};
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&uart0 {
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status = "okay";
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u-boot,dm-pre-reloc;
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};
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&usb1 {
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status = "okay";
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};
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&watchdog0 {
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status = "okay";
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};
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&qspi {
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status = "okay";
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u-boot,dm-pre-reloc;
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flash0: n25q00@0 {
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u-boot,dm-pre-reloc;
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "n25q00", "jedec,spi-nor";
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reg = <0>; /* chip select */
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spi-max-frequency = <100000000>;
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m25p,fast-read;
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page-size = <256>;
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block-size = <16>; /* 2^16, 64KB */
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cdns,tshsl-ns = <50>;
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cdns,tsd2d-ns = <50>;
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cdns,tchsh-ns = <4>;
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cdns,tslch-ns = <4>;
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};
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};
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