Marek Vasut ffb8b66ea8 ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6 ... Factor out center_dq_windows(), which is common code between stage 2 and stage 3 of the calibration again and cater for the minor differences. Signed-off-by: Marek Vasut <marex@denx.de>		2015-08-08 14:14:22 +02:00
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Makefile	driver/ddr/altera: Add the sdram calibration portion	2015-08-08 14:14:05 +02:00
sdram.c	ddr: altera: Wrap SOCFPGA_SDR_ADDRESS into SDR_PHYGRP.*ADDRESS	2015-08-08 14:14:11 +02:00
sequencer_auto_ac_init.h	driver/ddr/altera: Add the sdram calibration portion	2015-08-08 14:14:05 +02:00
sequencer_auto_inst_init.h	driver/ddr/altera: Add the sdram calibration portion	2015-08-08 14:14:05 +02:00
sequencer_auto.h	driver/ddr/altera: Add the sdram calibration portion	2015-08-08 14:14:05 +02:00
sequencer_defines.h	driver/ddr/altera: Add the sdram calibration portion	2015-08-08 14:14:05 +02:00
sequencer.c	ddr: altera: Clean up rw_mgr_mem_calibrate_vfifo_center() part 6	2015-08-08 14:14:22 +02:00
sequencer.h	ddr: altera: Clean up mem_config()	2015-08-08 14:14:14 +02:00