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96bfdf01ca
Add Cadence QSPI controller Kconfig entry. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Vince Bridgers <vbridger@opensource.altera.com>
54 lines
1.7 KiB
Plaintext
54 lines
1.7 KiB
Plaintext
config DM_SPI
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bool "Enable Driver Model for SPI drivers"
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depends on DM
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help
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Enable driver model for SPI. The SPI slave interface
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(spi_setup_slave(), spi_xfer(), etc.) is then implemented by
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the SPI uclass. Drivers provide methods to access the SPI
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buses that they control. The uclass interface is defined in
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include/spi.h. The existing spi_slave structure is attached
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as 'parent data' to every slave on each bus. Slaves
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typically use driver-private data instead of extending the
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spi_slave structure.
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config SANDBOX_SPI
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bool "Sandbox SPI driver"
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depends on SANDBOX && DM
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help
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Enable SPI support for sandbox. This is an emulation of a real SPI
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bus. Devices can be attached to the bus using the device tree
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which specifies the driver to use. As an example, see this device
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tree fragment from sandbox.dts. It shows that the SPI bus has a
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single flash device on chip select 0 which is emulated by the driver
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for "sandbox,spi-flash", which is in drivers/mtd/spi/sandbox.c.
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spi@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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compatible = "sandbox,spi";
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cs-gpios = <0>, <&gpio_a 0>;
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flash@0 {
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reg = <0>;
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compatible = "spansion,m25p16", "sandbox,spi-flash";
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spi-max-frequency = <40000000>;
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sandbox,filename = "spi.bin";
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};
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};
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config DESIGNWARE_SPI
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bool "Designware SPI driver"
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depends on DM_SPI
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help
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Enable the Designware SPI driver. This driver can be used to
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access the SPI NOR flash on platforms embedding this Designware
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IP core.
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config CADENCE_QSPI
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bool "Cadence QSPI driver"
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depends on DM_SPI
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help
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Enable the Cadence Quad-SPI (QSPI) driver. This driver can be
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used to access the SPI NOR flash on platforms embedding this
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Cadence IP core.
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