mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
135 lines
3.4 KiB
C
135 lines
3.4 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2009
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* Vipin Kumar, ST Micoelectronics, vipin.kumar@st.com.
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*/
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#ifndef __DW_I2C_H_
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#define __DW_I2C_H_
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struct i2c_regs {
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u32 ic_con; /* 0x00 */
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u32 ic_tar; /* 0x04 */
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u32 ic_sar; /* 0x08 */
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u32 ic_hs_maddr; /* 0x0c */
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u32 ic_cmd_data; /* 0x10 */
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u32 ic_ss_scl_hcnt; /* 0x14 */
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u32 ic_ss_scl_lcnt; /* 0x18 */
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u32 ic_fs_scl_hcnt; /* 0x1c */
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u32 ic_fs_scl_lcnt; /* 0x20 */
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u32 ic_hs_scl_hcnt; /* 0x24 */
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u32 ic_hs_scl_lcnt; /* 0x28 */
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u32 ic_intr_stat; /* 0x2c */
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u32 ic_intr_mask; /* 0x30 */
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u32 ic_raw_intr_stat; /* 0x34 */
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u32 ic_rx_tl; /* 0x38 */
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u32 ic_tx_tl; /* 0x3c */
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u32 ic_clr_intr; /* 0x40 */
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u32 ic_clr_rx_under; /* 0x44 */
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u32 ic_clr_rx_over; /* 0x48 */
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u32 ic_clr_tx_over; /* 0x4c */
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u32 ic_clr_rd_req; /* 0x50 */
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u32 ic_clr_tx_abrt; /* 0x54 */
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u32 ic_clr_rx_done; /* 0x58 */
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u32 ic_clr_activity; /* 0x5c */
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u32 ic_clr_stop_det; /* 0x60 */
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u32 ic_clr_start_det; /* 0x64 */
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u32 ic_clr_gen_call; /* 0x68 */
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u32 ic_enable; /* 0x6c */
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u32 ic_status; /* 0x70 */
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u32 ic_txflr; /* 0x74 */
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u32 ic_rxflr; /* 0x78 */
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u32 ic_sda_hold; /* 0x7c */
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u32 ic_tx_abrt_source; /* 0x80 */
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u8 res1[0x18]; /* 0x84 */
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u32 ic_enable_status; /* 0x9c */
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};
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#if !defined(IC_CLK)
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#define IC_CLK 166
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#endif
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#define NANO_TO_MICRO 1000
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/* High and low times in different speed modes (in ns) */
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#define MIN_SS_SCL_HIGHTIME 4000
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#define MIN_SS_SCL_LOWTIME 4700
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#define MIN_FS_SCL_HIGHTIME 600
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#define MIN_FS_SCL_LOWTIME 1300
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#define MIN_HS_SCL_HIGHTIME 60
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#define MIN_HS_SCL_LOWTIME 160
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/* Worst case timeout for 1 byte is kept as 2ms */
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#define I2C_BYTE_TO (CONFIG_SYS_HZ/500)
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#define I2C_STOPDET_TO (CONFIG_SYS_HZ/500)
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#define I2C_BYTE_TO_BB (I2C_BYTE_TO * 16)
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/* i2c control register definitions */
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#define IC_CON_SD 0x0040
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#define IC_CON_RE 0x0020
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#define IC_CON_10BITADDRMASTER 0x0010
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#define IC_CON_10BITADDR_SLAVE 0x0008
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#define IC_CON_SPD_MSK 0x0006
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#define IC_CON_SPD_SS 0x0002
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#define IC_CON_SPD_FS 0x0004
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#define IC_CON_SPD_HS 0x0006
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#define IC_CON_MM 0x0001
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/* i2c target address register definitions */
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#define TAR_ADDR 0x0050
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/* i2c slave address register definitions */
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#define IC_SLAVE_ADDR 0x0002
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/* i2c data buffer and command register definitions */
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#define IC_CMD 0x0100
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#define IC_STOP 0x0200
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/* i2c interrupt status register definitions */
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#define IC_GEN_CALL 0x0800
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#define IC_START_DET 0x0400
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#define IC_STOP_DET 0x0200
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#define IC_ACTIVITY 0x0100
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#define IC_RX_DONE 0x0080
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#define IC_TX_ABRT 0x0040
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#define IC_RD_REQ 0x0020
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#define IC_TX_EMPTY 0x0010
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#define IC_TX_OVER 0x0008
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#define IC_RX_FULL 0x0004
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#define IC_RX_OVER 0x0002
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#define IC_RX_UNDER 0x0001
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/* fifo threshold register definitions */
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#define IC_TL0 0x00
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#define IC_TL1 0x01
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#define IC_TL2 0x02
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#define IC_TL3 0x03
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#define IC_TL4 0x04
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#define IC_TL5 0x05
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#define IC_TL6 0x06
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#define IC_TL7 0x07
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#define IC_RX_TL IC_TL0
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#define IC_TX_TL IC_TL0
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/* i2c enable register definitions */
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#define IC_ENABLE_0B 0x0001
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/* i2c status register definitions */
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#define IC_STATUS_SA 0x0040
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#define IC_STATUS_MA 0x0020
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#define IC_STATUS_RFF 0x0010
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#define IC_STATUS_RFNE 0x0008
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#define IC_STATUS_TFE 0x0004
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#define IC_STATUS_TFNF 0x0002
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#define IC_STATUS_ACT 0x0001
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/* Speed Selection */
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#define IC_SPEED_MODE_STANDARD 1
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#define IC_SPEED_MODE_FAST 2
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#define IC_SPEED_MODE_MAX 3
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#define I2C_MAX_SPEED 3400000
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#define I2C_FAST_SPEED 400000
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#define I2C_STANDARD_SPEED 100000
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#endif /* __DW_I2C_H_ */
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