mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-06-09 23:36:03 +09:00
aba9296249
At present all PCI devices must be present in the device tree in order to be used. Many or most PCI devices don't require any configuration other than that which is done automatically by U-Boot. It is inefficent to add a node with nothing but a compatible string in order to get a device working. Add a mechanism whereby PCI drivers can be declared along with the device parameters they support (vendor/device/class). When no suitable driver is found in the device tree the list of such devices is consulted to determine the correct driver. If this also fails, then a generic driver is used as before. The mechanism used is very similar to that provided by Linux and the header file defintions are copied from Linux 4.1. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Joe Hershberger <joe.hershberger@ni.com>
473 lines
11 KiB
C
473 lines
11 KiB
C
/*
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* (C) Copyright 2009 Reinhard Arlt, reinhard.arlt@esd-electronics.com
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*
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* base on universe.h by
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*
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* (C) Copyright 2003 Stefan Roese, stefan.roese@esd-electronics.com
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <command.h>
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#include <malloc.h>
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#include <asm/io.h>
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#include <pci.h>
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#include <tsi148.h>
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#define LPCI_VENDOR PCI_VENDOR_ID_TUNDRA
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#define LPCI_DEVICE PCI_DEVICE_ID_TUNDRA_TSI148
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typedef struct _TSI148_DEV TSI148_DEV;
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struct _TSI148_DEV {
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int bus;
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pci_dev_t busdevfn;
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TSI148 *uregs;
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unsigned int pci_bs;
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};
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static TSI148_DEV *dev;
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/*
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* Most of the TSI148 register are BIGENDIAN
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* This is the reason for the __raw_writel(htonl(x), x) usage!
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*/
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int tsi148_init(void)
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{
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int j, result;
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pci_dev_t busdevfn;
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unsigned int val;
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busdevfn = pci_find_device(LPCI_VENDOR, LPCI_DEVICE, 0);
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if (busdevfn == -1) {
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puts("Tsi148: No Tundra Tsi148 found!\n");
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return -1;
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}
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/* Lets turn Latency off */
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pci_write_config_dword(busdevfn, 0x0c, 0);
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dev = malloc(sizeof(*dev));
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if (NULL == dev) {
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puts("Tsi148: No memory!\n");
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return -1;
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}
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memset(dev, 0, sizeof(*dev));
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dev->busdevfn = busdevfn;
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pci_read_config_dword(busdevfn, PCI_BASE_ADDRESS_0, &val);
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val &= ~0xf;
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dev->uregs = (TSI148 *)val;
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debug("Tsi148: Base : %p\n", dev->uregs);
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/* check mapping */
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debug("Tsi148: Read via mapping, PCI_ID = %08X\n",
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readl(&dev->uregs->pci_id));
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if (((LPCI_DEVICE << 16) | LPCI_VENDOR) != readl(&dev->uregs->pci_id)) {
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printf("Tsi148: Cannot read PCI-ID via Mapping: %08x\n",
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readl(&dev->uregs->pci_id));
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result = -1;
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goto break_30;
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}
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debug("Tsi148: PCI_BS = %08X\n", readl(&dev->uregs->pci_mbarl));
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dev->pci_bs = readl(&dev->uregs->pci_mbarl);
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/* turn off windows */
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for (j = 0; j < 8; j++) {
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__raw_writel(htonl(0x00000000), &dev->uregs->outbound[j].otat);
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__raw_writel(htonl(0x00000000), &dev->uregs->inbound[j].itat);
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}
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/* Tsi148 VME timeout etc */
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__raw_writel(htonl(0x00000084), &dev->uregs->vctrl);
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#ifdef DEBUG
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if ((__raw_readl(&dev->uregs->vstat) & 0x00000100) != 0)
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printf("Tsi148: System Controller!\n");
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else
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printf("Tsi148: Not System Controller!\n");
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#endif
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/*
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* Lets turn off interrupts
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*/
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/* Disable interrupts in Tsi148 first */
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__raw_writel(htonl(0x00000000), &dev->uregs->inten);
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/* Disable interrupt out */
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__raw_writel(htonl(0x00000000), &dev->uregs->inteo);
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eieio();
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/* Reset all IRQ's */
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__raw_writel(htonl(0x03ff3f00), &dev->uregs->intc);
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/* Map all ints to 0 */
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__raw_writel(htonl(0x00000000), &dev->uregs->intm1);
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__raw_writel(htonl(0x00000000), &dev->uregs->intm2);
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eieio();
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val = __raw_readl(&dev->uregs->vstat);
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val &= ~(0x00004000);
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__raw_writel(val, &dev->uregs->vstat);
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eieio();
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debug("Tsi148: register struct size %08x\n", sizeof(TSI148));
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return 0;
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break_30:
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free(dev);
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dev = NULL;
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return result;
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}
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/*
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* Create pci slave window (access: pci -> vme)
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*/
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int tsi148_pci_slave_window(unsigned int pciAddr, unsigned int vmeAddr,
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int size, int vam, int vdw)
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{
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int result, i;
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unsigned int ctl = 0;
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if (NULL == dev) {
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result = -1;
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goto exit_10;
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}
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for (i = 0; i < 8; i++) {
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if (0x00000000 == readl(&dev->uregs->outbound[i].otat))
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break;
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}
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if (i > 7) {
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printf("Tsi148: No Image available\n");
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result = -1;
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goto exit_10;
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}
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debug("Tsi148: Using image %d\n", i);
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printf("Tsi148: Pci addr %08x\n", pciAddr);
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__raw_writel(htonl(pciAddr), &dev->uregs->outbound[i].otsal);
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__raw_writel(0x00000000, &dev->uregs->outbound[i].otsau);
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__raw_writel(htonl(pciAddr + size), &dev->uregs->outbound[i].oteal);
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__raw_writel(0x00000000, &dev->uregs->outbound[i].oteau);
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__raw_writel(htonl(vmeAddr - pciAddr), &dev->uregs->outbound[i].otofl);
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__raw_writel(0x00000000, &dev->uregs->outbound[i].otofu);
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switch (vam & VME_AM_Axx) {
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case VME_AM_A16:
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ctl = 0x00000000;
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break;
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case VME_AM_A24:
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ctl = 0x00000001;
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break;
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case VME_AM_A32:
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ctl = 0x00000002;
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break;
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}
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switch (vam & VME_AM_Mxx) {
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case VME_AM_DATA:
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ctl |= 0x00000000;
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break;
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case VME_AM_PROG:
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ctl |= 0x00000010;
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break;
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}
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if (vam & VME_AM_SUP)
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ctl |= 0x00000020;
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switch (vdw & VME_FLAG_Dxx) {
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case VME_FLAG_D16:
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ctl |= 0x00000000;
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break;
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case VME_FLAG_D32:
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ctl |= 0x00000040;
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break;
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}
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ctl |= 0x80040000; /* enable, no prefetch */
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__raw_writel(htonl(ctl), &dev->uregs->outbound[i].otat);
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debug("Tsi148: window-addr =%p\n",
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&dev->uregs->outbound[i].otsau);
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debug("Tsi148: pci slave window[%d] attr =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].otat)));
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debug("Tsi148: pci slave window[%d] start =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].otsal)));
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debug("Tsi148: pci slave window[%d] end =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].oteal)));
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debug("Tsi148: pci slave window[%d] offset=%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->outbound[i].otofl)));
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return 0;
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exit_10:
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return -result;
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}
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unsigned int tsi148_eval_vam(int vam)
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{
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unsigned int ctl = 0;
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switch (vam & VME_AM_Axx) {
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case VME_AM_A16:
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ctl = 0x00000000;
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break;
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case VME_AM_A24:
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ctl = 0x00000010;
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break;
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case VME_AM_A32:
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ctl = 0x00000020;
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break;
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}
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switch (vam & VME_AM_Mxx) {
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case VME_AM_DATA:
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ctl |= 0x00000001;
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break;
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case VME_AM_PROG:
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ctl |= 0x00000002;
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break;
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case (VME_AM_PROG | VME_AM_DATA):
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ctl |= 0x00000003;
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break;
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}
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if (vam & VME_AM_SUP)
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ctl |= 0x00000008;
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if (vam & VME_AM_USR)
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ctl |= 0x00000004;
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return ctl;
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}
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/*
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* Create vme slave window (access: vme -> pci)
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*/
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int tsi148_vme_slave_window(unsigned int vmeAddr, unsigned int pciAddr,
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int size, int vam)
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{
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int result, i;
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unsigned int ctl = 0;
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if (NULL == dev) {
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result = -1;
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goto exit_10;
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}
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for (i = 0; i < 8; i++) {
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if (0x00000000 == readl(&dev->uregs->inbound[i].itat))
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break;
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}
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if (i > 7) {
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printf("Tsi148: No Image available\n");
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result = -1;
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goto exit_10;
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}
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debug("Tsi148: Using image %d\n", i);
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__raw_writel(htonl(vmeAddr), &dev->uregs->inbound[i].itsal);
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__raw_writel(0x00000000, &dev->uregs->inbound[i].itsau);
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__raw_writel(htonl(vmeAddr + size), &dev->uregs->inbound[i].iteal);
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__raw_writel(0x00000000, &dev->uregs->inbound[i].iteau);
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__raw_writel(htonl(pciAddr - vmeAddr), &dev->uregs->inbound[i].itofl);
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if (vmeAddr > pciAddr)
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__raw_writel(0xffffffff, &dev->uregs->inbound[i].itofu);
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else
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__raw_writel(0x00000000, &dev->uregs->inbound[i].itofu);
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ctl = tsi148_eval_vam(vam);
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ctl |= 0x80000000; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->inbound[i].itat);
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debug("Tsi148: window-addr =%p\n",
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&dev->uregs->inbound[i].itsau);
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debug("Tsi148: vme slave window[%d] attr =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].itat)));
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debug("Tsi148: vme slave window[%d] start =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].itsal)));
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debug("Tsi148: vme slave window[%d] end =%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].iteal)));
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debug("Tsi148: vme slave window[%d] offset=%08x\n",
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i, ntohl(__raw_readl(&dev->uregs->inbound[i].itofl)));
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return 0;
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exit_10:
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return -result;
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}
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/*
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* Create vme slave window (access: vme -> gcsr)
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*/
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int tsi148_vme_gcsr_window(unsigned int vmeAddr, int vam)
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{
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int result;
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unsigned int ctl;
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result = 0;
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if (NULL == dev) {
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result = 1;
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} else {
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__raw_writel(htonl(vmeAddr), &dev->uregs->gbal);
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__raw_writel(0x00000000, &dev->uregs->gbau);
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ctl = tsi148_eval_vam(vam);
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ctl |= 0x00000080; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->gcsrat);
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}
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return result;
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}
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/*
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* Create vme slave window (access: vme -> crcsr)
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*/
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int tsi148_vme_crcsr_window(unsigned int vmeAddr)
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{
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int result;
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unsigned int ctl;
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result = 0;
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if (NULL == dev) {
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result = 1;
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} else {
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__raw_writel(htonl(vmeAddr), &dev->uregs->crol);
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__raw_writel(0x00000000, &dev->uregs->crou);
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ctl = 0x00000080; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->crat);
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}
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return result;
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}
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/*
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* Create vme slave window (access: vme -> crg)
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*/
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int tsi148_vme_crg_window(unsigned int vmeAddr, int vam)
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{
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int result;
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unsigned int ctl;
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result = 0;
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if (NULL == dev) {
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result = 1;
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} else {
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__raw_writel(htonl(vmeAddr), &dev->uregs->cbal);
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__raw_writel(0x00000000, &dev->uregs->cbau);
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ctl = tsi148_eval_vam(vam);
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ctl |= 0x00000080; /* enable */
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__raw_writel(htonl(ctl), &dev->uregs->crgat);
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}
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return result;
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}
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/*
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* Tundra Tsi148 configuration
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*/
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int do_tsi148(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
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{
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ulong addr1 = 0, addr2 = 0, size = 0, vam = 0, vdw = 0;
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char cmd = 'x';
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/* get parameter */
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if (argc > 1)
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cmd = argv[1][0];
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if (argc > 2)
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addr1 = simple_strtoul(argv[2], NULL, 16);
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if (argc > 3)
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addr2 = simple_strtoul(argv[3], NULL, 16);
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if (argc > 4)
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size = simple_strtoul(argv[4], NULL, 16);
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if (argc > 5)
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vam = simple_strtoul(argv[5], NULL, 16);
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if (argc > 6)
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vdw = simple_strtoul(argv[6], NULL, 16);
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switch (cmd) {
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case 'c':
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if (strcmp(argv[1], "crg") == 0) {
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vam = addr2;
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printf("Tsi148: Configuring VME CRG Window "
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"(VME->CRG):\n");
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printf(" vme=%08lx vam=%02lx\n", addr1, vam);
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tsi148_vme_crg_window(addr1, vam);
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} else {
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printf("Tsi148: Configuring VME CR/CSR Window "
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"(VME->CR/CSR):\n");
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printf(" pci=%08lx\n", addr1);
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tsi148_vme_crcsr_window(addr1);
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}
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break;
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case 'i': /* init */
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tsi148_init();
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break;
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case 'g':
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vam = addr2;
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printf("Tsi148: Configuring VME GCSR Window (VME->GCSR):\n");
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printf(" vme=%08lx vam=%02lx\n", addr1, vam);
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tsi148_vme_gcsr_window(addr1, vam);
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break;
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case 'v': /* vme */
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printf("Tsi148: Configuring VME Slave Window (VME->PCI):\n");
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printf(" vme=%08lx pci=%08lx size=%08lx vam=%02lx\n",
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addr1, addr2, size, vam);
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tsi148_vme_slave_window(addr1, addr2, size, vam);
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break;
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case 'p': /* pci */
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printf("Tsi148: Configuring PCI Slave Window (PCI->VME):\n");
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printf(" pci=%08lx vme=%08lx size=%08lx vam=%02lx vdw=%02lx\n",
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addr1, addr2, size, vam, vdw);
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tsi148_pci_slave_window(addr1, addr2, size, vam, vdw);
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break;
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default:
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printf("Tsi148: Command %s not supported!\n", argv[1]);
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}
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return 0;
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}
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U_BOOT_CMD(
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tsi148, 7, 1, do_tsi148,
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"initialize and configure Turndra Tsi148\n",
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"init\n"
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" - initialize tsi148\n"
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"tsi148 vme [vme_addr] [pci_addr] [size] [vam]\n"
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" - create vme slave window (access: vme->pci)\n"
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"tsi148 pci [pci_addr] [vme_addr] [size] [vam] [vdw]\n"
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" - create pci slave window (access: pci->vme)\n"
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"tsi148 crg [vme_addr] [vam]\n"
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" - create vme slave window: (access vme->CRG\n"
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"tsi148 crcsr [pci_addr]\n"
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" - create vme slave window: (access vme->CR/CSR\n"
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"tsi148 gcsr [vme_addr] [vam]\n"
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" - create vme slave window: (access vme->GCSR\n"
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" [vam] = VMEbus Address-Modifier: 01 -> A16 Address Space\n"
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" 02 -> A24 Address Space\n"
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" 03 -> A32 Address Space\n"
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" 04 -> Usr AM Code\n"
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" 08 -> Supervisor AM Code\n"
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" 10 -> Data AM Code\n"
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" 20 -> Program AM Code\n"
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" [vdw] = VMEbus Maximum Datawidth: 02 -> D16 Data Width\n"
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" 03 -> D32 Data Width\n"
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);
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