Lokesh Vutla ccd2f8db81 ARM: AM43xx: Fix UART clocks enabling ... After enabling a module, SW has to wait on IDLEST bit until it is Fully functional. This wait is missing for UART module and there is a immediate access of UART registers after this. So there is a chance of hang on this module( This can happen when we are running from MPU SRAM). So waiting for IDLEST bit. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2014-06-06 17:46:15 -04:00
..
board.c	arm:am33xx: Rework s_init and add board_early_init_f	2014-06-06 17:46:14 -04:00
clock_am33xx.c	ARM: AM43xx: clocks: Update DPLL details	2013-12-18 21:14:01 -05:00
clock_am43xx.c	ARM: AM43xx: Fix UART clocks enabling	2014-06-06 17:46:15 -04:00
clock_ti814x.c	ti814x: Fix illegal use of FP ops in clock_ti814x.c	2014-02-21 14:03:44 -05:00
clock_ti816x.c	Add TI816X support	2013-08-15 18:38:37 -04:00
clock.c	ARM: AM43xx: clocks: Update DPLL details	2013-12-18 21:14:01 -05:00
config.mk	kbuild: use shorten logs for mkimage rules	2014-02-25 11:01:29 -05:00
ddr.c	ARM: AM43xx: Write sdram_config to secure_emif_sdram_config	2014-03-04 09:42:07 -05:00
emif4.c	arm:am33xx: Make dram_init call sdram_init() in some contexts	2014-06-06 17:46:14 -04:00
Makefile	ARM: omap: merge GPMC initialization code for all platform	2014-05-23 19:39:36 -04:00
mux.c	am33xx: move generic parts of pinmux handling out from board/ti/am335x	2012-10-25 11:31:37 -07:00
sys_info.c	am33xx: report silicon revision instead of code	2014-05-23 19:40:39 -04:00
u-boot-spl.lds	arm: make _end compiler-generated	2014-02-26 21:18:09 +01:00