brain-hackers_pepepper-mirror/u-boot-brain
1
0
Fork 0
mirror of https://github.com/brain-hackers/u-boot-brain synced 2024-06-09 23:36:03 +09:00
Code Issues Projects Releases Wiki Activity
fe913a8bb6
u-boot-brain/drivers/clk/mediatek
History
Fabien Parent fe913a8bb6 clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags 
Add the implementation for the CLK_GATE_SETCLR_INV and
CLK_GATE_NO_SETCLR flags.

Signed-off-by: Fabien Parent <fparent@baylibre.com>
Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2019-04-23 17:57:26 -04:00
..
clk-mt7623.c clk: MediaTek: bind ethsys reset controller 2019-01-14 17:43:18 -05:00
clk-mt7629.c clk: MediaTek: bind ethsys reset controller 2019-01-14 17:43:18 -05:00
clk-mtk.c clk: mediatek: add support for SETCLR_INV and NO_SETCLR flags 2019-04-23 17:57:26 -04:00
clk-mtk.h clk: MediaTek: bind ethsys reset controller 2019-01-14 17:43:18 -05:00
Makefile clk: MediaTek: add clock driver for MT7623 SoC. 2018-11-28 23:04:51 -05:00