mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-09-30 16:40:44 +09:00
fe7d654d04
Migrate the BR/OR settings to Kconfig. These must be known at compile time, so cannot be configured via DT. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
128 lines
3.3 KiB
Plaintext
128 lines
3.3 KiB
Plaintext
CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xFE000000
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CONFIG_SYS_CLK_FREQ=66000000
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CONFIG_MPC83xx=y
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CONFIG_TARGET_MPC837XEMDS=y
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CONFIG_DDR_MC_CLOCK_MODE_1_1=y
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CONFIG_SYSTEM_PLL_FACTOR_6_1=y
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CONFIG_CORE_PLL_RATIO_15_1=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_TSEC1_MODE_RGMII=y
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CONFIG_TSEC2_MODE_RGMII=y
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CONFIG_LDP_PIN_MUX_STATE_0=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="SDRAM_LOWER"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_256_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="SDRAM_UPPER"
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CONFIG_BAT1_BASE=0x10000000
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CONFIG_BAT1_LENGTH_256_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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CONFIG_BAT1_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT1_DCACHE_MEMORYCOHERENCE=y
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CONFIG_BAT1_USER_MODE_VALID=y
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CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT2=y
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CONFIG_BAT2_NAME="IMMR"
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CONFIG_BAT2_BASE=0xE0000000
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CONFIG_BAT2_LENGTH_8_MBYTES=y
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CONFIG_BAT2_ACCESS_RW=y
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CONFIG_BAT2_ICACHE_INHIBITED=y
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CONFIG_BAT2_ICACHE_GUARDED=y
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CONFIG_BAT2_DCACHE_INHIBITED=y
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CONFIG_BAT2_DCACHE_GUARDED=y
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CONFIG_BAT2_USER_MODE_VALID=y
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CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT3=y
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CONFIG_BAT3_NAME="BCSR"
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CONFIG_BAT3_BASE=0xF8000000
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CONFIG_BAT3_ACCESS_RW=y
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CONFIG_BAT3_ICACHE_INHIBITED=y
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CONFIG_BAT3_ICACHE_GUARDED=y
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CONFIG_BAT3_DCACHE_INHIBITED=y
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CONFIG_BAT3_DCACHE_GUARDED=y
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CONFIG_BAT3_USER_MODE_VALID=y
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CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
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CONFIG_LBLAW0=y
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CONFIG_LBLAW0_BASE=0xFE000000
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CONFIG_LBLAW0_NAME="FLASH"
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CONFIG_LBLAW0_LENGTH_32_MBYTES=y
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CONFIG_LBLAW1=y
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CONFIG_LBLAW1_BASE=0xF8000000
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CONFIG_LBLAW1_NAME="BCSR"
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CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_LBLAW3=y
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CONFIG_LBLAW3_BASE=0xE0600000
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CONFIG_LBLAW3_NAME="NAND"
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CONFIG_LBLAW3_LENGTH_32_KBYTES=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_SYS_EXTRA_OPTIONS="PCISLAVE"
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CONFIG_BOOTDELAY=6
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CONFIG_HUSH_PARSER=y
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_NAND=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_DATE=y
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CONFIG_CMD_EXT2=y
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CONFIG_CMD_FAT=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_USE_BUFFER_WRITE=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_TSEC_ENET=y
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# CONFIG_PCI is not set
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CONFIG_SYS_NS16550=y
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CONFIG_OF_LIBFDT=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xFE000000
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CONFIG_BR0_MACHINE_GPCM=y
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CONFIG_BR0_PORTSIZE_16BIT=y
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CONFIG_OR0_AM_32_MBYTES=y
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CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR0_CSNT_EARLIER=y
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CONFIG_OR0_EAD_EXTRA=y
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CONFIG_OR0_SCY_15=y
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CONFIG_OR0_XACS_EXTENDED=y
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CONFIG_OR0_XAM_SET=y
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CONFIG_OR0_TRLX_RELAXED=y
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CONFIG_OR0_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR1_OR1=y
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CONFIG_BR1_OR1_NAME="BCSR"
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CONFIG_BR1_OR1_BASE=0xF8000000
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CONFIG_BR1_MACHINE_GPCM=y
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CONFIG_BR1_PORTSIZE_8BIT=y
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CONFIG_OR1_AM_32_KBYTES=y
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CONFIG_OR1_CSNT_EARLIER=y
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CONFIG_OR1_EAD_EXTRA=y
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CONFIG_OR1_SCY_15=y
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CONFIG_OR1_XACS_EXTENDED=y
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CONFIG_OR1_XAM_SET=y
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CONFIG_OR1_TRLX_RELAXED=y
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CONFIG_OR1_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR3_OR3=y
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CONFIG_BR3_OR3_NAME="NAND"
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CONFIG_BR3_OR3_BASE=0xE0600000
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CONFIG_BR3_ERRORCHECKING_BOTH=y
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CONFIG_BR3_MACHINE_FCM=y
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CONFIG_BR3_PORTSIZE_8BIT=y
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CONFIG_OR3_AM_32_KBYTES=y
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CONFIG_OR3_BCTLD_NOT_ASSERTED=y
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CONFIG_OR3_RST_ONE_CLOCK=y
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CONFIG_OR3_SCY_1=y
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CONFIG_OR3_TRLX_RELAXED=y
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CONFIG_OR3_CHT_TWO_CLOCK=y
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CONFIG_OR3_CST_ONE_CLOCK=y
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CONFIG_OR3_EHTR_8_CYCLE=y
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