mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 18:56:15 +09:00
fe7d654d04
Migrate the BR/OR settings to Kconfig. These must be known at compile time, so cannot be configured via DT. Configuration of this crucial variable should still be somewhat comfortable. Hence, make its fields configurable in Kconfig, and assemble the final value from these. Signed-off-by: Mario Six <mario.six@gdsys.cc>
127 lines
3.2 KiB
Plaintext
127 lines
3.2 KiB
Plaintext
CONFIG_PPC=y
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CONFIG_SYS_TEXT_BASE=0xFE000000
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CONFIG_SYS_CLK_FREQ=33333333
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CONFIG_MPC83xx=y
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CONFIG_TARGET_MPC8308RDB=y
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CONFIG_SYSTEM_PLL_VCO_DIV_2=y
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CONFIG_SYSTEM_PLL_FACTOR_4_1=y
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CONFIG_CORE_PLL_RATIO_3_1=y
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CONFIG_BOOT_MEMORY_SPACE_LOW=y
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CONFIG_BOOT_ROM_INTERFACE_GPCM_16BIT=y
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CONFIG_TSEC1_MODE_RGMII=y
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CONFIG_TSEC2_MODE_RGMII=y
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CONFIG_BAT0=y
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CONFIG_BAT0_NAME="DDR"
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CONFIG_BAT0_BASE=0x00000000
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CONFIG_BAT0_LENGTH_128_MBYTES=y
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CONFIG_BAT0_ACCESS_RW=y
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CONFIG_BAT0_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_DCACHE_MEMORYCOHERENCE=y
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CONFIG_BAT0_USER_MODE_VALID=y
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CONFIG_BAT0_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT1=y
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CONFIG_BAT1_NAME="IMMRBAR"
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CONFIG_BAT1_BASE=0xE0000000
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CONFIG_BAT1_LENGTH_8_MBYTES=y
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CONFIG_BAT1_ACCESS_RW=y
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CONFIG_BAT1_ICACHE_INHIBITED=y
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CONFIG_BAT1_ICACHE_GUARDED=y
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CONFIG_BAT1_DCACHE_INHIBITED=y
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CONFIG_BAT1_DCACHE_GUARDED=y
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CONFIG_BAT1_USER_MODE_VALID=y
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CONFIG_BAT1_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT2=y
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CONFIG_BAT2_NAME="FLASH"
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CONFIG_BAT2_BASE=0xFE000000
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CONFIG_BAT2_LENGTH_8_MBYTES=y
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CONFIG_BAT2_ACCESS_RW=y
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CONFIG_BAT2_ICACHE_MEMORYCOHERENCE=y
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CONFIG_BAT2_DCACHE_INHIBITED=y
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CONFIG_BAT2_DCACHE_GUARDED=y
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CONFIG_BAT2_USER_MODE_VALID=y
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CONFIG_BAT2_SUPERVISOR_MODE_VALID=y
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CONFIG_BAT3=y
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CONFIG_BAT3_NAME="STACK_IN_DCACHE"
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CONFIG_BAT3_BASE=0xE6000000
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CONFIG_BAT3_ACCESS_RW=y
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CONFIG_BAT3_USER_MODE_VALID=y
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CONFIG_BAT3_SUPERVISOR_MODE_VALID=y
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CONFIG_LBLAW0=y
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CONFIG_LBLAW0_BASE=0xFE000000
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CONFIG_LBLAW0_NAME="FLASH"
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CONFIG_LBLAW0_LENGTH_8_MBYTES=y
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CONFIG_LBLAW1=y
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CONFIG_LBLAW1_BASE=0xE0600000
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CONFIG_LBLAW1_NAME="NAND"
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CONFIG_LBLAW1_LENGTH_32_KBYTES=y
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CONFIG_LBLAW2=y
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CONFIG_LBLAW2_BASE=0xF0000000
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CONFIG_LBLAW2_NAME="VSC7385"
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CONFIG_LBLAW2_LENGTH_128_KBYTES=y
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CONFIG_FIT=y
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CONFIG_FIT_VERBOSE=y
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CONFIG_OF_BOARD_SETUP=y
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CONFIG_OF_STDOUT_VIA_ALIAS=y
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CONFIG_BOOTDELAY=5
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CONFIG_MISC_INIT_R=y
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CONFIG_HUSH_PARSER=y
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# CONFIG_AUTO_COMPLETE is not set
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CONFIG_CMD_IMLS=y
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CONFIG_CMD_I2C=y
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CONFIG_CMD_MMC=y
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CONFIG_CMD_PCI=y
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_DHCP=y
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CONFIG_CMD_MII=y
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CONFIG_CMD_PING=y
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CONFIG_CMD_DATE=y
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CONFIG_CMD_FAT=y
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CONFIG_FSL_ESDHC=y
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CONFIG_MTD_NOR_FLASH=y
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CONFIG_FLASH_CFI_DRIVER=y
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CONFIG_SYS_FLASH_PROTECTION=y
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CONFIG_SYS_FLASH_CFI=y
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CONFIG_PHY_MARVELL=y
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CONFIG_MII=y
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CONFIG_TSEC_ENET=y
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CONFIG_SYS_NS16550=y
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CONFIG_OF_LIBFDT=y
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CONFIG_ELBC_BR0_OR0=y
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CONFIG_BR0_OR0_NAME="FLASH"
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CONFIG_BR0_OR0_BASE=0xFE000000
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CONFIG_BR0_MACHINE_GPCM=y
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CONFIG_BR0_PORTSIZE_16BIT=y
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CONFIG_OR0_AM_8_MBYTES=y
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CONFIG_OR0_ACS_HALF_CYCLE_EARLIER=y
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CONFIG_OR0_CSNT_EARLIER=y
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CONFIG_OR0_SCY_15=y
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CONFIG_OR0_XACS_EXTENDED=y
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CONFIG_OR0_XAM_SET=y
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CONFIG_OR0_TRLX_RELAXED=y
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CONFIG_OR0_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR1_OR1=y
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CONFIG_BR1_OR1_NAME="NAND"
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CONFIG_BR1_OR1_BASE=0xE0600000
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CONFIG_BR1_ERRORCHECKING_BOTH=y
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CONFIG_BR1_MACHINE_FCM=y
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CONFIG_BR1_PORTSIZE_8BIT=y
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CONFIG_OR1_AM_32_KBYTES=y
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CONFIG_OR1_SCY_1=y
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CONFIG_OR1_TRLX_RELAXED=y
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CONFIG_OR1_CHT_TWO_CLOCK=y
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CONFIG_OR1_CSCT_8_CYCLE=y
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CONFIG_OR1_CST_ONE_CLOCK=y
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CONFIG_OR1_EHTR_8_CYCLE=y
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CONFIG_ELBC_BR2_OR2=y
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CONFIG_BR2_OR2_NAME="VSC7385_BASE"
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CONFIG_BR2_OR2_BASE=0xF0000000
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CONFIG_BR2_MACHINE_GPCM=y
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CONFIG_BR2_PORTSIZE_8BIT=y
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CONFIG_OR2_AM_128_KBYTES=y
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CONFIG_OR2_CSNT_EARLIER=y
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CONFIG_OR2_SCY_15=y
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CONFIG_OR2_SETA_EXTERNAL=y
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CONFIG_OR2_XACS_EXTENDED=y
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CONFIG_OR2_TRLX_RELAXED=y
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CONFIG_OR2_EHTR_8_CYCLE=y
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