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![Robert Hancock](/assets/img/avatar_default.png)
Previously the SPL size on all iMX6 platforms was restricted to 68KB because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the other iMX6 variants have 256KB of OCRAM. Add an option CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which don't need to support the SL/DL variants. This allows for an SPL size of 196KB, which makes it much easier to use configurations such as SPL with driver model and FDT control. Signed-off-by: Robert Hancock <hancock@sedsystems.ca> Tested-by: Adam Ford <aford173@gmail.com> #imx6q_logic
92 lines
3.2 KiB
C
92 lines
3.2 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2014 Gateworks Corporation
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* Author: Tim Harvey <tharvey@gateworks.com>
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*/
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#ifndef __IMX6_SPL_CONFIG_H
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#define __IMX6_SPL_CONFIG_H
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#ifdef CONFIG_SPL
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#ifdef CONFIG_MX6_OCRAM_256KB
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/*
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* see Figure 8.4.1 in IMX6DQ Reference manuals:
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* - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF
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* - BOOT ROM stack is at 0x0093FFB8
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* - if icache/dcache is enabled (eFuse/strapping controlled) then the
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* IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to
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* fit between 0x00907000 and 0x00938000.
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* - Additionally the BOOT ROM loads what they consider the firmware image
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* which consists of a 4K header in front of us that contains the IVT, DCD
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* and some padding thus 'our' max size is really 0x00908000 - 0x00938000
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* or 192KB
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*/
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#define CONFIG_SPL_MAX_SIZE 0x30000
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#define CONFIG_SPL_STACK 0x0093FFB8
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/*
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* Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the
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* SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
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* boot media (given that boot media specific offset is configured properly).
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*/
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#define CONFIG_SPL_PAD_TO 0x31000
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#else
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/*
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* see Figure 8-3 in IMX6SDL Reference manuals:
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* - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF
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* - BOOT ROM stack is at 0x0091FFB8
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* - if icache/dcache is enabled (eFuse/strapping controlled) then the
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* IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to
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* fit between 0x00907000 and 0x00918000.
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* - Additionally the BOOT ROM loads what they consider the firmware image
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* which consists of a 4K header in front of us that contains the IVT, DCD
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* and some padding thus 'our' max size is really 0x00908000 - 0x00918000
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* or 64KB
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*/
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#define CONFIG_SPL_MAX_SIZE 0x10000
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#define CONFIG_SPL_STACK 0x0091FFB8
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/*
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* Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the
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* SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a
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* boot media (given that boot media specific offset is configured properly).
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*/
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#define CONFIG_SPL_PAD_TO 0x11000
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#endif
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/* MMC support */
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#if defined(CONFIG_SPL_MMC_SUPPORT)
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#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
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#define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */
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#endif
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/* SATA support */
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#if defined(CONFIG_SPL_SATA_SUPPORT)
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#define CONFIG_SPL_SATA_BOOT_DEVICE 0
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#define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1
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#endif
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/* Define the payload for FAT/EXT support */
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#if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
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# ifdef CONFIG_OF_CONTROL
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# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot-dtb.img"
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# else
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# define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img"
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# endif
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#endif
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#if defined(CONFIG_MX6SX) || defined(CONFIG_MX6SL) || \
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defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL)
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#define CONFIG_SPL_BSS_START_ADDR 0x88200000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x88300000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
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#else
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#define CONFIG_SPL_BSS_START_ADDR 0x18200000
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#define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */
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#define CONFIG_SYS_SPL_MALLOC_START 0x18300000
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#define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */
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#endif
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#endif
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#endif
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