Kever Yang fd4b2dc059 clock: rk3399: add support for dwmmc 400K ... MMC core will use 400KHz for card initialize first and then switch to higher frequency like 50MHz, we need to support both 400KHz and about 50MHz for dwmmc controller. Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>		2016-08-05 18:02:51 -06:00
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exynos	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
rockchip	clock: rk3399: add support for dwmmc 400K	2016-08-05 18:02:51 -06:00
uniphier	ARM: uniphier: use (devm_)ioremap() instead of map_sysmem()	2016-07-24 00:13:10 +09:00
clk_fixed_rate.c	dm: clk: Add support for of-platdata	2016-07-14 20:40:24 -06:00
clk_pic32.c	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
clk_sandbox_test.c	clk: convert API to match reset/mailbox style	2016-06-19 17:05:55 -06:00
clk_sandbox.c	clk: sandbox: don't check clk ID against 0	2016-06-24 17:24:35 -04:00
clk-uclass.c	dm: clk: Remove simple version of clk_get_by_index/name()	2016-07-22 14:05:50 +02:00
Kconfig	clk: exynos: add clock driver for Exynos7420 Soc	2016-05-25 10:00:18 +09:00
Makefile	move: rockchip: move clock drivers into a subdirectory	2016-08-05 17:56:08 -06:00