u-boot-brain/arch/arm/cpu/armv7/mx6
Peng Fan a462c34602 imx:mx6ul add dram spl configuration and header file
1. Define two structures mx6ul_iomux_ddr_regs and mx6ul_iomux_grp_regs.
2. Add a new function mx6ul_dram_iocfg to configure dram io.
3. Refactor MMDC1 macro, discard "#ifdef CONFIG_MX6SX". Since
   only mmdc0 channel exists on i.MX6SX/UL, redefine MMDC1 macro support
   runtime check, but not hardcoding #ifdef macros.
4. Introduce mx6ul-ddr.h, which includes the register address for DRAM
   IO configuration.

Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
2015-08-02 11:05:09 +02:00
..
clock.c imx:mx6ul add clock support 2015-08-02 11:05:07 +02:00
ddr.c imx:mx6ul add dram spl configuration and header file 2015-08-02 11:05:09 +02:00
hab.c imx: mx6: hab : Remove the cache issue workaroud in hab for i.MX6QP 2015-08-02 10:45:41 +02:00
Kconfig imx: mx6ul select SYS_L2CACHE_OFF 2015-08-02 11:05:08 +02:00
Makefile mx6: add support of multi-processor command 2014-08-20 11:52:54 +02:00
mp.c mx6: add support of multi-processor command 2014-08-20 11:52:54 +02:00
soc.c imx: mx6ul update soc related settings 2015-08-02 11:05:08 +02:00