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https://github.com/brain-hackers/u-boot-brain
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36 lines
905 B
C
36 lines
905 B
C
/*
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* Copyright (C) 2016 Socionext Inc.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <linux/io.h>
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#include "../init.h"
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#include "../sc64-regs.h"
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#include "pll.h"
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void uniphier_ld11_pll_init(void)
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{
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uniphier_ld20_sscpll_init(SC_CPLLCTRL, 1960, 1, 2); /* 2000MHz -> 1960MHz */
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/* do nothing for SPLL */
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uniphier_ld20_sscpll_init(SC_MPLLCTRL, 1600, 1, 2); /* 1500MHz -> 1600MHz */
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uniphier_ld20_sscpll_init(SC_VSPLLCTRL, UNIPHIER_PLL_FREQ_DEFAULT, 0, 2);
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uniphier_ld20_sscpll_set_regi(SC_MPLLCTRL, 5);
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mdelay(1);
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uniphier_ld20_sscpll_ssc_en(SC_CPLLCTRL);
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uniphier_ld20_sscpll_ssc_en(SC_MPLLCTRL);
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uniphier_ld20_sscpll_ssc_en(SC_VSPLLCTRL);
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uniphier_ld20_sscpll_ssc_en(SC_DPLLCTRL);
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uniphier_ld20_vpll27_init(SC_VPLL27FCTRL);
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uniphier_ld20_vpll27_init(SC_VPLL27ACTRL);
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writel(0, SC_CA53_GEARSET); /* Gear0: CPLL/2 */
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writel(SC_CA_GEARUPD, SC_CA53_GEARUPD);
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}
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