mirror of
https://github.com/brain-hackers/u-boot-brain
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2a07269062
If U-Boot is started from SPL or TPL, then those earlier phases deal with the reset cause. On real hardware this cause may be lost once it is read. Emulate that behaviour in sandbox by reporting a warm reset when a previous phase has run since start-up. Signed-off-by: Simon Glass <sjg@chromium.org> |
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| .. | ||
| Kconfig | ||
| Makefile | ||
| sysreset_ast.c | ||
| sysreset_gpio.c | ||
| sysreset_microblaze.c | ||
| sysreset_mpc83xx.c | ||
| sysreset_mpc83xx.h | ||
| sysreset_psci.c | ||
| sysreset_rockchip.c | ||
| sysreset_sandbox.c | ||
| sysreset_sti.c | ||
| sysreset_syscon.c | ||
| sysreset_watchdog.c | ||
| sysreset_x86.c | ||
| sysreset_xtfpga.c | ||
| sysreset-ti-sci.c | ||
| sysreset-uclass.c | ||