mirror of
https://github.com/brain-hackers/u-boot-brain
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194 lines
4.0 KiB
ArmAsm
194 lines
4.0 KiB
ArmAsm
/* Copyright (C) 2003 Analog Devices, Inc. All Rights Reserved.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License.
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*
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* Blackfin BF533/2.6 support : LG Soft India
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*/
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/* Include an exception handler to invoke the CPLB manager
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*/
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#include <asm-blackfin/linkage.h>
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#include <asm/cplb.h>
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#include <asm/entry.h>
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.text
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.globl _cplb_hdr;
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.type _cplb_hdr, STT_FUNC;
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.extern _cplb_mgr;
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.type _cplb_mgr, STT_FUNC;
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.extern __unknown_exception_occurred;
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.type __unknown_exception_occurred, STT_FUNC;
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.extern __cplb_miss_all_locked;
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.type __cplb_miss_all_locked, STT_FUNC;
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.extern __cplb_miss_without_replacement;
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.type __cplb_miss_without_replacement, STT_FUNC;
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.extern __cplb_protection_violation;
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.type __cplb_protection_violation, STT_FUNC;
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.extern panic_pv;
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.align 2;
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ENTRY(_cplb_hdr)
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SSYNC;
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[--SP] = ( R7:0, P5:0 );
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[--SP] = ASTAT;
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[--SP] = SEQSTAT;
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[--SP] = I0;
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[--SP] = I1;
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[--SP] = I2;
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[--SP] = I3;
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[--SP] = LT0;
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[--SP] = LB0;
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[--SP] = LC0;
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[--SP] = LT1;
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[--SP] = LB1;
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[--SP] = LC1;
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R2 = SEQSTAT;
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/*Mask the contents of SEQSTAT and leave only EXCAUSE in R2*/
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R2 <<= 26;
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R2 >>= 26;
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R1 = 0x23; /* Data access CPLB protection violation */
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CC = R2 == R1;
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IF !CC JUMP not_data_write;
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R0 = 2; /* is a write to data space*/
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JUMP is_icplb_miss;
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not_data_write:
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R1 = 0x2C; /* CPLB miss on an instruction fetch */
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CC = R2 == R1;
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R0 = 0; /* is_data_miss == False*/
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IF CC JUMP is_icplb_miss;
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R1 = 0x26;
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CC = R2 == R1;
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IF !CC JUMP unknown;
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R0 = 1; /* is_data_miss == True*/
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is_icplb_miss:
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#if ( defined (CONFIG_BLKFIN_CACHE) || defined (CONFIG_BLKFIN_DCACHE))
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#if ( defined (CONFIG_BLKFIN_CACHE) && !defined (CONFIG_BLKFIN_DCACHE))
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R1 = CPLB_ENABLE_ICACHE;
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#endif
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#if ( !defined (CONFIG_BLKFIN_CACHE) && defined (CONFIG_BLKFIN_DCACHE))
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R1 = CPLB_ENABLE_DCACHE;
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#endif
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#if ( defined (CONFIG_BLKFIN_CACHE) && defined (CONFIG_BLKFIN_DCACHE))
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R1 = CPLB_ENABLE_DCACHE | CPLB_ENABLE_ICACHE;
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#endif
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#else
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R1 = 0;
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#endif
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[--SP] = RETS;
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CALL _cplb_mgr;
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RETS = [SP++];
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CC = R0 == 0;
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IF !CC JUMP not_replaced;
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LC1 = [SP++];
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LB1 = [SP++];
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LT1 = [SP++];
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LC0 = [SP++];
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LB0 = [SP++];
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LT0 = [SP++];
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I3 = [SP++];
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I2 = [SP++];
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I1 = [SP++];
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I0 = [SP++];
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SEQSTAT = [SP++];
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ASTAT = [SP++];
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( R7:0, P5:0 ) = [SP++];
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RTS;
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unknown:
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[--SP] = RETS;
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CALL __unknown_exception_occurred;
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RETS = [SP++];
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JUMP unknown;
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not_replaced:
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CC = R0 == CPLB_NO_UNLOCKED;
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IF !CC JUMP next_check;
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[--SP] = RETS;
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CALL __cplb_miss_all_locked;
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RETS = [SP++];
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next_check:
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CC = R0 == CPLB_NO_ADDR_MATCH;
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IF !CC JUMP next_check2;
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[--SP] = RETS;
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CALL __cplb_miss_without_replacement;
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RETS = [SP++];
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JUMP not_replaced;
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next_check2:
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CC = R0 == CPLB_PROT_VIOL;
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IF !CC JUMP strange_return_from_cplb_mgr;
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[--SP] = RETS;
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CALL __cplb_protection_violation;
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RETS = [SP++];
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JUMP not_replaced;
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strange_return_from_cplb_mgr:
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IDLE;
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CSYNC;
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JUMP strange_return_from_cplb_mgr;
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/************************************
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* Diagnostic exception handlers
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*/
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__cplb_miss_all_locked:
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sp += -12;
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R0 = CPLB_NO_UNLOCKED;
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call panic_bfin;
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SP += 12;
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RTS;
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__cplb_miss_without_replacement:
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sp += -12;
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R0 = CPLB_NO_ADDR_MATCH;
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call panic_bfin;
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SP += 12;
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RTS;
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__cplb_protection_violation:
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sp += -12;
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R0 = CPLB_PROT_VIOL;
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call panic_bfin;
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SP += 12;
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RTS;
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__unknown_exception_occurred:
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/* This function is invoked by the default exception
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* handler, if it does not recognise the kind of
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* exception that has occurred. In other words, the
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* default handler only handles some of the system's
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* exception types, and it does not expect any others
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* to occur. If your application is going to be using
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* other kinds of exceptions, you must replace the
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* default handler with your own, that handles all the
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* exceptions you will use.
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*
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* Since there's nothing we can do, we just loop here
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* at what we hope is a suitably informative label.
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*/
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IDLE;
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do_not_know_what_to_do:
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CSYNC;
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JUMP __unknown_exception_occurred;
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RTS;
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.__unknown_exception_occurred.end:
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.global __unknown_exception_occurred;
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.type __unknown_exception_occurred, STT_FUNC;
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panic_bfin:
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RTS;
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