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https://github.com/brain-hackers/u-boot-brain
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4c835a607b
This patch adds basic support for the MediaTek MT7620/88 SoCs. Parts of the code is copied from the MediaTek GitHub repository: https://github.com/MediaTek-Labs/linkit-smart-uboot.git The mt7628a.dtsi file is imported from Linux v4.17. Support for the LinkIt Smart 7688 module and the Gardena Smart Gateway both based on the MT7688 will be added in further patches. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
33 lines
853 B
C
33 lines
853 B
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2018 Stefan Roese <sr@denx.de>
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*/
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#ifndef __MT76XX_H
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#define __MT76XX_H
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#define MT76XX_SYSCTL_BASE 0x10000000
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#define MT76XX_CHIPID_OFFS 0x00
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#define MT76XX_CHIP_REV_ID_OFFS 0x0c
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#define MT76XX_SYSCFG0_OFFS 0x10
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#define MT76XX_MEMCTRL_BASE (MT76XX_SYSCTL_BASE + 0x0300)
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#define MT76XX_RGCTRL_BASE (MT76XX_SYSCTL_BASE + 0x1000)
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#define MT76XX_ROM_STATUS_REG (MT76XX_SYSCTL_BASE + 0x0028)
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#define MT76XX_CLKCFG0_REG (MT76XX_SYSCTL_BASE + 0x002c)
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#define MT76XX_DYN_CFG0_REG (MT76XX_SYSCTL_BASE + 0x0440)
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#define DDR_CFG1_REG (MT76XX_MEMCTRL_BASE + 0x44)
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#define DDR_CFG2_REG (MT76XX_MEMCTRL_BASE + 0x48)
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#define DDR_CFG3_REG (MT76XX_MEMCTRL_BASE + 0x4c)
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#define DDR_CFG4_REG (MT76XX_MEMCTRL_BASE + 0x50)
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#ifndef __ASSEMBLY__
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/* Prototypes */
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void ddr_calibrate(void);
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#endif
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#endif
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