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905c8e649e
Add dspi node into lx2162aqds device tree Signed-off-by: Zhao Qiang <qiang.zhao@nxp.com> [Rebased] Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
138 lines
2.1 KiB
Plaintext
138 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0+ OR X11
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/*
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* NXP LX2162AQDS device tree source
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*
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* Copyright 2020 NXP
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*
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*/
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/dts-v1/;
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#include "fsl-lx2160a-qds.dtsi"
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/ {
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model = "NXP Layerscape LX2162AQDS Board";
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compatible = "fsl,lx2162aqds", "fsl,lx2160a";
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aliases {
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spi1 = &dspi0;
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spi2 = &dspi1;
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spi3 = &dspi2;
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};
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};
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&usb1 {
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status = "disabled";
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};
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&pcie2 {
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status = "disabled";
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};
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&pcie5 {
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status = "disabled";
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};
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&pcie6 {
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status = "disabled";
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};
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&dspi0 {
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bus-num = <0>;
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status = "okay";
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dflash0: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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dflash1: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <1>;
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};
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dflash2: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <2>;
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};
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};
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&dspi1 {
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bus-num = <0>;
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status = "okay";
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dflash3: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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dflash4: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <1>;
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};
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dflash5: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <2>;
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};
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};
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&dspi2 {
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bus-num = <0>;
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status = "okay";
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dflash6: n25q128a {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <0>;
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};
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dflash7: sst25wf040b {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <1>;
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};
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dflash8: en25s64 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "spi-flash";
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spi-max-frequency = <3000000>;
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spi-cpol;
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spi-cpha;
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reg = <2>;
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};
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};
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