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https://github.com/brain-hackers/u-boot-brain
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![Stephen Warren](/assets/img/avatar_default.png)
The device tree already contains the required configuration for both the USB1 and USB3 ports. Enable the required configuration options to enable both these ports, which in turn allows the USB1 port to be used. Note that on a true Seaboard, this port is typically used as a device port hosting Tegra's USB recovery protocol. However, on the Springbank derivative, this port is the only external USB port, so we enable it as a host port so that USB peripherals may be used. Enabling this port in U-Boot as a host port doesn't prevent the port from reverting to a device port when the CPU is reset into recovery mode. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
119 lines
3.1 KiB
C
119 lines
3.1 KiB
C
/*
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* (C) Copyright 2010,2011
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* NVIDIA Corporation <www.nvidia.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#ifndef __CONFIG_H
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#define __CONFIG_H
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#include <asm/sizes.h>
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/* LP0 suspend / resume */
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#define CONFIG_TEGRA_LP0
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#define CONFIG_AES
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#define CONFIG_TEGRA_PMU
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#define CONFIG_TPS6586X_POWER
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#define CONFIG_TEGRA_CLOCK_SCALING
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#include "tegra20-common.h"
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/* Enable fdt support for Seaboard. Flash the image in u-boot-dtb.bin */
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#define CONFIG_DEFAULT_DEVICE_TREE tegra20-seaboard
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#define CONFIG_OF_CONTROL
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#define CONFIG_OF_SEPARATE
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/* High-level configuration options */
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#define V_PROMPT "Tegra20 (SeaBoard) # "
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#define CONFIG_TEGRA_BOARD_STRING "NVIDIA Seaboard"
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/* Board-specific serial config */
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#define CONFIG_TEGRA_ENABLE_UARTD
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#define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE
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/* On Seaboard: GPIO_PI3 = Port I = 8, bit = 3 */
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#define CONFIG_UART_DISABLE_GPIO GPIO_PI3
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#define CONFIG_MACH_TYPE MACH_TYPE_SEABOARD
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#define CONFIG_BOARD_EARLY_INIT_F
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/* I2C */
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#define CONFIG_TEGRA_I2C
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#define CONFIG_SYS_I2C_INIT_BOARD
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#define CONFIG_I2C_MULTI_BUS
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#define CONFIG_SYS_MAX_I2C_BUS 4
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_CMD_I2C
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/* SD/MMC */
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#define CONFIG_MMC
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#define CONFIG_GENERIC_MMC
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#define CONFIG_TEGRA_MMC
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#define CONFIG_CMD_MMC
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#define CONFIG_DOS_PARTITION
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#define CONFIG_EFI_PARTITION
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#define CONFIG_CMD_EXT2
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#define CONFIG_CMD_FAT
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/* Environment in eMMC, at the end of 2nd "boot sector" */
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#define CONFIG_ENV_IS_IN_MMC
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#define CONFIG_ENV_OFFSET ((512 * 1024) - CONFIG_ENV_SIZE)
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_SYS_MMC_ENV_PART 2
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/* USB Host support */
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 3
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#define CONFIG_USB_EHCI
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#define CONFIG_USB_EHCI_TEGRA
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#define CONFIG_USB_STORAGE
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#define CONFIG_CMD_USB
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/* USB networking support */
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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/* General networking support */
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#define CONFIG_CMD_NET
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#define CONFIG_CMD_DHCP
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/* Enable keyboard */
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#define CONFIG_TEGRA_KEYBOARD
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#define CONFIG_KEYBOARD
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#undef TEGRA_DEVICE_SETTINGS
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#define TEGRA_DEVICE_SETTINGS "stdin=serial,tegra-kbc\0" \
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"stdout=serial\0" \
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"stderr=serial\0"
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#include "tegra-common-post.h"
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/* NAND support */
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#define CONFIG_CMD_NAND
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#define CONFIG_TEGRA_NAND
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/* Max number of NAND devices */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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/* Somewhat oddly, the NAND base address must be a config option */
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#define CONFIG_SYS_NAND_BASE NV_PA_NAND_BASE
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#endif /* __CONFIG_H */
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