u-boot-brain/drivers/fpga
Simon Goldschmidt d5de3d4978 arm: socfpga: fpga: fix type of local variable
The 'status' variable in 'socfpga_load()' for both gen5 and arria10
is of type 'unsigned long' while it is always used as 'int' only.
Change it to 'int'.

Signed-off-by: Simon Goldschmidt <simon.k.r.goldschmidt@gmail.com>
2018-10-31 01:41:10 +01:00
..
ACEX1K.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
altera.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
cyclon2.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
fpga.c cmd: fpga: Add support to load secure bitstreams 2018-06-01 11:37:31 +02:00
ivm_core.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Kconfig fpga: Kconfig: Replace spaces with tabs 2018-09-11 10:58:41 +02:00
lattice.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
Makefile SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
socfpga_arria10.c arm: socfpga: fpga: fix type of local variable 2018-10-31 01:41:10 +01:00
socfpga_gen5.c arm: socfpga: fpga: fix type of local variable 2018-10-31 01:41:10 +01:00
socfpga.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
spartan2.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
spartan3.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
stratixII.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
stratixv.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
virtex2.c SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07 09:34:12 -04:00
xilinx.c fpga: zynqmp: Add secure bitstream loading for ZynqMP 2018-06-01 11:37:31 +02:00
zynqmppl.c fpga: zynqmp: Modify PL bitstream loading sequence 2018-09-26 10:15:00 +02:00
zynqpl.c drivers: fpga: zynqpl: fix compilation with SPL 2018-07-19 10:49:57 +02:00