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https://github.com/brain-hackers/u-boot-brain
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05ffdc85ca
Full conversion to dm for all boards, legacy code removed. Signed-off-by: Angelo Durgehello <angelo.dureghello@timesys.com>
36 lines
793 B
Plaintext
36 lines
793 B
Plaintext
* Freescale ColdFire DMA-FEC ethernet controller
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Required properties:
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- compatible: should be "fsl,mcf-dma-fec"
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- reg: address and length of the register set for the device.
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- rx-task: dma channel
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- tx-task: dma channel
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- rx-priority: dma channel
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- tx-priority: dma channel
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- rx-init: dma channel
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- tx-init: dma channel
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Optional properties:
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- mii-base: index of FEC reg area, 0 for FEC0, 1 for FEC1
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- max-speed: max speedm Mbits/sec
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- phy-addr: phy address
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- timeout-loop: integer value for driver loops time out
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Example:
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fec0: ethernet@9000 {
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compatible = "fsl,mcf-dma-fec";
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reg = <0x9000 0x800>;
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mii-base = <0>;
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phy-addr = <0>;
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timeout-loop = <5000>;
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rx-task = <0>;
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tx-task = <1>;
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rx-piority = <6>;
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tx-piority = <7>;
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rx-init = <16>;
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tx-init = <17>;
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status = "disabled";
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};
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