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https://github.com/brain-hackers/u-boot-brain
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b3d2cde7a3
New device trees will use "fsl,qe" compatible properties. Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
79 lines
2.4 KiB
C
79 lines
2.4 KiB
C
/*
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* Copyright 2007 Freescale Semiconductor, Inc.
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*
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* (C) Copyright 2000
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#if defined(CONFIG_OF_LIBFDT)
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#include <libfdt.h>
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#include <fdt_support.h>
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DECLARE_GLOBAL_DATA_PTR;
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void ft_cpu_setup(void *blob, bd_t *bd)
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{
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#if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\
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defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3)
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fdt_fixup_ethernet(blob, bd);
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#endif
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"timebase-frequency", (bd->bi_busfreq / 4), 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
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"clock-frequency", gd->core_clk, 1);
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do_fixup_by_prop_u32(blob, "device_type", "soc", 4,
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"bus-frequency", bd->bi_busfreq, 1);
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#ifdef CONFIG_QE
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do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
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"bus-frequency", gd->qe_clk, 1);
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do_fixup_by_prop_u32(blob, "device_type", "qe", 4,
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"brg-frequency", gd->brg_clk, 1);
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do_fixup_by_compat_u32(blob, "fsl,qe",
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"clock-frequency", gd->qe_clk, 1);
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do_fixup_by_compat_u32(blob, "fsl,qe",
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"bus-frequency", gd->qe_clk, 1);
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do_fixup_by_compat_u32(blob, "fsl,qe",
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"brg-frequency", gd->brg_clk, 1);
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#endif
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#ifdef CFG_NS16550
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do_fixup_by_compat_u32(blob, "ns16550",
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"clock-frequency", bd->bi_busfreq, 1);
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#endif
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#ifdef CONFIG_CPM2
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do_fixup_by_compat_u32(blob, "fsl,cpm2-scc-uart",
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"current-speed", bd->bi_baudrate, 1);
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do_fixup_by_compat_u32(blob, "fsl,cpm2-brg",
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"clock-frequency", bd->bi_brgfreq, 1);
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#endif
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fdt_fixup_memory(blob, (u64)bd->bi_memstart, (u64)bd->bi_memsize);
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}
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#endif /* CONFIG_OF_LIBFDT */
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