mirror of
https://github.com/brain-hackers/u-boot-brain
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83d290c56f
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
61 lines
1.4 KiB
C
61 lines
1.4 KiB
C
// SPDX-License-Identifier: GPL-2.0+
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/*
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* This file configures the internal USB PHY in AM35X.
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*
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* Copyright (C) 2012 Ilya Yanok <ilya.yanok@gmail.com>
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*
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* Based on omap_phy_internal.c code from Linux by
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* Hema HK <hemahk@ti.com>
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*/
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#include <common.h>
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#include <asm/io.h>
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#include <asm/arch/am35x_def.h>
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void am35x_musb_reset(struct udevice *dev)
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{
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/* Reset the musb interface */
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clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
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0, USBOTGSS_SW_RST);
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clrsetbits_le32(&am35x_scm_general_regs->ip_sw_reset,
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USBOTGSS_SW_RST, 0);
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}
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void am35x_musb_phy_power(struct udevice *dev, u8 on)
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{
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unsigned long start = get_timer(0);
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if (on) {
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/*
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* Start the on-chip PHY and its PLL.
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*/
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clrsetbits_le32(&am35x_scm_general_regs->devconf2,
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CONF2_RESET | CONF2_PHYPWRDN | CONF2_OTGPWRDN,
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CONF2_PHY_PLLON);
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debug("Waiting for PHY clock good...\n");
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while (!(readl(&am35x_scm_general_regs->devconf2)
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& CONF2_PHYCLKGD)) {
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if (get_timer(start) > CONFIG_SYS_HZ / 10) {
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printf("musb PHY clock good timed out\n");
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break;
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}
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}
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} else {
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/*
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* Power down the on-chip PHY.
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*/
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clrsetbits_le32(&am35x_scm_general_regs->devconf2,
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CONF2_PHY_PLLON,
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CONF2_PHYPWRDN | CONF2_OTGPWRDN);
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}
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}
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void am35x_musb_clear_irq(struct udevice *dev)
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{
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clrsetbits_le32(&am35x_scm_general_regs->lvl_intr_clr,
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0, USBOTGSS_INT_CLR);
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readl(&am35x_scm_general_regs->lvl_intr_clr);
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}
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