mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-27 20:38:52 +09:00
![Ying Zhang](/assets/img/avatar_default.png)
This patch introduces SPL to enable a loader stub that being loaded by the code from the internal on-chip ROM. It loads the final uboot image into DDR, then jump to it to begin execution. The SPL's size is sizeable, the maximum size must not exceed the size of L2 SRAM. It initializes the DDR through SPD code, and copys final uboot image to DDR. So there are two stage uboot images: * spl_boot, 96KB size. The env variables are copied to L2 SRAM, so that ddr spd code can get the interleaving mode setting in env. It loads final uboot image from offset 96KB. * final uboot image, size is variable depends on the functions enabled. Signed-off-by: Ying Zhang <b40530@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
616 lines
14 KiB
C
616 lines
14 KiB
C
/*
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* SPI flash interface
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*
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* Copyright (C) 2008 Atmel Corporation
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* Copyright (C) 2010 Reinhard Meyer, EMK Elektronik
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*
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* Licensed under the GPL-2 or later.
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*/
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#include <common.h>
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#include <fdtdec.h>
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#include <malloc.h>
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#include <spi.h>
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#include <spi_flash.h>
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#include <watchdog.h>
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#include "spi_flash_internal.h"
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DECLARE_GLOBAL_DATA_PTR;
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static void spi_flash_addr(u32 addr, u8 *cmd)
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{
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/* cmd[0] is actual command */
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cmd[1] = addr >> 16;
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cmd[2] = addr >> 8;
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cmd[3] = addr >> 0;
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}
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static int spi_flash_read_write(struct spi_slave *spi,
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const u8 *cmd, size_t cmd_len,
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const u8 *data_out, u8 *data_in,
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size_t data_len)
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{
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unsigned long flags = SPI_XFER_BEGIN;
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int ret;
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if (data_len == 0)
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flags |= SPI_XFER_END;
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ret = spi_xfer(spi, cmd_len * 8, cmd, NULL, flags);
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if (ret) {
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debug("SF: Failed to send command (%zu bytes): %d\n",
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cmd_len, ret);
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} else if (data_len != 0) {
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ret = spi_xfer(spi, data_len * 8, data_out, data_in,
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SPI_XFER_END);
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if (ret)
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debug("SF: Failed to transfer %zu bytes of data: %d\n",
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data_len, ret);
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}
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return ret;
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}
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int spi_flash_cmd(struct spi_slave *spi, u8 cmd, void *response, size_t len)
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{
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return spi_flash_cmd_read(spi, &cmd, 1, response, len);
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}
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int spi_flash_cmd_read(struct spi_slave *spi, const u8 *cmd,
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size_t cmd_len, void *data, size_t data_len)
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{
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return spi_flash_read_write(spi, cmd, cmd_len, NULL, data, data_len);
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}
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int spi_flash_cmd_write(struct spi_slave *spi, const u8 *cmd, size_t cmd_len,
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const void *data, size_t data_len)
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{
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return spi_flash_read_write(spi, cmd, cmd_len, data, NULL, data_len);
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}
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int spi_flash_cmd_wait_ready(struct spi_flash *flash, unsigned long timeout)
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{
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struct spi_slave *spi = flash->spi;
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unsigned long timebase;
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int ret;
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u8 status;
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u8 check_status = 0x0;
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u8 poll_bit = STATUS_WIP;
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u8 cmd = flash->poll_cmd;
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if (cmd == CMD_FLAG_STATUS) {
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poll_bit = STATUS_PEC;
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check_status = poll_bit;
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}
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ret = spi_xfer(spi, 8, &cmd, NULL, SPI_XFER_BEGIN);
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if (ret) {
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debug("SF: fail to read %s status register\n",
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cmd == CMD_READ_STATUS ? "read" : "flag");
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return ret;
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}
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timebase = get_timer(0);
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do {
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WATCHDOG_RESET();
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ret = spi_xfer(spi, 8, NULL, &status, 0);
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if (ret)
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return -1;
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if ((status & poll_bit) == check_status)
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break;
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} while (get_timer(timebase) < timeout);
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spi_xfer(spi, 0, NULL, NULL, SPI_XFER_END);
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if ((status & poll_bit) == check_status)
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return 0;
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/* Timed out */
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debug("SF: time out!\n");
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return -1;
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}
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int spi_flash_write_common(struct spi_flash *flash, const u8 *cmd,
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size_t cmd_len, const void *buf, size_t buf_len)
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{
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struct spi_slave *spi = flash->spi;
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unsigned long timeout = SPI_FLASH_PROG_TIMEOUT;
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int ret;
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if (buf == NULL)
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timeout = SPI_FLASH_PAGE_ERASE_TIMEOUT;
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: unable to claim SPI bus\n");
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return ret;
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}
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ret = spi_flash_cmd_write_enable(flash);
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if (ret < 0) {
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debug("SF: enabling write failed\n");
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return ret;
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}
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ret = spi_flash_cmd_write(spi, cmd, cmd_len, buf, buf_len);
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if (ret < 0) {
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debug("SF: write cmd failed\n");
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return ret;
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}
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ret = spi_flash_cmd_wait_ready(flash, timeout);
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if (ret < 0) {
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debug("SF: write %s timed out\n",
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timeout == SPI_FLASH_PROG_TIMEOUT ?
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"program" : "page erase");
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return ret;
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}
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spi_release_bus(spi);
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return ret;
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}
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int spi_flash_cmd_erase(struct spi_flash *flash, u32 offset, size_t len)
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{
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u32 erase_size;
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u8 cmd[4];
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int ret = -1;
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erase_size = flash->sector_size;
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if (offset % erase_size || len % erase_size) {
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debug("SF: Erase offset/length not multiple of erase size\n");
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return -1;
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}
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if (erase_size == 4096)
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cmd[0] = CMD_ERASE_4K;
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else
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cmd[0] = CMD_ERASE_64K;
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while (len) {
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#ifdef CONFIG_SPI_FLASH_BAR
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u8 bank_sel;
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bank_sel = offset / SPI_FLASH_16MB_BOUN;
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ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
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if (ret) {
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debug("SF: fail to set bank%d\n", bank_sel);
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return ret;
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}
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#endif
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spi_flash_addr(offset, cmd);
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debug("SF: erase %2x %2x %2x %2x (%x)\n", cmd[0], cmd[1],
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cmd[2], cmd[3], offset);
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ret = spi_flash_write_common(flash, cmd, sizeof(cmd), NULL, 0);
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if (ret < 0) {
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debug("SF: erase failed\n");
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break;
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}
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offset += erase_size;
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len -= erase_size;
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}
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return ret;
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}
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int spi_flash_cmd_write_multi(struct spi_flash *flash, u32 offset,
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size_t len, const void *buf)
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{
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unsigned long byte_addr, page_size;
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size_t chunk_len, actual;
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u8 cmd[4];
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int ret = -1;
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page_size = flash->page_size;
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cmd[0] = CMD_PAGE_PROGRAM;
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for (actual = 0; actual < len; actual += chunk_len) {
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#ifdef CONFIG_SPI_FLASH_BAR
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u8 bank_sel;
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bank_sel = offset / SPI_FLASH_16MB_BOUN;
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ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
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if (ret) {
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debug("SF: fail to set bank%d\n", bank_sel);
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return ret;
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}
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#endif
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byte_addr = offset % page_size;
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chunk_len = min(len - actual, page_size - byte_addr);
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if (flash->spi->max_write_size)
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chunk_len = min(chunk_len, flash->spi->max_write_size);
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spi_flash_addr(offset, cmd);
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debug("PP: 0x%p => cmd = { 0x%02x 0x%02x%02x%02x } chunk_len = %zu\n",
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buf + actual, cmd[0], cmd[1], cmd[2], cmd[3], chunk_len);
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ret = spi_flash_write_common(flash, cmd, sizeof(cmd),
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buf + actual, chunk_len);
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if (ret < 0) {
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debug("SF: write failed\n");
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break;
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}
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offset += chunk_len;
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}
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return ret;
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}
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int spi_flash_read_common(struct spi_flash *flash, const u8 *cmd,
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size_t cmd_len, void *data, size_t data_len)
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{
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struct spi_slave *spi = flash->spi;
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int ret;
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ret = spi_claim_bus(flash->spi);
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if (ret) {
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debug("SF: unable to claim SPI bus\n");
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return ret;
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}
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ret = spi_flash_cmd_read(spi, cmd, cmd_len, data, data_len);
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if (ret < 0) {
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debug("SF: read cmd failed\n");
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return ret;
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}
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spi_release_bus(spi);
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return ret;
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}
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int spi_flash_cmd_read_fast(struct spi_flash *flash, u32 offset,
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size_t len, void *data)
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{
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u8 cmd[5], bank_sel = 0;
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u32 remain_len, read_len;
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int ret = -1;
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/* Handle memory-mapped SPI */
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if (flash->memory_map) {
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memcpy(data, flash->memory_map + offset, len);
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return 0;
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}
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cmd[0] = CMD_READ_ARRAY_FAST;
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cmd[4] = 0x00;
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while (len) {
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#ifdef CONFIG_SPI_FLASH_BAR
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bank_sel = offset / SPI_FLASH_16MB_BOUN;
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ret = spi_flash_cmd_bankaddr_write(flash, bank_sel);
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if (ret) {
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debug("SF: fail to set bank%d\n", bank_sel);
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return ret;
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}
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#endif
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remain_len = (SPI_FLASH_16MB_BOUN * (bank_sel + 1) - offset);
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if (len < remain_len)
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read_len = len;
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else
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read_len = remain_len;
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spi_flash_addr(offset, cmd);
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ret = spi_flash_read_common(flash, cmd, sizeof(cmd),
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data, read_len);
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if (ret < 0) {
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debug("SF: read failed\n");
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break;
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}
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offset += read_len;
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len -= read_len;
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data += read_len;
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}
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return ret;
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}
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int spi_flash_cmd_write_status(struct spi_flash *flash, u8 sr)
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{
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u8 cmd;
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int ret;
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cmd = CMD_WRITE_STATUS;
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ret = spi_flash_write_common(flash, &cmd, 1, &sr, 1);
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if (ret < 0) {
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debug("SF: fail to write status register\n");
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return ret;
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}
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return 0;
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}
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#ifdef CONFIG_SPI_FLASH_BAR
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int spi_flash_cmd_bankaddr_write(struct spi_flash *flash, u8 bank_sel)
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{
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u8 cmd;
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int ret;
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if (flash->bank_curr == bank_sel) {
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debug("SF: not require to enable bank%d\n", bank_sel);
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return 0;
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}
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cmd = flash->bank_write_cmd;
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ret = spi_flash_write_common(flash, &cmd, 1, &bank_sel, 1);
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if (ret < 0) {
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debug("SF: fail to write bank register\n");
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return ret;
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}
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flash->bank_curr = bank_sel;
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return 0;
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}
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int spi_flash_bank_config(struct spi_flash *flash, u8 idcode0)
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{
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u8 cmd;
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u8 curr_bank = 0;
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/* discover bank cmds */
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switch (idcode0) {
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case SPI_FLASH_SPANSION_IDCODE0:
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flash->bank_read_cmd = CMD_BANKADDR_BRRD;
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flash->bank_write_cmd = CMD_BANKADDR_BRWR;
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break;
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case SPI_FLASH_STMICRO_IDCODE0:
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case SPI_FLASH_WINBOND_IDCODE0:
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flash->bank_read_cmd = CMD_EXTNADDR_RDEAR;
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flash->bank_write_cmd = CMD_EXTNADDR_WREAR;
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break;
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default:
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printf("SF: Unsupported bank commands %02x\n", idcode0);
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return -1;
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}
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/* read the bank reg - on which bank the flash is in currently */
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cmd = flash->bank_read_cmd;
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if (flash->size > SPI_FLASH_16MB_BOUN) {
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if (spi_flash_read_common(flash, &cmd, 1, &curr_bank, 1)) {
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debug("SF: fail to read bank addr register\n");
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return -1;
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}
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flash->bank_curr = curr_bank;
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} else {
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flash->bank_curr = curr_bank;
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}
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return 0;
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}
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#endif
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#ifdef CONFIG_OF_CONTROL
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int spi_flash_decode_fdt(const void *blob, struct spi_flash *flash)
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{
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fdt_addr_t addr;
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fdt_size_t size;
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int node;
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/* If there is no node, do nothing */
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node = fdtdec_next_compatible(blob, 0, COMPAT_GENERIC_SPI_FLASH);
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if (node < 0)
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return 0;
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addr = fdtdec_get_addr_size(blob, node, "memory-map", &size);
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if (addr == FDT_ADDR_T_NONE) {
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debug("%s: Cannot decode address\n", __func__);
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return 0;
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}
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if (flash->size != size) {
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debug("%s: Memory map must cover entire device\n", __func__);
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return -1;
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}
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flash->memory_map = (void *)addr;
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return 0;
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}
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#endif /* CONFIG_OF_CONTROL */
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/*
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* The following table holds all device probe functions
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*
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* shift: number of continuation bytes before the ID
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* idcode: the expected IDCODE or 0xff for non JEDEC devices
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* probe: the function to call
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*
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* Non JEDEC devices should be ordered in the table such that
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* the probe functions with best detection algorithms come first.
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*
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* Several matching entries are permitted, they will be tried
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* in sequence until a probe function returns non NULL.
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*
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* IDCODE_CONT_LEN may be redefined if a device needs to declare a
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* larger "shift" value. IDCODE_PART_LEN generally shouldn't be
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* changed. This is the max number of bytes probe functions may
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* examine when looking up part-specific identification info.
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*
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* Probe functions will be given the idcode buffer starting at their
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* manu id byte (the "idcode" in the table below). In other words,
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* all of the continuation bytes will be skipped (the "shift" below).
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*/
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#define IDCODE_CONT_LEN 0
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#define IDCODE_PART_LEN 5
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static const struct {
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const u8 shift;
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const u8 idcode;
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struct spi_flash *(*probe) (struct spi_slave *spi, u8 *idcode);
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} flashes[] = {
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/* Keep it sorted by define name */
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#ifdef CONFIG_SPI_FLASH_ATMEL
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{ 0, 0x1f, spi_flash_probe_atmel, },
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#endif
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#ifdef CONFIG_SPI_FLASH_EON
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{ 0, 0x1c, spi_flash_probe_eon, },
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#endif
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#ifdef CONFIG_SPI_FLASH_GIGADEVICE
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{ 0, 0xc8, spi_flash_probe_gigadevice, },
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#endif
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#ifdef CONFIG_SPI_FLASH_MACRONIX
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{ 0, 0xc2, spi_flash_probe_macronix, },
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#endif
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#ifdef CONFIG_SPI_FLASH_SPANSION
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{ 0, 0x01, spi_flash_probe_spansion, },
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#endif
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#ifdef CONFIG_SPI_FLASH_SST
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{ 0, 0xbf, spi_flash_probe_sst, },
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#endif
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#ifdef CONFIG_SPI_FLASH_STMICRO
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{ 0, 0x20, spi_flash_probe_stmicro, },
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#endif
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#ifdef CONFIG_SPI_FLASH_WINBOND
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{ 0, 0xef, spi_flash_probe_winbond, },
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#endif
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#ifdef CONFIG_SPI_FRAM_RAMTRON
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{ 6, 0xc2, spi_fram_probe_ramtron, },
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# undef IDCODE_CONT_LEN
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# define IDCODE_CONT_LEN 6
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#endif
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/* Keep it sorted by best detection */
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#ifdef CONFIG_SPI_FLASH_STMICRO
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{ 0, 0xff, spi_flash_probe_stmicro, },
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#endif
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#ifdef CONFIG_SPI_FRAM_RAMTRON_NON_JEDEC
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{ 0, 0xff, spi_fram_probe_ramtron, },
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#endif
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};
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#define IDCODE_LEN (IDCODE_CONT_LEN + IDCODE_PART_LEN)
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struct spi_flash *spi_flash_probe(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int spi_mode)
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{
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struct spi_slave *spi;
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struct spi_flash *flash = NULL;
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int ret, i, shift;
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u8 idcode[IDCODE_LEN], *idp;
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spi = spi_setup_slave(bus, cs, max_hz, spi_mode);
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if (!spi) {
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printf("SF: Failed to set up slave\n");
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return NULL;
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}
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ret = spi_claim_bus(spi);
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if (ret) {
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debug("SF: Failed to claim SPI bus: %d\n", ret);
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goto err_claim_bus;
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}
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/* Read the ID codes */
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ret = spi_flash_cmd(spi, CMD_READ_ID, idcode, sizeof(idcode));
|
|
if (ret)
|
|
goto err_read_id;
|
|
|
|
#ifdef DEBUG
|
|
printf("SF: Got idcodes\n");
|
|
print_buffer(0, idcode, 1, sizeof(idcode), 0);
|
|
#endif
|
|
|
|
/* count the number of continuation bytes */
|
|
for (shift = 0, idp = idcode;
|
|
shift < IDCODE_CONT_LEN && *idp == 0x7f;
|
|
++shift, ++idp)
|
|
continue;
|
|
|
|
/* search the table for matches in shift and id */
|
|
for (i = 0; i < ARRAY_SIZE(flashes); ++i)
|
|
if (flashes[i].shift == shift && flashes[i].idcode == *idp) {
|
|
/* we have a match, call probe */
|
|
flash = flashes[i].probe(spi, idp);
|
|
if (flash)
|
|
break;
|
|
}
|
|
|
|
if (!flash) {
|
|
printf("SF: Unsupported manufacturer %02x\n", *idp);
|
|
goto err_manufacturer_probe;
|
|
}
|
|
|
|
#ifdef CONFIG_SPI_FLASH_BAR
|
|
/* Configure the BAR - disover bank cmds and read current bank */
|
|
ret = spi_flash_bank_config(flash, *idp);
|
|
if (ret < 0)
|
|
goto err_manufacturer_probe;
|
|
#endif
|
|
|
|
#ifdef CONFIG_OF_CONTROL
|
|
if (spi_flash_decode_fdt(gd->fdt_blob, flash)) {
|
|
debug("SF: FDT decode error\n");
|
|
goto err_manufacturer_probe;
|
|
}
|
|
#endif
|
|
#ifndef CONFIG_SPL_BUILD
|
|
printf("SF: Detected %s with page size ", flash->name);
|
|
print_size(flash->sector_size, ", total ");
|
|
print_size(flash->size, "");
|
|
if (flash->memory_map)
|
|
printf(", mapped at %p", flash->memory_map);
|
|
puts("\n");
|
|
#endif
|
|
#ifndef CONFIG_SPI_FLASH_BAR
|
|
if (flash->size > SPI_FLASH_16MB_BOUN) {
|
|
puts("SF: Warning - Only lower 16MiB accessible,");
|
|
puts(" Full access #define CONFIG_SPI_FLASH_BAR\n");
|
|
}
|
|
#endif
|
|
|
|
spi_release_bus(spi);
|
|
|
|
return flash;
|
|
|
|
err_manufacturer_probe:
|
|
err_read_id:
|
|
spi_release_bus(spi);
|
|
err_claim_bus:
|
|
spi_free_slave(spi);
|
|
return NULL;
|
|
}
|
|
|
|
void *spi_flash_do_alloc(int offset, int size, struct spi_slave *spi,
|
|
const char *name)
|
|
{
|
|
struct spi_flash *flash;
|
|
void *ptr;
|
|
|
|
ptr = malloc(size);
|
|
if (!ptr) {
|
|
debug("SF: Failed to allocate memory\n");
|
|
return NULL;
|
|
}
|
|
memset(ptr, '\0', size);
|
|
flash = (struct spi_flash *)(ptr + offset);
|
|
|
|
/* Set up some basic fields - caller will sort out sizes */
|
|
flash->spi = spi;
|
|
flash->name = name;
|
|
flash->poll_cmd = CMD_READ_STATUS;
|
|
|
|
flash->read = spi_flash_cmd_read_fast;
|
|
flash->write = spi_flash_cmd_write_multi;
|
|
flash->erase = spi_flash_cmd_erase;
|
|
|
|
return flash;
|
|
}
|
|
|
|
void spi_flash_free(struct spi_flash *flash)
|
|
{
|
|
spi_free_slave(flash->spi);
|
|
free(flash);
|
|
}
|