mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-25 12:29:44 +09:00
8ceb34a1d1
The SYS_BOOT-based fallback shouldn't only check for one of the conditions of use and then let the switch/case handle each boot device without enforcing the conditions for each type of boot device again. For instance, this behaviour would trigger the fallback for UART when BOOT_DEVICE_UART is defined, CONFIG_SPL_YMODEM_SUPPORT is enabled (which should be a show-stopper) and e.g. BOOT_DEVICE_USB is enabled and not CONFIG_SPL_USB_SUPPORT. Separating the logic for USB and UART solves this. In addition, this adds support for more peripheral devices (USBETH and CPGMAC) to the fallback mechanism. Note that the USBETH boot device should always be different from the USB boot device (each should match a different bootrom handoff case). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hannes Schmelzer <oe5hpm@oevsv.at> Tested-by: Hannes Schmelzer <oe5hpm@oevsv.at>
247 lines
5.9 KiB
C
247 lines
5.9 KiB
C
/*
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* boot-common.c
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*
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* Common bootmode functions for omap based boards
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*
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* Copyright (C) 2011, Texas Instruments, Incorporated - http://www.ti.com/
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#include <common.h>
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#include <ahci.h>
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#include <spl.h>
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#include <asm/omap_common.h>
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#include <asm/arch/omap.h>
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#include <asm/arch/mmc_host_def.h>
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#include <asm/arch/sys_proto.h>
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#include <watchdog.h>
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#include <scsi.h>
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#include <i2c.h>
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DECLARE_GLOBAL_DATA_PTR;
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__weak u32 omap_sys_boot_device(void)
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{
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return BOOT_DEVICE_NONE;
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}
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void save_omap_boot_params(void)
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{
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u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
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struct omap_boot_parameters *omap_boot_params;
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int sys_boot_device = 0;
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u32 boot_device;
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u32 boot_mode;
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if ((boot_params < NON_SECURE_SRAM_START) ||
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(boot_params > NON_SECURE_SRAM_END))
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return;
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omap_boot_params = (struct omap_boot_parameters *)boot_params;
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boot_device = omap_boot_params->boot_device;
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boot_mode = MMCSD_MODE_UNDEFINED;
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/* Boot device */
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#ifdef BOOT_DEVICE_NAND_I2C
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/*
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* Re-map NAND&I2C boot-device to the "normal" NAND boot-device.
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* Otherwise the SPL boot IF can't handle this device correctly.
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* Somehow booting with Hynix 4GBit NAND H27U4G8 on Siemens
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* Draco leads to this boot-device passed to SPL from the BootROM.
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*/
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if (boot_device == BOOT_DEVICE_NAND_I2C)
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boot_device = BOOT_DEVICE_NAND;
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#endif
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#ifdef BOOT_DEVICE_QSPI_4
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/*
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* We get different values for QSPI_1 and QSPI_4 being used, but
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* don't actually care about this difference. Rather than
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* mangle the later code, if we're coming in as QSPI_4 just
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* change to the QSPI_1 value.
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*/
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if (boot_device == BOOT_DEVICE_QSPI_4)
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boot_device = BOOT_DEVICE_SPI;
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#endif
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/*
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* When booting from peripheral booting, the boot device is not usable
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* as-is (unless there is support for it), so the boot device is instead
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* figured out using the SYS_BOOT pins.
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*/
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switch (boot_device) {
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#if defined(BOOT_DEVICE_UART) && !defined(CONFIG_SPL_YMODEM_SUPPORT)
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case BOOT_DEVICE_UART:
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sys_boot_device = 1;
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break;
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#endif
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#if defined(BOOT_DEVICE_USB) && !defined(CONFIG_SPL_USB_SUPPORT)
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case BOOT_DEVICE_USB:
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sys_boot_device = 1;
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break;
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#endif
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#if defined(BOOT_DEVICE_USBETH) && !defined(CONFIG_SPL_USBETH_SUPPORT)
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case BOOT_DEVICE_USBETH:
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sys_boot_device = 1;
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break;
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#endif
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#if defined(BOOT_DEVICE_CPGMAC) && !defined(CONFIG_SPL_ETH_SUPPORT)
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case BOOT_DEVICE_CPGMAC:
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sys_boot_device = 1;
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break;
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#endif
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}
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if (sys_boot_device) {
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boot_device = omap_sys_boot_device();
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/* MMC raw mode will fallback to FS mode. */
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if ((boot_device >= MMC_BOOT_DEVICES_START) &&
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(boot_device <= MMC_BOOT_DEVICES_END))
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boot_mode = MMCSD_MODE_RAW;
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}
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gd->arch.omap_boot_device = boot_device;
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/* Boot mode */
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#ifdef CONFIG_OMAP34XX
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if ((boot_device >= MMC_BOOT_DEVICES_START) &&
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(boot_device <= MMC_BOOT_DEVICES_END)) {
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switch (boot_device) {
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case BOOT_DEVICE_MMC1:
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boot_mode = MMCSD_MODE_FS;
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break;
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case BOOT_DEVICE_MMC2:
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boot_mode = MMCSD_MODE_RAW;
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break;
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}
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}
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#else
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/*
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* If the boot device was dynamically changed and doesn't match what
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* the bootrom initially booted, we cannot use the boot device
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* descriptor to figure out the boot mode.
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*/
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if ((boot_device == omap_boot_params->boot_device) &&
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(boot_device >= MMC_BOOT_DEVICES_START) &&
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(boot_device <= MMC_BOOT_DEVICES_END)) {
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boot_params = omap_boot_params->boot_device_descriptor;
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if ((boot_params < NON_SECURE_SRAM_START) ||
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(boot_params > NON_SECURE_SRAM_END))
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return;
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boot_params = *((u32 *)(boot_params + DEVICE_DATA_OFFSET));
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if ((boot_params < NON_SECURE_SRAM_START) ||
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(boot_params > NON_SECURE_SRAM_END))
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return;
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boot_mode = *((u32 *)(boot_params + BOOT_MODE_OFFSET));
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if (boot_mode != MMCSD_MODE_FS &&
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boot_mode != MMCSD_MODE_RAW)
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#ifdef CONFIG_SUPPORT_EMMC_BOOT
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boot_mode = MMCSD_MODE_EMMCBOOT;
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#else
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boot_mode = MMCSD_MODE_UNDEFINED;
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#endif
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}
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#endif
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gd->arch.omap_boot_mode = boot_mode;
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#if !defined(CONFIG_TI814X) && !defined(CONFIG_TI816X) && \
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!defined(CONFIG_AM33XX) && !defined(CONFIG_AM43XX)
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/* CH flags */
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gd->arch.omap_ch_flags = omap_boot_params->ch_flags;
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#endif
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}
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#ifdef CONFIG_SPL_BUILD
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u32 spl_boot_device(void)
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{
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return gd->arch.omap_boot_device;
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}
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u32 spl_boot_mode(void)
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{
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return gd->arch.omap_boot_mode;
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}
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void spl_board_init(void)
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{
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/*
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* Save the boot parameters passed from romcode.
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* We cannot delay the saving further than this,
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* to prevent overwrites.
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*/
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save_omap_boot_params();
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/* Prepare console output */
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preloader_console_init();
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#if defined(CONFIG_SPL_NAND_SUPPORT) || defined(CONFIG_SPL_ONENAND_SUPPORT)
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gpmc_init();
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#endif
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#ifdef CONFIG_SPL_I2C_SUPPORT
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i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
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#endif
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#if defined(CONFIG_AM33XX) && defined(CONFIG_SPL_MUSB_NEW_SUPPORT)
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arch_misc_init();
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#endif
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#if defined(CONFIG_HW_WATCHDOG)
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hw_watchdog_init();
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#endif
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#ifdef CONFIG_AM33XX
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am33xx_spl_board_init();
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#endif
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}
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int board_mmc_init(bd_t *bis)
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{
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switch (spl_boot_device()) {
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case BOOT_DEVICE_MMC1:
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omap_mmc_init(0, 0, 0, -1, -1);
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break;
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case BOOT_DEVICE_MMC2:
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case BOOT_DEVICE_MMC2_2:
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omap_mmc_init(1, 0, 0, -1, -1);
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break;
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}
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return 0;
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}
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void __noreturn jump_to_image_no_args(struct spl_image_info *spl_image)
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{
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typedef void __noreturn (*image_entry_noargs_t)(u32 *);
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image_entry_noargs_t image_entry =
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(image_entry_noargs_t) spl_image->entry_point;
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u32 boot_params = *((u32 *)OMAP_SRAM_SCRATCH_BOOT_PARAMS);
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debug("image entry point: 0x%X\n", spl_image->entry_point);
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/* Pass the saved boot_params from rom code */
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image_entry((u32 *)boot_params);
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}
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#endif
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#ifdef CONFIG_SCSI_AHCI_PLAT
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void arch_preboot_os(void)
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{
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ahci_reset((void __iomem *)DWC_AHSATA_BASE);
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}
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#endif
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#if defined(CONFIG_USB_FUNCTION_FASTBOOT) && !defined(CONFIG_ENV_IS_NOWHERE)
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int fb_set_reboot_flag(void)
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{
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printf("Setting reboot to fastboot flag ...\n");
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setenv("dofastboot", "1");
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saveenv();
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return 0;
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}
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#endif
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