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f779d739d6
u-boot-brain/arch/arm/include
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Michael Walle f779d739d6 kirkwood: define CONFIG_SYS_CACHELINE_SIZE 
By default, on Kirkwood SoC DCache Lnd ICache line
lengths are 32 bytes long

Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Cc: Prafulla Wadaskar <prafulla@marvell.com>
Signed-off-by: Michael Walle <michael@walle.cc>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
2011-11-03 22:56:22 +01:00
..
asm kirkwood: define CONFIG_SYS_CACHELINE_SIZE 2011-11-03 22:56:22 +01:00