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![Matthias Brugger](/assets/img/avatar_default.png)
On the RPi4 armv7 build we have the situationt that we use physical addresses of 64 bit, while the virtual addresses are 32 bit. Remap the base address in this scenario via map_physmem(). Signed-off-by: Matthias Brugger <mbrugger@suse.com>
186 lines
4.4 KiB
C
186 lines
4.4 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Copyright 2020, Matthias Brugger <mbrugger@suse.com>
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*
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* Driver for Raspberry Pi hardware random number generator
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*/
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#include <common.h>
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#include <dm.h>
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#include <linux/delay.h>
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#include <rng.h>
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#include <asm/io.h>
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#define usleep_range(a, b) udelay((b))
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#define RNG_CTRL_OFFSET 0x00
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#define RNG_CTRL_RNG_RBGEN_MASK 0x00001FFF
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#define RNG_CTRL_RNG_RBGEN_ENABLE 0x00000001
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#define RNG_CTRL_RNG_RBGEN_DISABLE 0x00000000
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#define RNG_SOFT_RESET_OFFSET 0x04
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#define RNG_SOFT_RESET 0x00000001
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#define RBG_SOFT_RESET_OFFSET 0x08
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#define RBG_SOFT_RESET 0x00000001
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#define RNG_INT_STATUS_OFFSET 0x18
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#define RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK 0x80000000
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#define RNG_INT_STATUS_NIST_FAIL_IRQ_MASK 0x00000020
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#define RNG_FIFO_DATA_OFFSET 0x20
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#define RNG_FIFO_COUNT_OFFSET 0x24
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#define RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK 0x000000FF
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struct iproc_rng200_plat {
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void __iomem *base;
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};
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static void iproc_rng200_enable(struct iproc_rng200_plat *pdata, bool enable)
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{
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void __iomem *rng_base = pdata->base;
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u32 val;
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val = readl(rng_base + RNG_CTRL_OFFSET);
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val &= ~RNG_CTRL_RNG_RBGEN_MASK;
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if (enable)
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val |= RNG_CTRL_RNG_RBGEN_ENABLE;
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else
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val &= ~RNG_CTRL_RNG_RBGEN_ENABLE;
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writel(val, rng_base + RNG_CTRL_OFFSET);
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}
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static void iproc_rng200_restart(struct iproc_rng200_plat *pdata)
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{
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void __iomem *rng_base = pdata->base;
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u32 val;
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iproc_rng200_enable(pdata, false);
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/* Clear all interrupt status */
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writel(0xFFFFFFFFUL, rng_base + RNG_INT_STATUS_OFFSET);
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/* Reset RNG and RBG */
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val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
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val |= RBG_SOFT_RESET;
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writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
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val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
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val |= RNG_SOFT_RESET;
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writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
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val = readl(rng_base + RNG_SOFT_RESET_OFFSET);
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val &= ~RNG_SOFT_RESET;
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writel(val, rng_base + RNG_SOFT_RESET_OFFSET);
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val = readl(rng_base + RBG_SOFT_RESET_OFFSET);
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val &= ~RBG_SOFT_RESET;
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writel(val, rng_base + RBG_SOFT_RESET_OFFSET);
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iproc_rng200_enable(pdata, true);
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}
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static int iproc_rng200_read(struct udevice *dev, void *data, size_t len)
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{
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struct iproc_rng200_plat *priv = dev_get_plat(dev);
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char *buf = (char *)data;
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u32 num_remaining = len;
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u32 status;
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#define MAX_RESETS_PER_READ 1
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u32 num_resets = 0;
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while (num_remaining > 0) {
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/* Is RNG sane? If not, reset it. */
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status = readl(priv->base + RNG_INT_STATUS_OFFSET);
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if ((status & (RNG_INT_STATUS_MASTER_FAIL_LOCKOUT_IRQ_MASK |
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RNG_INT_STATUS_NIST_FAIL_IRQ_MASK)) != 0) {
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if (num_resets >= MAX_RESETS_PER_READ)
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return len - num_remaining;
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iproc_rng200_restart(priv);
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num_resets++;
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}
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/* Are there any random numbers available? */
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if ((readl(priv->base + RNG_FIFO_COUNT_OFFSET) &
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RNG_FIFO_COUNT_RNG_FIFO_COUNT_MASK) > 0) {
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if (num_remaining >= sizeof(u32)) {
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/* Buffer has room to store entire word */
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*(u32 *)buf = readl(priv->base +
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RNG_FIFO_DATA_OFFSET);
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buf += sizeof(u32);
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num_remaining -= sizeof(u32);
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} else {
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/* Buffer can only store partial word */
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u32 rnd_number = readl(priv->base +
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RNG_FIFO_DATA_OFFSET);
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memcpy(buf, &rnd_number, num_remaining);
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buf += num_remaining;
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num_remaining = 0;
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}
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} else {
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/* Can wait, give others chance to run */
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usleep_range(min(num_remaining * 10, 500U), 500);
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}
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}
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return 0;
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}
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static int iproc_rng200_probe(struct udevice *dev)
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{
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struct iproc_rng200_plat *priv = dev_get_plat(dev);
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iproc_rng200_enable(priv, true);
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return 0;
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}
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static int iproc_rng200_remove(struct udevice *dev)
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{
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struct iproc_rng200_plat *priv = dev_get_plat(dev);
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iproc_rng200_enable(priv, false);
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return 0;
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}
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static int iproc_rng200_of_to_plat(struct udevice *dev)
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{
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struct iproc_rng200_plat *pdata = dev_get_plat(dev);
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pdata->base = devfdt_map_physmem(dev, sizeof(void *));
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if (!pdata->base)
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return -ENODEV;
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return 0;
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}
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static const struct dm_rng_ops iproc_rng200_ops = {
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.read = iproc_rng200_read,
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};
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static const struct udevice_id iproc_rng200_rng_match[] = {
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{ .compatible = "brcm,bcm2711-rng200", },
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{ .compatible = "brcm,iproc-rng200", },
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{},
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};
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U_BOOT_DRIVER(iproc_rng200_rng) = {
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.name = "iproc_rng200-rng",
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.id = UCLASS_RNG,
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.of_match = iproc_rng200_rng_match,
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.ops = &iproc_rng200_ops,
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.probe = iproc_rng200_probe,
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.remove = iproc_rng200_remove,
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.priv_auto = sizeof(struct iproc_rng200_plat),
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.of_to_plat = iproc_rng200_of_to_plat,
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};
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