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![Masahiro Yamada](/assets/img/avatar_default.png)
Add a field to distinguish DDR3+ from (standard) DDR3. It also allows to delete CONFIG_DDR_STANDARD (this is not a software configuration, but a board attribute). Default DDR3 spec for each SoC: PH1-LD4, PH1-sLD8: DDR3+ Others: DDR3 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
105 lines
3.1 KiB
C
105 lines
3.1 KiB
C
/*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MACH_INIT_H
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#define __MACH_INIT_H
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#include <linux/types.h>
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#define UNIPHIER_MAX_NR_DRAM_CH 3
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struct uniphier_dram_ch {
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unsigned long base;
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unsigned long size;
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unsigned int width;
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};
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struct uniphier_board_data {
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unsigned int dram_freq;
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unsigned int dram_nr_ch;
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bool dram_ddr3plus;
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struct uniphier_dram_ch dram_ch[UNIPHIER_MAX_NR_DRAM_CH];
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};
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const struct uniphier_board_data *uniphier_get_board_param(void);
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int ph1_sld3_init(const struct uniphier_board_data *bd);
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int ph1_ld4_init(const struct uniphier_board_data *bd);
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int ph1_pro4_init(const struct uniphier_board_data *bd);
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int ph1_sld8_init(const struct uniphier_board_data *bd);
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int ph1_pro5_init(const struct uniphier_board_data *bd);
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int proxstream2_init(const struct uniphier_board_data *bd);
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#if defined(CONFIG_MICRO_SUPPORT_CARD)
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int ph1_sld3_sbc_init(const struct uniphier_board_data *bd);
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int ph1_ld4_sbc_init(const struct uniphier_board_data *bd);
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int ph1_pro4_sbc_init(const struct uniphier_board_data *bd);
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int proxstream2_sbc_init(const struct uniphier_board_data *bd);
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#else
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static inline int ph1_sld3_sbc_init(const struct uniphier_board_data *bd)
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{
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return 0;
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}
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static inline int ph1_ld4_sbc_init(const struct uniphier_board_data *bd)
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{
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return 0;
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}
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static inline int ph1_pro4_sbc_init(const struct uniphier_board_data *bd)
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{
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return 0;
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}
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static inline int proxstream2_sbc_init(const struct uniphier_board_data *bd)
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{
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return 0;
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}
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#endif
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int ph1_sld3_bcu_init(const struct uniphier_board_data *bd);
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int ph1_ld4_bcu_init(const struct uniphier_board_data *bd);
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int memconf_init(const struct uniphier_board_data *bd);
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int ph1_sld3_memconf_init(const struct uniphier_board_data *bd);
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int proxstream2_memconf_init(const struct uniphier_board_data *bd);
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int ph1_sld3_pll_init(const struct uniphier_board_data *bd);
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int ph1_ld4_pll_init(const struct uniphier_board_data *bd);
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int ph1_pro4_pll_init(const struct uniphier_board_data *bd);
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int ph1_sld8_pll_init(const struct uniphier_board_data *bd);
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int ph1_sld3_enable_dpll_ssc(const struct uniphier_board_data *bd);
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int ph1_ld4_enable_dpll_ssc(const struct uniphier_board_data *bd);
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int ph1_ld4_early_clk_init(const struct uniphier_board_data *bd);
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int ph1_pro5_early_clk_init(const struct uniphier_board_data *bd);
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int proxstream2_early_clk_init(const struct uniphier_board_data *bd);
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int ph1_sld3_early_pin_init(const struct uniphier_board_data *bd);
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int ph1_ld4_umc_init(const struct uniphier_board_data *bd);
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int ph1_pro4_umc_init(const struct uniphier_board_data *bd);
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int ph1_sld8_umc_init(const struct uniphier_board_data *bd);
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int proxstream2_umc_init(const struct uniphier_board_data *bd);
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void ph1_sld3_pin_init(void);
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void ph1_ld4_pin_init(void);
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void ph1_pro4_pin_init(void);
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void ph1_sld8_pin_init(void);
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void ph1_pro5_pin_init(void);
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void proxstream2_pin_init(void);
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void ph1_ld6b_pin_init(void);
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void ph1_ld4_clk_init(void);
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void ph1_pro4_clk_init(void);
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void ph1_pro5_clk_init(void);
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void proxstream2_clk_init(void);
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#define pr_err(fmt, args...) printf(fmt, ##args)
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#endif /* __MACH_INIT_H */
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