mirror of
https://github.com/brain-hackers/u-boot-brain
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a0aba8a2eb
CONFIG_SYS_[DI]CACHE_OFF had been partially converted to Kconfig
parameters; only for the ARC architecture. This patch turns these two
parameters into Kconfig items everywhere else they are found.
All of the include/configs/* and defconfig changes in this patch are
for arm machines only. The Kconfig changes for arc, nds32, riscv,
and xtensa have been included since these symbols are found in code
under arch/{arc,nds32,riscv,xtensa}, however, no currently-defined
include/configs/* or defconfigs for these architectures exist which
include these symbols.
These results have been confirmed with tools/moveconfig.py.
Acked-by: Alexey Brodkin <abrodkin@snopsys.com>
Signed-off-by: Trevor Woerner <trevor@toganlabs.com>
[trini: Re-migrate for a few more boards]
Signed-off-by: Tom Rini <trini@konsulko.com>
98 lines
2.9 KiB
C
98 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* Copyright (C) 2011 Samsung Electronics
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*
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* Configuration settings for the SAMSUNG ORIGEN (EXYNOS4210) board.
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*/
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#ifndef __CONFIG_ORIGEN_H
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#define __CONFIG_ORIGEN_H
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#include <configs/exynos4-common.h>
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/* High Level Configuration Options */
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#define CONFIG_EXYNOS4210 1 /* which is a EXYNOS4210 SoC */
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#define CONFIG_ORIGEN 1 /* working with ORIGEN*/
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/* ORIGEN has 4 bank of DRAM */
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#define CONFIG_SYS_SDRAM_BASE 0x40000000
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#define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
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#define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
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/* memtest works on */
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#define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x6000000)
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#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
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#define CONFIG_MACH_TYPE MACH_TYPE_ORIGEN
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/* select serial console configuration */
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/* Console configuration */
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#define CONFIG_DEFAULT_CONSOLE "console=ttySAC1,115200n8\0"
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#define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
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#define CONFIG_SYS_MONITOR_BASE 0x00000000
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/* Power Down Modes */
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#define S5P_CHECK_SLEEP 0x00000BAD
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#define S5P_CHECK_DIDLE 0xBAD00000
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#define S5P_CHECK_LPA 0xABAD0000
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/* MMC SPL */
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#define COPY_BL2_FNPTR_ADDR 0x02020030
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#define CONFIG_EXTRA_ENV_SETTINGS \
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"loadaddr=0x40007000\0" \
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"rdaddr=0x48000000\0" \
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"kerneladdr=0x40007000\0" \
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"ramdiskaddr=0x48000000\0" \
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"console=ttySAC2,115200n8\0" \
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"mmcdev=0\0" \
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"bootenv=uEnv.txt\0" \
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"loadbootenv=load mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
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"importbootenv=echo Importing environment from mmc ...; " \
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"env import -t $loadaddr $filesize\0" \
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"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
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"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
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"source ${loadaddr}\0"
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#define CONFIG_BOOTCOMMAND \
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"if mmc rescan; then " \
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"echo SD/MMC found on device ${mmcdev};" \
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"if run loadbootenv; then " \
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"echo Loaded environment from ${bootenv};" \
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"run importbootenv;" \
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"fi;" \
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"if test -n $uenvcmd; then " \
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"echo Running uenvcmd ...;" \
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"run uenvcmd;" \
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"fi;" \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"fi; " \
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"fi;" \
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"load mmc ${mmcdev} ${loadaddr} uImage; bootm ${loadaddr} "
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#define CONFIG_CLK_1000_400_200
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/* MIU (Memory Interleaving Unit) */
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#define CONFIG_MIU_2BIT_21_7_INTERLEAVED
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#define CONFIG_SYS_MMC_ENV_DEV 0
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#define CONFIG_ENV_SIZE (16 << 10) /* 16 KB */
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#define RESERVE_BLOCK_SIZE (512)
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#define BL1_SIZE (16 << 10) /*16 K reserved for BL1*/
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#define CONFIG_ENV_OFFSET (RESERVE_BLOCK_SIZE + BL1_SIZE)
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#define CONFIG_SPL_MAX_FOOTPRINT (14 * 1024)
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#define CONFIG_SYS_INIT_SP_ADDR 0x02040000
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/* U-Boot copy size from boot Media to DRAM.*/
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#define COPY_BL2_SIZE 0x80000
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#define BL2_START_OFFSET ((CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)/512)
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#define BL2_SIZE_BLOC_COUNT (COPY_BL2_SIZE/512)
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#endif /* __CONFIG_H */
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