Lokesh Vutla f70b72e353 arm: K3: Update _start instruction ... On K3 family SoCs, once the ROM loads image on R5, M3 resets R5 and expects to start executing from 0x0. In order to handle this ROM updates the boot vector of R5 such that first 64 bytes of image load address are mapped to 0x0. In this case, it is SPL's responsibility to jump to the proper image location. So, update the PC with address of reset vector(like how other exception vectors are handled), instead of branching to reset. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>		2018-09-11 08:32:55 -04:00
..
arc	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
arm	arm: K3: Update _start instruction	2018-09-11 08:32:55 -04:00
m68k	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
microblaze	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
mips	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
nds32	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
nios2	.gitignore: move *.dtb and *.dtb.S patterns to the top-level .gitignore	2018-06-18 14:43:12 -04:00
powerpc	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
riscv	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
sandbox	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
sh	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
x86	Remove <inttypes.h> includes and PRI* usages in printf() entirely	2018-09-10 20:48:17 -04:00
xtensa	arch: types.h: factor out fixed width typedefs to int-ll64.h	2018-09-10 20:48:16 -04:00
.gitignore
Kconfig	dm: Change CMD_DM enabling	2018-07-30 07:18:48 -04:00