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https://github.com/brain-hackers/u-boot-brain
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![Tom Rini](/assets/img/avatar_default.png)
When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com>
113 lines
2.6 KiB
C
113 lines
2.6 KiB
C
/* SPDX-License-Identifier: GPL-2.0+ */
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/*
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* (C) Copyright 2002-2010
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* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
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*/
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#ifndef __ASM_GBL_DATA_H
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#define __ASM_GBL_DATA_H
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/* Architecture-specific global data */
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struct arch_global_data {
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#if defined(CONFIG_FSL_ESDHC)
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u32 sdhc_clk;
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#endif
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#if defined(CONFIG_U_QE)
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u32 qe_clk;
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u32 brg_clk;
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uint mp_alloc_base;
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uint mp_alloc_top;
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#endif /* CONFIG_U_QE */
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#ifdef CONFIG_AT91FAMILY
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/* "static data" needed by at91's clock.c */
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unsigned long cpu_clk_rate_hz;
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unsigned long main_clk_rate_hz;
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unsigned long mck_rate_hz;
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unsigned long plla_rate_hz;
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unsigned long pllb_rate_hz;
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unsigned long at91_pllb_usb_init;
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#endif
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/* "static data" needed by most of timer.c on ARM platforms */
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unsigned long timer_rate_hz;
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unsigned int tbu;
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unsigned int tbl;
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unsigned long lastinc;
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unsigned long long timer_reset_value;
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#if !(defined(CONFIG_SYS_ICACHE_OFF) && defined(CONFIG_SYS_DCACHE_OFF))
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unsigned long tlb_addr;
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unsigned long tlb_size;
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#if defined(CONFIG_ARM64)
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unsigned long tlb_fillptr;
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unsigned long tlb_emerg;
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#endif
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#endif
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#ifdef CONFIG_SYS_MEM_RESERVE_SECURE
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#define MEM_RESERVE_SECURE_SECURED 0x1
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#define MEM_RESERVE_SECURE_MAINTAINED 0x2
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#define MEM_RESERVE_SECURE_ADDR_MASK (~0x3)
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/*
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* Secure memory addr
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* This variable needs maintenance if the RAM base is not zero,
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* or if RAM splits into non-consecutive banks. It also has a
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* flag indicating the secure memory is marked as secure by MMU.
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* Flags used: 0x1 secured
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* 0x2 maintained
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*/
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phys_addr_t secure_ram;
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unsigned long tlb_allocated;
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#endif
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#ifdef CONFIG_RESV_RAM
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/*
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* Reserved RAM for memory resident, eg. Management Complex (MC)
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* driver which continues to run after U-Boot exits.
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*/
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phys_addr_t resv_ram;
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#endif
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#ifdef CONFIG_ARCH_OMAP2PLUS
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u32 omap_boot_device;
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u32 omap_boot_mode;
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u8 omap_ch_flags;
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#endif
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#if defined(CONFIG_FSL_LSCH3) && defined(CONFIG_SYS_FSL_HAS_DP_DDR)
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unsigned long mem2_clk;
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#endif
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};
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#include <asm-generic/global_data.h>
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#ifdef __clang__
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#define DECLARE_GLOBAL_DATA_PTR
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#define gd get_gd()
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static inline gd_t *get_gd(void)
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{
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gd_t *gd_ptr;
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#ifdef CONFIG_ARM64
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/*
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* Make will already error that reserving x18 is not supported at the
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* time of writing, clang: error: unknown argument: '-ffixed-x18'
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*/
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__asm__ volatile("mov %0, x18\n" : "=r" (gd_ptr));
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#else
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__asm__ volatile("mov %0, r9\n" : "=r" (gd_ptr));
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#endif
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return gd_ptr;
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}
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#else
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#ifdef CONFIG_ARM64
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("x18")
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#else
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#define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r9")
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#endif
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#endif
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#endif /* __ASM_GBL_DATA_H */
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