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https://github.com/brain-hackers/u-boot-brain
synced 2024-08-16 23:18:51 +09:00
![Sjoerd Simons](/assets/img/avatar_default.png)
Now that u-boot relocates the malloc area in SPL to SDRAM, with the malloc area sitting below the SPL_STACK_R_ADDR the SPL_STACK_R_MALLOC_SIMPLE_LEN needs to be set explicitly for rockchip as its SPL_STACK_R_ADDR (512kb) is smaller then STACK_R_MALLOC_SIMPLE_LEN (1Mb). Using the same value as SYS_MALLOC_F_LEN (8kb) is enough to load u-boot from SD card. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
46 lines
1.0 KiB
Plaintext
46 lines
1.0 KiB
Plaintext
CONFIG_ARM=y
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CONFIG_ARCH_ROCKCHIP=y
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CONFIG_SYS_MALLOC_F_LEN=0x2000
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CONFIG_ROCKCHIP_RK3288=y
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CONFIG_TARGET_CHROMEBOOK_JERRY=y
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CONFIG_SPL_STACK_R_ADDR=0x80000
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CONFIG_SPL_STACK_R_MALLOC_SIMPLE_LEN=0x2000
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CONFIG_DEFAULT_DEVICE_TREE="rk3288-jerry"
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CONFIG_SPL_STACK_R=y
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# CONFIG_CMD_IMLS is not set
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# CONFIG_CMD_SETEXPR is not set
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CONFIG_CMD_PMIC=y
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CONFIG_CMD_REGULATOR=y
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CONFIG_SPL_OF_CONTROL=y
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CONFIG_REGMAP=y
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CONFIG_SPL_REGMAP=y
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CONFIG_SYSCON=y
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CONFIG_CLK=y
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CONFIG_SPL_CLK=y
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CONFIG_ROCKCHIP_GPIO=y
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CONFIG_SYS_I2C_ROCKCHIP=y
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CONFIG_SPL_SYSCON=y
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CONFIG_LED=y
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CONFIG_SPL_LED=y
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CONFIG_LED_GPIO=y
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CONFIG_RESET=y
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CONFIG_DM_MMC=y
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CONFIG_ROCKCHIP_DWMMC=y
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CONFIG_PINCTRL=y
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CONFIG_SPL_PINCTRL=y
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CONFIG_ROCKCHIP_PINCTRL=y
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CONFIG_DM_PMIC=y
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CONFIG_PMIC_ACT8846=y
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CONFIG_DM_REGULATOR=y
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CONFIG_REGULATOR_ACT8846=y
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CONFIG_RAM=y
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CONFIG_SPL_RAM=y
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CONFIG_DEBUG_UART=y
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CONFIG_DEBUG_UART_BASE=0xff690000
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CONFIG_DEBUG_UART_CLOCK=24000000
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CONFIG_DEBUG_UART_SHIFT=2
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CONFIG_SYS_NS16550=y
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CONFIG_USE_PRIVATE_LIBGCC=y
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CONFIG_CMD_DHRYSTONE=y
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CONFIG_ERRNO_STR=y
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