mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-07-05 02:36:39 +09:00
9cd37b02a0
Enable the escpi3 nets attached to the mikroBUS slot on the i.MX7 Sabre evalution board. Also enble the SPI flash commands to work with the "flash click" board. This is V2 of this patch with changes recommended by the maintainer CC: Jagan Teki <jteki@openedev.com>
278 lines
7.6 KiB
C
278 lines
7.6 KiB
C
/*
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* Copyright (C) 2015 Freescale Semiconductor, Inc.
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*
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* Configuration settings for the Freescale i.MX7D SABRESD board.
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*
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* SPDX-License-Identifier: GPL-2.0+
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*/
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#ifndef __MX7D_SABRESD_CONFIG_H
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#define __MX7D_SABRESD_CONFIG_H
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#include "mx7_common.h"
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#define CONFIG_DBG_MONITOR
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#define PHYS_SDRAM_SIZE SZ_1G
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#define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR
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/* Size of malloc() pool */
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#define CONFIG_SYS_MALLOC_LEN (32 * SZ_1M)
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#define CONFIG_BOARD_EARLY_INIT_F
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#define CONFIG_BOARD_LATE_INIT
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/* Network */
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#define CONFIG_FEC_MXC
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#define CONFIG_MII
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#define CONFIG_FEC_XCV_TYPE RGMII
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#define CONFIG_ETHPRIME "FEC"
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#define CONFIG_FEC_MXC_PHYADDR 0
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#define CONFIG_PHYLIB
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#define CONFIG_PHY_BROADCOM
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/* ENET1 */
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#define IMX_FEC_BASE ENET_IPS_BASE_ADDR
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/* MMC Config*/
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#define CONFIG_SYS_FSL_ESDHC_ADDR 0
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/* PMIC */
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#define CONFIG_POWER
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#define CONFIG_POWER_I2C
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#define CONFIG_POWER_PFUZE3000
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#define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
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#undef CONFIG_BOOTM_NETBSD
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#undef CONFIG_BOOTM_PLAN9
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#undef CONFIG_BOOTM_RTEMS
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/* I2C configs */
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#define CONFIG_SYS_I2C
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#define CONFIG_SYS_I2C_MXC
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#define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
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#define CONFIG_SYS_I2C_SPEED 100000
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#define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
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#define CONFIG_SYS_MMC_IMG_LOAD_PART 1
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#ifdef CONFIG_IMX_BOOTAUX
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/* Set to QSPI1 A flash at default */
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#define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
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#define UPDATE_M4_ENV \
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"m4image=m4_qspi.bin\0" \
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"loadm4image=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${m4image}\0" \
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"update_m4_from_sd=" \
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"if sf probe 0:0; then " \
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"if run loadm4image; then " \
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"setexpr fw_sz ${filesize} + 0xffff; " \
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"setexpr fw_sz ${fw_sz} / 0x10000; " \
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"setexpr fw_sz ${fw_sz} * 0x10000; " \
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"sf erase 0x0 ${fw_sz}; " \
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"sf write ${loadaddr} 0x0 ${filesize}; " \
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"fi; " \
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"fi\0" \
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"m4boot=sf probe 0:0; bootaux "__stringify(CONFIG_SYS_AUXCORE_BOOTDATA)"\0"
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#else
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#define UPDATE_M4_ENV ""
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#endif
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#define CONFIG_MFG_ENV_SETTINGS \
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"mfgtool_args=setenv bootargs console=${console},${baudrate} " \
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"rdinit=/linuxrc " \
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"g_mass_storage.stall=0 g_mass_storage.removable=1 " \
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"g_mass_storage.idVendor=0x066F g_mass_storage.idProduct=0x37FF "\
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"g_mass_storage.iSerialNumber=\"\" "\
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"clk_ignore_unused "\
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"\0" \
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"initrd_addr=0x83800000\0" \
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"initrd_high=0xffffffff\0" \
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"bootcmd_mfg=run mfgtool_args;bootz ${loadaddr} ${initrd_addr} ${fdt_addr};\0" \
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#define CONFIG_DFU_ENV_SETTINGS \
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"dfu_alt_info=image raw 0 0x800000;"\
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"u-boot raw 0 0x4000;"\
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"bootimg part 0 1;"\
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"rootfs part 0 2\0" \
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#define CONFIG_EXTRA_ENV_SETTINGS \
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UPDATE_M4_ENV \
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CONFIG_MFG_ENV_SETTINGS \
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CONFIG_DFU_ENV_SETTINGS \
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"script=boot.scr\0" \
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"image=zImage\0" \
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"console=ttymxc0\0" \
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"fdt_high=0xffffffff\0" \
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"initrd_high=0xffffffff\0" \
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"fdt_file=imx7d-sdb.dtb\0" \
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"fdt_addr=0x83000000\0" \
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"boot_fdt=try\0" \
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"ip_dyn=yes\0" \
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"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
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"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
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"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
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"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
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"mmcautodetect=yes\0" \
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"mmcargs=setenv bootargs console=${console},${baudrate} " \
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"root=${mmcroot}\0" \
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"loadbootscript=" \
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"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
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"bootscript=echo Running bootscript from mmc ...; " \
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"source\0" \
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"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
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"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
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"mmcboot=echo Booting from mmc ...; " \
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"run mmcargs; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if run loadfdt; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0" \
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"netargs=setenv bootargs console=${console},${baudrate} " \
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"root=/dev/nfs " \
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"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
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"netboot=echo Booting from net ...; " \
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"run netargs; " \
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"if test ${ip_dyn} = yes; then " \
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"setenv get_cmd dhcp; " \
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"else " \
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"setenv get_cmd tftp; " \
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"fi; " \
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"${get_cmd} ${image}; " \
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"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
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"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
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"bootz ${loadaddr} - ${fdt_addr}; " \
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"else " \
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"if test ${boot_fdt} = try; then " \
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"bootz; " \
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"else " \
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"echo WARN: Cannot load the DT; " \
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"fi; " \
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"fi; " \
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"else " \
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"bootz; " \
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"fi;\0"
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#define CONFIG_BOOTCOMMAND \
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"mmc dev ${mmcdev};" \
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"mmc dev ${mmcdev}; if mmc rescan; then " \
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"if run loadbootscript; then " \
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"run bootscript; " \
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"else " \
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"if run loadimage; then " \
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"run mmcboot; " \
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"else run netboot; " \
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"fi; " \
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"fi; " \
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"else run netboot; fi"
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#define CONFIG_SYS_MEMTEST_START 0x80000000
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#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x20000000)
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#define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
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#define CONFIG_SYS_HZ 1000
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#define CONFIG_STACKSIZE SZ_128K
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/* Physical Memory Map */
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#define CONFIG_NR_DRAM_BANKS 1
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#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
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#define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
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#define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
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#define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
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#define CONFIG_SYS_INIT_SP_OFFSET \
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(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
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#define CONFIG_SYS_INIT_SP_ADDR \
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(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
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/* FLASH and environment organization */
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#define CONFIG_SYS_NO_FLASH
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#define CONFIG_ENV_SIZE SZ_8K
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#define CONFIG_ENV_IS_IN_MMC
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/* MXC SPI driver support */
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#define CONFIG_MXC_SPI
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/*
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* If want to use nand, define CONFIG_NAND_MXS and rework board
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* to support nand, since emmc has pin conflicts with nand
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*/
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#ifdef CONFIG_NAND_MXS
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#define CONFIG_CMD_NAND
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#define CONFIG_CMD_NAND_TRIMFFS
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/* NAND stuff */
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#define CONFIG_SYS_MAX_NAND_DEVICE 1
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#define CONFIG_SYS_NAND_BASE 0x40000000
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#define CONFIG_SYS_NAND_5_ADDR_CYCLE
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#define CONFIG_SYS_NAND_ONFI_DETECTION
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/* DMA stuff, needed for GPMI/MXS NAND support */
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#define CONFIG_APBH_DMA
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#define CONFIG_APBH_DMA_BURST
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#define CONFIG_APBH_DMA_BURST8
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#endif
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#define CONFIG_ENV_OFFSET (8 * SZ_64K)
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#ifdef CONFIG_NAND_MXS
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#define CONFIG_SYS_FSL_USDHC_NUM 1
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#else
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#define CONFIG_SYS_FSL_USDHC_NUM 2
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#endif
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#define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 */
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#define CONFIG_SYS_MMC_ENV_PART 0 /* user area */
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#define CONFIG_MMCROOT "/dev/mmcblk0p2" /* USDHC1 */
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/* USB Configs */
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#define CONFIG_EHCI_HCD_INIT_AFTER_RESET
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#define CONFIG_USB_HOST_ETHER
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#define CONFIG_USB_ETHER_ASIX
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#define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
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#define CONFIG_MXC_USB_FLAGS 0
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#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
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#define CONFIG_IMX_THERMAL
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#define CONFIG_USBD_HS
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#define CONFIG_USB_FUNCTION_MASS_STORAGE
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#ifdef CONFIG_VIDEO
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#define CONFIG_VIDEO_MXS
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#define CONFIG_VIDEO_LOGO
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#define CONFIG_SPLASH_SCREEN
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#define CONFIG_SPLASH_SCREEN_ALIGN
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#define CONFIG_CMD_BMP
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#define CONFIG_BMP_16BPP
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#define CONFIG_VIDEO_BMP_RLE8
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#define CONFIG_VIDEO_BMP_LOGO
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#endif
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#ifdef CONFIG_FSL_QSPI
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#define CONFIG_SPI_FLASH
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#define CONFIG_SPI_FLASH_MACRONIX
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#define CONFIG_SPI_FLASH_BAR
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#define CONFIG_SF_DEFAULT_BUS 0
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#define CONFIG_SF_DEFAULT_CS 0
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#define CONFIG_SF_DEFAULT_SPEED 40000000
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#define CONFIG_SF_DEFAULT_MODE SPI_MODE_0
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#define FSL_QSPI_FLASH_NUM 1
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#define FSL_QSPI_FLASH_SIZE SZ_64M
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#define QSPI0_BASE_ADDR QSPI1_IPS_BASE_ADDR
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#define QSPI0_AMBA_BASE QSPI0_ARB_BASE_ADDR
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#endif
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#endif /* __CONFIG_H */
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