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https://github.com/brain-hackers/u-boot-brain
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f51f07eb58
If one custom board is using the 8MB flash, it is set as FLASH_BASE = 0xef000000, TEXT_BASE = 0xef780000. The current start.S code will be broken at switch_as. It is because the TLB1[15] is set as 16MB page size, EPN = TEXT_BASE & 0xff000000, RPN = 0xff000000. For the 8MB flash case, the EPN = 0xefxxxxxx, RPN = 0xffxxxxxx. Assume the virt address of switch_as is 0xef7ff18c, the real address of the instruction at switch_as should be 0xff7ff18c. the 0xff7ff18c is out of the range of the default 8MB boot LAW window 0xff800000 - 0xffffffff. So when we switch to AS1 address space at switch_as, the core can't fetch the instruction at switch_as any more. It will cause broken issue. Signed-off-by: Dave Liu <daveliu@freescale.com> |
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| .. | ||
| commproc.c | ||
| config.mk | ||
| cpu_init.c | ||
| cpu.c | ||
| ddr-gen1.c | ||
| ddr-gen2.c | ||
| ddr-gen3.c | ||
| ether_fcc.c | ||
| fdt.c | ||
| interrupts.c | ||
| Makefile | ||
| mp.c | ||
| mp.h | ||
| mpc8536_serdes.c | ||
| pci.c | ||
| qe_io.c | ||
| release.S | ||
| resetvec.S | ||
| serial_scc.c | ||
| speed.c | ||
| start.S | ||
| tlb.c | ||
| traps.c | ||