Benoît Thébaudeau f49d92a35b imx: iomux-mx51: Fix MX51_PAD_EIM_CS2__GPIO2_27 ... In ALT1 mode, EIM_CS2 is GPIO2[27], not ESDHC1.CD. Hence, rename MX51_PAD_EIM_CS2__SD1_CD to MX51_PAD_EIM_CS2__GPIO2_27. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>		2013-05-05 17:55:04 +02:00
..
clock.h	arm: mx5: Add NAND clock handling	2013-05-05 17:45:05 +02:00
crm_regs.h	mx5 clocks: Fix get_lp_apm()	2012-10-15 11:54:11 -07:00
gpio.h	MX: Set a common gpio.h for all i.MX	2012-09-01 14:58:27 +02:00
imx-regs.h	imx: Add useful fuse definitions	2013-04-28 11:07:40 +02:00
iomux-mx51.h	imx: iomux-mx51: Fix MX51_PAD_EIM_CS2__GPIO2_27	2013-05-05 17:55:04 +02:00
iomux.h	MX5: PAD_CTL_DRV_VOT_LOW and PAD_CTL_DRV_VOT_HIGH exchanged	2012-05-15 08:31:35 +02:00
mx5x_pins.h	mx5: Align SPI CS naming with i.MX53 reference manual	2012-11-19 08:48:59 +01:00
spl.h	arm: mx5: Add SPL support code to MX5	2013-05-05 17:45:05 +02:00
sys_proto.h	imx-common: cpu: add imx_ddr_size	2012-11-10 08:15:40 +01:00