mirror of
https://github.com/brain-hackers/u-boot-brain
synced 2024-08-21 01:18:52 +09:00
![]() With the introduction of early timer support in the TSC driver, the capability of getting clock rate from device tree was lost unfortunately. Now we bring such functionality back, but with a limitation that when TSC is used as early timer, specifying clock rate from device tree does not work. This fixes random boot failures seen on QEMU targets: printing "TSC frequency is ZERO" and reset forever. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> |
||
---|---|---|
.. | ||
ag101p_timer.c | ||
altera_timer.c | ||
arc_timer.c | ||
ast_timer.c | ||
atcpit100_timer.c | ||
atmel_pit_timer.c | ||
cadence-ttc.c | ||
Kconfig | ||
Makefile | ||
omap-timer.c | ||
rockchip_timer.c | ||
sandbox_timer.c | ||
sti-timer.c | ||
stm32_timer.c | ||
timer-uclass.c | ||
tsc_timer.c |